From: beeanyew Date: Fri, 1 Jan 2021 17:22:05 +0000 (+0100) Subject: Some random cleanup X-Git-Url: https://git.sesse.net/?a=commitdiff_plain;h=dfa1c598ba0c050538d5e90db4d5c50e080efe70;p=pistorm Some random cleanup --- diff --git a/Makefile b/Makefile index c32a147..9c656bb 100644 --- a/Makefile +++ b/Makefile @@ -1,17 +1,18 @@ EXENAME = emulator MAINFILES = emulator.c \ - Gayle.c \ - ide.c \ memory_mapped.c \ config_file/config_file.c \ input/input.c \ + gpio/gpio.c \ platforms/platforms.c \ platforms/amiga/amiga-autoconf.c \ platforms/amiga/amiga-platform.c \ platforms/amiga/amiga-registers.c \ platforms/dummy/dummy-platform.c \ platforms/dummy/dummy-registers.c \ + platforms/amiga/Gayle.c \ + platforms/amiga/gayle-ide/ide.c \ platforms/shared/rtc.c MUSASHIFILES = m68kcpu.c softfloat/softfloat.c diff --git a/emulator.c b/emulator.c index 1a14062..43ecdb1 100644 --- a/emulator.c +++ b/emulator.c @@ -14,68 +14,16 @@ #include #include #include -#include "Gayle.h" -#include "ide.h" #include "m68k.h" #include "main.h" #include "platforms/platforms.h" #include "input/input.h" +#include "gpio/gpio.h" +#include "platforms/amiga/Gayle.h" +#include "platforms/amiga/gayle-ide/ide.h" #include "platforms/amiga/amiga-registers.h" -//#define BCM2708_PERI_BASE 0x20000000 //pi0-1 -//#define BCM2708_PERI_BASE 0xFE000000 //pi4 -#define BCM2708_PERI_BASE 0x3F000000 // pi3 -#define BCM2708_PERI_SIZE 0x01000000 -#define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO controller */ -#define GPCLK_BASE (BCM2708_PERI_BASE + 0x101000) -#define GPIO_ADDR 0x200000 /* GPIO controller */ -#define GPCLK_ADDR 0x101000 -#define CLK_PASSWD 0x5a000000 -#define CLK_GP0_CTL 0x070 -#define CLK_GP0_DIV 0x074 - -#define SA0 5 -#define SA1 3 -#define SA2 2 - -#define STATUSREGADDR \ - GPIO_CLR = 1 << SA0; \ - GPIO_CLR = 1 << SA1; \ - GPIO_SET = 1 << SA2; -#define W16 \ - GPIO_CLR = 1 << SA0; \ - GPIO_CLR = 1 << SA1; \ - GPIO_CLR = 1 << SA2; -#define R16 \ - GPIO_SET = 1 << SA0; \ - GPIO_CLR = 1 << SA1; \ - GPIO_CLR = 1 << SA2; -#define W8 \ - GPIO_CLR = 1 << SA0; \ - GPIO_SET = 1 << SA1; \ - GPIO_CLR = 1 << SA2; -#define R8 \ - GPIO_SET = 1 << SA0; \ - GPIO_SET = 1 << SA1; \ - GPIO_CLR = 1 << SA2; - -#define PAGE_SIZE (4 * 1024) -#define BLOCK_SIZE (4 * 1024) - -#define GPIOSET(no, ishigh) \ - do { \ - if (ishigh) \ - set |= (1 << (no)); \ - else \ - reset |= (1 << (no)); \ - } while (0) - -#define JOY0DAT 0xDFF00A -#define JOY1DAT 0xDFF00C -#define CIAAPRA 0xBFE001 -#define POTGOR 0xDFF016 - int kb_hook_enabled = 0; int mouse_hook_enabled = 0; int cpu_emulation_running = 1; @@ -89,8 +37,6 @@ char mouse_buttons = 0; int mem_fd, mouse_fd = -1, keyboard_fd = -1; int mem_fd_gpclk; int gayle_emulation_enabled = 1; -void *gpio_map; -void *gpclk_map; // Configurable emulator options unsigned int cpu_type = M68K_CPU_TYPE_68000; @@ -98,55 +44,8 @@ unsigned int loop_cycles = 300; struct emulator_config *cfg = NULL; char keyboard_file[256] = "/dev/input/event0"; -// I/O access -volatile unsigned int *gpio; -volatile unsigned int *gpclk; -volatile unsigned int gpfsel0; -volatile unsigned int gpfsel1; -volatile unsigned int gpfsel2; -volatile unsigned int gpfsel0_o; -volatile unsigned int gpfsel1_o; -volatile unsigned int gpfsel2_o; - -// GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x) or -// SET_GPIO_ALT(x,y) -#define INP_GPIO(g) *(gpio + ((g) / 10)) &= ~(7 << (((g) % 10) * 3)) -#define OUT_GPIO(g) *(gpio + ((g) / 10)) |= (1 << (((g) % 10) * 3)) -#define SET_GPIO_ALT(g, a) \ - *(gpio + (((g) / 10))) |= \ - (((a) <= 3 ? (a) + 4 : (a) == 4 ? 3 : 2) << (((g) % 10) * 3)) - -#define GPIO_SET \ - *(gpio + 7) // sets bits which are 1 ignores bits which are 0 -#define GPIO_CLR \ - *(gpio + 10) // clears bits which are 1 ignores bits which are 0 - -#define GET_GPIO(g) (*(gpio + 13) & (1 << g)) // 0 if LOW, (1<> 13) & 0xff); - } else { - if (CheckIrq() == 1) { - write16(0xdff09c, 0x8008); - m68k_set_irq(2); - } - else - m68k_set_irq(0); - }; - + gpio_handle_irq(); } stop_cpu_emulation:; @@ -485,11 +295,7 @@ unsigned int m68k_read_memory_8(unsigned int address) { PLATFORM_CHECK_READ(OP_TYPE_BYTE); address &=0xFFFFFF; -// if (address < 0xffffff) { return read8((uint32_t)address); -// } - -// return 1; } unsigned int m68k_read_memory_16(unsigned int address) { @@ -522,25 +328,18 @@ unsigned int m68k_read_memory_16(unsigned int address) { } } -// if (address < 0xffffff) { - address &=0xFFFFFF; - return (unsigned int)read16((uint32_t)address); -// } -// return 1; + address &=0xFFFFFF; + return (unsigned int)read16((uint32_t)address); } unsigned int m68k_read_memory_32(unsigned int address) { PLATFORM_CHECK_READ(OP_TYPE_LONGWORD); -// if (address < 0xffffff) { - address &=0xFFFFFF; - uint16_t a = read16(address); - uint16_t b = read16(address + 2); - return (a << 16) | b; -// } - -// return 1; + address &=0xFFFFFF; + uint16_t a = read16(address); + uint16_t b = read16(address + 2); + return (a << 16) | b; } #define PLATFORM_CHECK_WRITE(a) \ @@ -571,262 +370,24 @@ void m68k_write_memory_8(unsigned int address, unsigned int value) { } } -// if (address < 0xffffff) { - address &=0xFFFFFF; - write8((uint32_t)address, value); - return; -// } - -// return; + address &=0xFFFFFF; + write8((uint32_t)address, value); + return; } void m68k_write_memory_16(unsigned int address, unsigned int value) { PLATFORM_CHECK_WRITE(OP_TYPE_WORD); -// if (address < 0xffffff) { - address &=0xFFFFFF; - write16((uint32_t)address, value); - return; -// } -// return; + address &=0xFFFFFF; + write16((uint32_t)address, value); + return; } void m68k_write_memory_32(unsigned int address, unsigned int value) { PLATFORM_CHECK_WRITE(OP_TYPE_LONGWORD); -// if (address < 0xffffff) { - address &=0xFFFFFF; - write16(address, value >> 16); - write16(address + 2, value); - return; -// } - -// return; -} - -inline void write16(uint32_t address, uint32_t data) { - uint32_t addr_h_s = (address & 0x0000ffff) << 8; - uint32_t addr_h_r = (~address & 0x0000ffff) << 8; - uint32_t addr_l_s = (address >> 16) << 8; - uint32_t addr_l_r = (~address >> 16) << 8; - uint32_t data_s = (data & 0x0000ffff) << 8; - uint32_t data_r = (~data & 0x0000ffff) << 8; - - // asm volatile ("dmb" ::: "memory"); - W16 - *(gpio) = gpfsel0_o; - *(gpio + 1) = gpfsel1_o; - *(gpio + 2) = gpfsel2_o; - - *(gpio + 7) = addr_h_s; - *(gpio + 10) = addr_h_r; - GPIO_CLR = 1 << 7; - GPIO_SET = 1 << 7; - - *(gpio + 7) = addr_l_s; - *(gpio + 10) = addr_l_r; - GPIO_CLR = 1 << 7; - GPIO_SET = 1 << 7; - - // write phase - *(gpio + 7) = data_s; - *(gpio + 10) = data_r; - GPIO_CLR = 1 << 7; - GPIO_SET = 1 << 7; - - *(gpio) = gpfsel0; - *(gpio + 1) = gpfsel1; - *(gpio + 2) = gpfsel2; - while ((GET_GPIO(0))) - ; - // asm volatile ("dmb" ::: "memory"); -} - -inline void write8(uint32_t address, uint32_t data) { - if ((address & 1) == 0) - data = data + (data << 8); // EVEN, A0=0,UDS - else - data = data & 0xff; // ODD , A0=1,LDS - uint32_t addr_h_s = (address & 0x0000ffff) << 8; - uint32_t addr_h_r = (~address & 0x0000ffff) << 8; - uint32_t addr_l_s = (address >> 16) << 8; - uint32_t addr_l_r = (~address >> 16) << 8; - uint32_t data_s = (data & 0x0000ffff) << 8; - uint32_t data_r = (~data & 0x0000ffff) << 8; - - // asm volatile ("dmb" ::: "memory"); - W8 - *(gpio) = gpfsel0_o; - *(gpio + 1) = gpfsel1_o; - *(gpio + 2) = gpfsel2_o; - - *(gpio + 7) = addr_h_s; - *(gpio + 10) = addr_h_r; - GPIO_CLR = 1 << 7; - GPIO_SET = 1 << 7; - - *(gpio + 7) = addr_l_s; - *(gpio + 10) = addr_l_r; - GPIO_CLR = 1 << 7; - GPIO_SET = 1 << 7; - - // write phase - *(gpio + 7) = data_s; - *(gpio + 10) = data_r; - GPIO_CLR = 1 << 7; - GPIO_SET = 1 << 7; - - *(gpio) = gpfsel0; - *(gpio + 1) = gpfsel1; - *(gpio + 2) = gpfsel2; - while ((GET_GPIO(0))) - ; - // asm volatile ("dmb" ::: "memory"); -} - -inline uint32_t read16(uint32_t address) { - volatile int val; - uint32_t addr_h_s = (address & 0x0000ffff) << 8; - uint32_t addr_h_r = (~address & 0x0000ffff) << 8; - uint32_t addr_l_s = (address >> 16) << 8; - uint32_t addr_l_r = (~address >> 16) << 8; - - // asm volatile ("dmb" ::: "memory"); - R16 - *(gpio) = gpfsel0_o; - *(gpio + 1) = gpfsel1_o; - *(gpio + 2) = gpfsel2_o; - - *(gpio + 7) = addr_h_s; - *(gpio + 10) = addr_h_r; - GPIO_CLR = 1 << 7; - GPIO_SET = 1 << 7; - - *(gpio + 7) = addr_l_s; - *(gpio + 10) = addr_l_r; - GPIO_CLR = 1 << 7; - GPIO_SET = 1 << 7; - - // read phase - *(gpio) = gpfsel0; - *(gpio + 1) = gpfsel1; - *(gpio + 2) = gpfsel2; - GPIO_CLR = 1 << 6; - while (!(GET_GPIO(0))) - ; - GPIO_CLR = 1 << 6; - val = *(gpio + 13); - GPIO_SET = 1 << 6; - // asm volatile ("dmb" ::: "memory"); - return (val >> 8) & 0xffff; -} - -inline uint32_t read8(uint32_t address) { - int val; - uint32_t addr_h_s = (address & 0x0000ffff) << 8; - uint32_t addr_h_r = (~address & 0x0000ffff) << 8; - uint32_t addr_l_s = (address >> 16) << 8; - uint32_t addr_l_r = (~address >> 16) << 8; - - // asm volatile ("dmb" ::: "memory"); - R8 - *(gpio) = gpfsel0_o; - *(gpio + 1) = gpfsel1_o; - *(gpio + 2) = gpfsel2_o; - - *(gpio + 7) = addr_h_s; - *(gpio + 10) = addr_h_r; - GPIO_CLR = 1 << 7; - GPIO_SET = 1 << 7; - - *(gpio + 7) = addr_l_s; - *(gpio + 10) = addr_l_r; - GPIO_CLR = 1 << 7; - GPIO_SET = 1 << 7; - - // read phase - *(gpio) = gpfsel0; - *(gpio + 1) = gpfsel1; - *(gpio + 2) = gpfsel2; - - GPIO_CLR = 1 << 6; - while (!(GET_GPIO(0))) - ; - GPIO_CLR = 1 << 6; - val = *(gpio + 13); - GPIO_SET = 1 << 6; - // asm volatile ("dmb" ::: "memory"); - - val = (val >> 8) & 0xffff; - if ((address & 1) == 0) - return (val >> 8) & 0xff; // EVEN, A0=0,UDS - else - return val & 0xff; // ODD , A0=1,LDS -} - -/******************************************************/ - -void write_reg(unsigned int value) { - STATUSREGADDR - *(gpio) = gpfsel0_o; - *(gpio + 1) = gpfsel1_o; - *(gpio + 2) = gpfsel2_o; - *(gpio + 7) = (value & 0xffff) << 8; - *(gpio + 10) = (~value & 0xffff) << 8; - GPIO_CLR = 1 << 7; - GPIO_CLR = 1 << 7; // delay - GPIO_SET = 1 << 7; - GPIO_SET = 1 << 7; - // Bus HIGH-Z - *(gpio) = gpfsel0; - *(gpio + 1) = gpfsel1; - *(gpio + 2) = gpfsel2; + address &=0xFFFFFF; + write16(address, value >> 16); + write16(address + 2, value); + return; } - -uint16_t read_reg(void) { - uint32_t val; - STATUSREGADDR - // Bus HIGH-Z - *(gpio) = gpfsel0; - *(gpio + 1) = gpfsel1; - *(gpio + 2) = gpfsel2; - GPIO_CLR = 1 << 6; - GPIO_CLR = 1 << 6; // delay - GPIO_CLR = 1 << 6; - GPIO_CLR = 1 << 6; - val = *(gpio + 13); - GPIO_SET = 1 << 6; - return (uint16_t)(val >> 8); -} - -// -// Set up a memory regions to access GPIO -// -void setup_io() { - /* open /dev/mem */ - if ((mem_fd = open("/dev/mem", O_RDWR | O_SYNC)) < 0) { - printf("can't open /dev/mem \n"); - exit(-1); - } - - /* mmap GPIO */ - gpio_map = mmap( - NULL, // Any adddress in our space will do - BCM2708_PERI_SIZE, // Map length - PROT_READ | PROT_WRITE, // Enable reading & writting to mapped memory - MAP_SHARED, // Shared with other processes - mem_fd, // File to map - BCM2708_PERI_BASE // Offset to GPIO peripheral - ); - - close(mem_fd); // No need to keep mem_fd open after mmap - - if (gpio_map == MAP_FAILED) { - printf("gpio mmap error %d\n", (int)gpio_map); // errno also set! - exit(-1); - } - - gpio = ((volatile unsigned *)gpio_map) + GPIO_ADDR / 4; - gpclk = ((volatile unsigned *)gpio_map) + GPCLK_ADDR / 4; - -} // setup_io diff --git a/gpio/gpio.c b/gpio/gpio.c new file mode 100644 index 0000000..2f8eae4 --- /dev/null +++ b/gpio/gpio.c @@ -0,0 +1,357 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../m68k.h" +#include "gpio.h" +#include "../platforms/amiga/Gayle.h" + +// I/O access +volatile unsigned int *gpio; +volatile unsigned int *gpclk; +volatile unsigned int gpfsel0; +volatile unsigned int gpfsel1; +volatile unsigned int gpfsel2; +volatile unsigned int gpfsel0_o; +volatile unsigned int gpfsel1_o; +volatile unsigned int gpfsel2_o; + +volatile uint16_t srdata; +volatile uint32_t srdata2; +volatile uint32_t srdata2_old; + +extern int mem_fd, mouse_fd, keyboard_fd; +extern int mem_fd_gpclk; + +void *gpio_map; +void *gpclk_map; + +unsigned char toggle; + +static int g = 0; + +inline void write16(uint32_t address, uint32_t data) { + uint32_t addr_h_s = (address & 0x0000ffff) << 8; + uint32_t addr_h_r = (~address & 0x0000ffff) << 8; + uint32_t addr_l_s = (address >> 16) << 8; + uint32_t addr_l_r = (~address >> 16) << 8; + uint32_t data_s = (data & 0x0000ffff) << 8; + uint32_t data_r = (~data & 0x0000ffff) << 8; + + // asm volatile ("dmb" ::: "memory"); + W16 + *(gpio) = gpfsel0_o; + *(gpio + 1) = gpfsel1_o; + *(gpio + 2) = gpfsel2_o; + + *(gpio + 7) = addr_h_s; + *(gpio + 10) = addr_h_r; + GPIO_CLR = 1 << 7; + GPIO_SET = 1 << 7; + + *(gpio + 7) = addr_l_s; + *(gpio + 10) = addr_l_r; + GPIO_CLR = 1 << 7; + GPIO_SET = 1 << 7; + + // write phase + *(gpio + 7) = data_s; + *(gpio + 10) = data_r; + GPIO_CLR = 1 << 7; + GPIO_SET = 1 << 7; + + *(gpio) = gpfsel0; + *(gpio + 1) = gpfsel1; + *(gpio + 2) = gpfsel2; + while ((GET_GPIO(0))) + ; + // asm volatile ("dmb" ::: "memory"); +} + +inline void write8(uint32_t address, uint32_t data) { + if ((address & 1) == 0) + data = data + (data << 8); // EVEN, A0=0,UDS + else + data = data & 0xff; // ODD , A0=1,LDS + uint32_t addr_h_s = (address & 0x0000ffff) << 8; + uint32_t addr_h_r = (~address & 0x0000ffff) << 8; + uint32_t addr_l_s = (address >> 16) << 8; + uint32_t addr_l_r = (~address >> 16) << 8; + uint32_t data_s = (data & 0x0000ffff) << 8; + uint32_t data_r = (~data & 0x0000ffff) << 8; + + // asm volatile ("dmb" ::: "memory"); + W8 + *(gpio) = gpfsel0_o; + *(gpio + 1) = gpfsel1_o; + *(gpio + 2) = gpfsel2_o; + + *(gpio + 7) = addr_h_s; + *(gpio + 10) = addr_h_r; + GPIO_CLR = 1 << 7; + GPIO_SET = 1 << 7; + + *(gpio + 7) = addr_l_s; + *(gpio + 10) = addr_l_r; + GPIO_CLR = 1 << 7; + GPIO_SET = 1 << 7; + + // write phase + *(gpio + 7) = data_s; + *(gpio + 10) = data_r; + GPIO_CLR = 1 << 7; + GPIO_SET = 1 << 7; + + *(gpio) = gpfsel0; + *(gpio + 1) = gpfsel1; + *(gpio + 2) = gpfsel2; + while ((GET_GPIO(0))) + ; + // asm volatile ("dmb" ::: "memory"); +} + +inline uint32_t read16(uint32_t address) { + volatile int val; + uint32_t addr_h_s = (address & 0x0000ffff) << 8; + uint32_t addr_h_r = (~address & 0x0000ffff) << 8; + uint32_t addr_l_s = (address >> 16) << 8; + uint32_t addr_l_r = (~address >> 16) << 8; + + // asm volatile ("dmb" ::: "memory"); + R16 + *(gpio) = gpfsel0_o; + *(gpio + 1) = gpfsel1_o; + *(gpio + 2) = gpfsel2_o; + + *(gpio + 7) = addr_h_s; + *(gpio + 10) = addr_h_r; + GPIO_CLR = 1 << 7; + GPIO_SET = 1 << 7; + + *(gpio + 7) = addr_l_s; + *(gpio + 10) = addr_l_r; + GPIO_CLR = 1 << 7; + GPIO_SET = 1 << 7; + + // read phase + *(gpio) = gpfsel0; + *(gpio + 1) = gpfsel1; + *(gpio + 2) = gpfsel2; + GPIO_CLR = 1 << 6; + while (!(GET_GPIO(0))) + ; + GPIO_CLR = 1 << 6; + val = *(gpio + 13); + GPIO_SET = 1 << 6; + // asm volatile ("dmb" ::: "memory"); + return (val >> 8) & 0xffff; +} + +inline uint32_t read8(uint32_t address) { + int val; + uint32_t addr_h_s = (address & 0x0000ffff) << 8; + uint32_t addr_h_r = (~address & 0x0000ffff) << 8; + uint32_t addr_l_s = (address >> 16) << 8; + uint32_t addr_l_r = (~address >> 16) << 8; + + // asm volatile ("dmb" ::: "memory"); + R8 + *(gpio) = gpfsel0_o; + *(gpio + 1) = gpfsel1_o; + *(gpio + 2) = gpfsel2_o; + + *(gpio + 7) = addr_h_s; + *(gpio + 10) = addr_h_r; + GPIO_CLR = 1 << 7; + GPIO_SET = 1 << 7; + + *(gpio + 7) = addr_l_s; + *(gpio + 10) = addr_l_r; + GPIO_CLR = 1 << 7; + GPIO_SET = 1 << 7; + + // read phase + *(gpio) = gpfsel0; + *(gpio + 1) = gpfsel1; + *(gpio + 2) = gpfsel2; + + GPIO_CLR = 1 << 6; + while (!(GET_GPIO(0))) + ; + GPIO_CLR = 1 << 6; + val = *(gpio + 13); + GPIO_SET = 1 << 6; + // asm volatile ("dmb" ::: "memory"); + + val = (val >> 8) & 0xffff; + if ((address & 1) == 0) + return (val >> 8) & 0xff; // EVEN, A0=0,UDS + else + return val & 0xff; // ODD , A0=1,LDS +} + +/******************************************************/ + +void write_reg(unsigned int value) { + STATUSREGADDR + *(gpio) = gpfsel0_o; + *(gpio + 1) = gpfsel1_o; + *(gpio + 2) = gpfsel2_o; + *(gpio + 7) = (value & 0xffff) << 8; + *(gpio + 10) = (~value & 0xffff) << 8; + GPIO_CLR = 1 << 7; + GPIO_CLR = 1 << 7; // delay + GPIO_SET = 1 << 7; + GPIO_SET = 1 << 7; + // Bus HIGH-Z + *(gpio) = gpfsel0; + *(gpio + 1) = gpfsel1; + *(gpio + 2) = gpfsel2; +} + +uint16_t read_reg(void) { + uint32_t val; + STATUSREGADDR + // Bus HIGH-Z + *(gpio) = gpfsel0; + *(gpio + 1) = gpfsel1; + *(gpio + 2) = gpfsel2; + GPIO_CLR = 1 << 6; + GPIO_CLR = 1 << 6; // delay + GPIO_CLR = 1 << 6; + GPIO_CLR = 1 << 6; + val = *(gpio + 13); + GPIO_SET = 1 << 6; + return (uint16_t)(val >> 8); +} + +// +// Set up a memory regions to access GPIO +// +void setup_io() { + /* open /dev/mem */ + if ((mem_fd = open("/dev/mem", O_RDWR | O_SYNC)) < 0) { + printf("can't open /dev/mem \n"); + exit(-1); + } + + /* mmap GPIO */ + gpio_map = mmap( + NULL, // Any adddress in our space will do + BCM2708_PERI_SIZE, // Map length + PROT_READ | PROT_WRITE, // Enable reading & writting to mapped memory + MAP_SHARED, // Shared with other processes + mem_fd, // File to map + BCM2708_PERI_BASE // Offset to GPIO peripheral + ); + + close(mem_fd); // No need to keep mem_fd open after mmap + + if (gpio_map == MAP_FAILED) { + printf("gpio mmap error %d\n", (int)gpio_map); // errno also set! + exit(-1); + } + + gpio = ((volatile unsigned *)gpio_map) + GPIO_ADDR / 4; + gpclk = ((volatile unsigned *)gpio_map) + GPCLK_ADDR / 4; + +} // setup_io + +void gpio_enable_200mhz() { + *(gpclk + (CLK_GP0_CTL / 4)) = CLK_PASSWD | (1 << 5); + usleep(10); + while ((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7)) + ; + usleep(100); + *(gpclk + (CLK_GP0_DIV / 4)) = + CLK_PASSWD | (6 << 12); // divider , 6=200MHz on pi3 + usleep(10); + *(gpclk + (CLK_GP0_CTL / 4)) = + CLK_PASSWD | 5 | (1 << 4); // pll? 6=plld, 5=pllc + usleep(10); + while (((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7)) == 0) + ; + usleep(100); + + SET_GPIO_ALT(4, 0); // gpclk0 + + // set SA to output + INP_GPIO(2); + OUT_GPIO(2); + INP_GPIO(3); + OUT_GPIO(3); + INP_GPIO(5); + OUT_GPIO(5); + + // set gpio0 (aux0) and gpio1 (aux1) to input + INP_GPIO(0); + INP_GPIO(1); + + // Set GPIO pins 6,7 and 8-23 to output + for (g = 6; g <= 23; g++) { + INP_GPIO(g); + OUT_GPIO(g); + } + printf("Precalculate GPIO8-23 as Output\n"); + gpfsel0_o = *(gpio); // store gpio ddr + printf("gpfsel0: %#x\n", gpfsel0_o); + gpfsel1_o = *(gpio + 1); // store gpio ddr + printf("gpfsel1: %#x\n", gpfsel1_o); + gpfsel2_o = *(gpio + 2); // store gpio ddr + printf("gpfsel2: %#x\n", gpfsel2_o); + + // Set GPIO pins 8-23 to input + for (g = 8; g <= 23; g++) { + INP_GPIO(g); + } + printf("Precalculate GPIO8-23 as Input\n"); + gpfsel0 = *(gpio); // store gpio ddr + printf("gpfsel0: %#x\n", gpfsel0); + gpfsel1 = *(gpio + 1); // store gpio ddr + printf("gpfsel1: %#x\n", gpfsel1); + gpfsel2 = *(gpio + 2); // store gpio ddr + printf("gpfsel2: %#x\n", gpfsel2); + + GPIO_CLR = 1 << 2; + GPIO_CLR = 1 << 3; + GPIO_SET = 1 << 5; + + GPIO_SET = 1 << 6; + GPIO_SET = 1 << 7; +} + +void gpio_handle_irq() { + if (GET_GPIO(1) == 0) { + srdata = read_reg(); + m68k_set_irq((srdata >> 13) & 0xff); + } else { + if (CheckIrq() == 1) { + write16(0xdff09c, 0x8008); + m68k_set_irq(2); + } + else + m68k_set_irq(0); + }; +} + +void *iplThread(void *args) { + printf("IPL thread running/n"); + + while (42) { + + if (GET_GPIO(1) == 0) { + toggle = 1; + m68k_end_timeslice(); + //printf("thread!/n"); + } else { + toggle = 0; + }; + usleep(1); + } + +} \ No newline at end of file diff --git a/gpio/gpio.h b/gpio/gpio.h new file mode 100644 index 0000000..398aafd --- /dev/null +++ b/gpio/gpio.h @@ -0,0 +1,86 @@ +//#define BCM2708_PERI_BASE 0x20000000 //pi0-1 +//#define BCM2708_PERI_BASE 0xFE000000 //pi4 +#define BCM2708_PERI_BASE 0x3F000000 // pi3 +#define BCM2708_PERI_SIZE 0x01000000 +#define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO controller */ +#define GPCLK_BASE (BCM2708_PERI_BASE + 0x101000) +#define GPIO_ADDR 0x200000 /* GPIO controller */ +#define GPCLK_ADDR 0x101000 +#define CLK_PASSWD 0x5a000000 +#define CLK_GP0_CTL 0x070 +#define CLK_GP0_DIV 0x074 + +#define SA0 5 +#define SA1 3 +#define SA2 2 + +#define STATUSREGADDR \ + GPIO_CLR = 1 << SA0; \ + GPIO_CLR = 1 << SA1; \ + GPIO_SET = 1 << SA2; +#define W16 \ + GPIO_CLR = 1 << SA0; \ + GPIO_CLR = 1 << SA1; \ + GPIO_CLR = 1 << SA2; +#define R16 \ + GPIO_SET = 1 << SA0; \ + GPIO_CLR = 1 << SA1; \ + GPIO_CLR = 1 << SA2; +#define W8 \ + GPIO_CLR = 1 << SA0; \ + GPIO_SET = 1 << SA1; \ + GPIO_CLR = 1 << SA2; +#define R8 \ + GPIO_SET = 1 << SA0; \ + GPIO_SET = 1 << SA1; \ + GPIO_CLR = 1 << SA2; + +#define PAGE_SIZE (4 * 1024) +#define BLOCK_SIZE (4 * 1024) + +#define GPIOSET(no, ishigh) \ + do { \ + if (ishigh) \ + set |= (1 << (no)); \ + else \ + reset |= (1 << (no)); \ + } while (0) + +#define JOY0DAT 0xDFF00A +#define JOY1DAT 0xDFF00C +#define CIAAPRA 0xBFE001 +#define POTGOR 0xDFF016 + +// GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x) or +// SET_GPIO_ALT(x,y) +#define INP_GPIO(g) *(gpio + ((g) / 10)) &= ~(7 << (((g) % 10) * 3)) +#define OUT_GPIO(g) *(gpio + ((g) / 10)) |= (1 << (((g) % 10) * 3)) +#define SET_GPIO_ALT(g, a) \ + *(gpio + (((g) / 10))) |= \ + (((a) <= 3 ? (a) + 4 : (a) == 4 ? 3 : 2) << (((g) % 10) * 3)) + +#define GPIO_SET \ + *(gpio + 7) // sets bits which are 1 ignores bits which are 0 +#define GPIO_CLR \ + *(gpio + 10) // clears bits which are 1 ignores bits which are 0 + +#define GET_GPIO(g) (*(gpio + 13) & (1 << g)) // 0 if LOW, (1< #define CHKRANGE(a, b, c) a >= (unsigned int)b && a < (unsigned int)(b + c) diff --git a/Gayle.c b/platforms/amiga/Gayle.c similarity index 98% rename from Gayle.c rename to platforms/amiga/Gayle.c index c238699..b518ecd 100644 --- a/Gayle.c +++ b/platforms/amiga/Gayle.c @@ -18,10 +18,12 @@ #include #include #include -#include "ide.h" -#include "config_file/config_file.h" -#include "platforms/amiga/amiga-registers.h" -#include "platforms/shared/rtc.h" + +#include "../shared/rtc.h" +#include "../../config_file/config_file.h" + +#include "gayle-ide/ide.h" +#include "amiga-registers.h" //#define GSTATUS 0xda201c //#define GCLOW 0xda2010 diff --git a/Gayle.h b/platforms/amiga/Gayle.h similarity index 99% rename from Gayle.h rename to platforms/amiga/Gayle.h index ffcab20..11d08eb 100644 --- a/Gayle.h +++ b/platforms/amiga/Gayle.h @@ -12,9 +12,6 @@ #include #include - - - uint8_t CheckIrq(void); void InitGayle(void); void writeGayleB(unsigned int address, unsigned value); diff --git a/platforms/amiga/amiga-registers.c b/platforms/amiga/amiga-registers.c index d5e3b69..88314a4 100644 --- a/platforms/amiga/amiga-registers.c +++ b/platforms/amiga/amiga-registers.c @@ -1,4 +1,4 @@ -#include "../../Gayle.h" +#include "Gayle.h" #include "../../config_file/config_file.h" #include "amiga-registers.h" diff --git a/ide.c b/platforms/amiga/gayle-ide/ide.c similarity index 100% rename from ide.c rename to platforms/amiga/gayle-ide/ide.c diff --git a/ide.h b/platforms/amiga/gayle-ide/ide.h similarity index 100% rename from ide.h rename to platforms/amiga/gayle-ide/ide.h