X-Git-Url: https://git.sesse.net/?p=stockfish;a=blobdiff_plain;f=src%2Ftypes.h;h=d81e7e80a33f3c391c9bf530996a3a61c2d40e71;hp=d91009df453748d6701ee607b177921368a7a60e;hb=0e800c527a9773ab986e185dae291695a4ca83ee;hpb=92bada1a32c7ebd5f5b4438bd85bb003d20bd046 diff --git a/src/types.h b/src/types.h index d91009df..d81e7e80 100644 --- a/src/types.h +++ b/src/types.h @@ -1,7 +1,7 @@ /* Stockfish, a UCI chess playing engine derived from Glaurung 2.1 Copyright (C) 2004-2008 Tord Romstad (Glaurung author) - Copyright (C) 2008-2009 Marco Costalba + Copyright (C) 2008-2010 Marco Costalba, Joona Kiiski, Tord Romstad Stockfish is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -49,20 +49,32 @@ typedef uint64_t Bitboard; //// -//// Compiler specific defines +//// Configuration //// -// Quiet a warning on Intel compiler -#if !defined(__SIZEOF_INT__ ) -#define __SIZEOF_INT__ 0 -#endif +//// For Linux and OSX configuration is done automatically using Makefile. +//// To get started type "make help". +//// +//// For windows part of the configuration is detected automatically, but +//// some switches need to be set manually: +//// +//// -DNDEBUG | Disable debugging mode. Use always. +//// +//// -DNO_PREFETCH | Disable use of prefetch asm-instruction. A must if you want the +//// | executable to run on some very old machines. +//// +//// -DUSE_POPCNT | Add runtime support for use of popcnt asm-instruction. +//// | Works only in 64-bit mode. For compiling requires hardware +//// | with popcnt support. Around 4% speed-up. -// Check for 64 bits for different compilers: Intel, MSVC and gcc -#if defined(__x86_64) || defined(_M_X64) || defined(_WIN64) || (__SIZEOF_INT__ > 4) +// Automatic detection for 64-bit under Windows +#if defined(_WIN64) #define IS_64BIT #endif -#if defined(IS_64BIT) && (defined(__GNUC__) || defined(__INTEL_COMPILER)) +// Automatic detection for use of bsfq asm-instruction under Windows. +// Works only in 64-bit mode. Does not work with MSVC. +#if defined(_WIN64) && defined(__INTEL_COMPILER) #define USE_BSFQ #endif @@ -75,20 +87,63 @@ typedef uint64_t Bitboard; // Define a __cpuid() function for gcc compilers, for Intel and MSVC // is already available as an intrinsic. -#if defined(__INTEL_COMPILER) -#include -#elif defined(_MSC_VER) +#if defined(_MSC_VER) #include -#elif defined(__GNUC__) -inline void __cpuid(unsigned int op, - unsigned int *eax, unsigned int *ebx, - unsigned int *ecx, unsigned int *edx) +#elif defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__)) +inline void __cpuid(int CPUInfo[4], int InfoType) { - *eax = op; + int* eax = CPUInfo + 0; + int* ebx = CPUInfo + 1; + int* ecx = CPUInfo + 2; + int* edx = CPUInfo + 3; + + *eax = InfoType; *ecx = 0; __asm__("cpuid" : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx) : "0" (*eax), "2" (*ecx)); } +#else +inline void __cpuid(int CPUInfo[4], int) +{ + CPUInfo[0] = CPUInfo[1] = CPUInfo[2] = CPUInfo[3] = 0; +} #endif + +// Templetized enum operations, we avoid to repeat the same inlines for each +// different enum. + +template +inline T operator+ (const T d1, const T d2) { return T(int(d1) + int(d2)); } + +template +inline T operator- (const T d1, const T d2) { return T(int(d1) - int(d2)); } + +template +inline T operator* (int i, const T d) { return T(int(d) * i); } + +template +inline T operator/ (const T d, int i) { return T(int(d) / i); } + +template +inline T operator- (const T d) { return T(-int(d)); } + +template +inline void operator++ (T& d, int) { d = T(int(d) + 1); } + +template +inline void operator-- (T& d, int) { d = T(int(d) - 1); } + +template +inline void operator+= (T& d1, const T d2) { d1 = d1 + d2; } + +template +inline void operator-= (T& d1, const T d2) { d1 = d1 - d2; } + +template +inline void operator*= (T& d, int i) { d = T(int(d) * i); } + +template +inline void operator/= (T &d, int i) { d = T(int(d) / i); } + #endif // !defined(TYPES_H_INCLUDED)