Use aligned prefetch address

Prefetch always form a chache line boundary. It seems
that if prefetch address is not cache line aligned then
performance is adversely impacted.

Hopefully we will resuse that 32 bits of padding for something
useful in the future.

Signed-off-by: Marco Costalba <mcostalba@gmail.com>

diff --git a/src/tt.cpp b/src/tt.cpp
index 862842f2639069b20a28593487207b74c755e884..770e38b779d932fa2dc8df26f19dab13f79f2a3c 100644 (file)
--- a/src/tt.cpp
+++ b/src/tt.cpp
@@ -34,7 +34,7 @@
 #endif
 
 // This is the number of TTEntry slots for each position
-static const int ClusterSize = 5;
+static const int ClusterSize = 4;
 
 // The main transposition table
 TranspositionTable TT;

diff --git a/src/tt.h b/src/tt.h
index 0b7ccbe8f948ecacc603b3d189c387c16d6b2008..e838b0902fb9c140c8cd7bea1c551a00d4878213 100644 (file)
--- a/src/tt.h
+++ b/src/tt.h
@@ -70,6 +70,7 @@ private:
   uint32_t data;
   int16_t value_;
   int16_t depth_;
+  uint32_t pad_to_16_bytes;
 };
 
 /// The transposition table class.  This is basically just a huge array