From: Anton Mitrofanov Date: Thu, 7 Apr 2016 09:48:29 +0000 (+0300) Subject: x86inc: Improve handling of %ifid with multi-token parameters X-Git-Url: https://git.sesse.net/?p=x264;a=commitdiff_plain;h=b5661d322866df647e6084061a471eceac214c28 x86inc: Improve handling of %ifid with multi-token parameters The yasm/nasm preprocessor only checks the first token, which means that parameters such as `dword [rax]` are treated as identifiers, which is generally not what we want. --- diff --git a/common/x86/deblock-a.asm b/common/x86/deblock-a.asm index 95a1930f..e7a82406 100644 --- a/common/x86/deblock-a.asm +++ b/common/x86/deblock-a.asm @@ -423,7 +423,7 @@ DEBLOCK_LUMA_64 %endif %macro SWAPMOVA 2 -%ifid %1 +%ifnum sizeof%1 SWAP %1, %2 %else mova %1, %2 diff --git a/common/x86/pixel-a.asm b/common/x86/pixel-a.asm index 10c082c9..cf606184 100644 --- a/common/x86/pixel-a.asm +++ b/common/x86/pixel-a.asm @@ -2320,7 +2320,7 @@ cglobal hadamard_load ; clobber: m1..m3 %macro SUM4x3 3 ; dc, left, top movq m4, %2 -%ifid %1 +%ifnum sizeof%1 movq m5, %1 %else movd m5, %1 @@ -2597,7 +2597,7 @@ cglobal intra_satd_x3_8x8c, 0,6 %macro PRED4x4_LOWPASS 5 -%ifid %5 +%ifnum sizeof%5 pavgb %5, %2, %3 pxor %3, %2 pand %3, [pb_1] diff --git a/common/x86/x86inc.asm b/common/x86/x86inc.asm index 3be097f7..23134042 100644 --- a/common/x86/x86inc.asm +++ b/common/x86/x86inc.asm @@ -1131,7 +1131,7 @@ INIT_XMM CHECK_AVX_INSTR_EMU {%1 %6, %7, %8}, %6, %8 %endif %if %5 && %4 == 0 - %ifnid %8 + %ifnnum sizeof%8 ; 3-operand AVX instructions with a memory arg can only have it in src2, ; whereas SSE emulation prefers to have it in src1 (i.e. the mov). ; So, if the instruction is commutative with a memory arg, swap them. @@ -1491,7 +1491,7 @@ FMA_INSTR pmadcswd, pmaddwd, paddd v%5%6 %1, %2, %3, %4 %elifidn %1, %2 ; If %3 or %4 is a memory operand it needs to be encoded as the last operand. - %ifid %3 + %ifnum sizeof%3 v%{5}213%6 %2, %3, %4 %else v%{5}132%6 %2, %4, %3