11 #include "platforms/amiga/Gayle.h"
12 #include "platforms/amiga/gayle-ide/ide.h"
16 volatile unsigned int *gpio;
17 volatile unsigned int *gpclk;
18 volatile unsigned int gpfsel0;
19 volatile unsigned int gpfsel1;
20 volatile unsigned int gpfsel2;
21 volatile unsigned int gpfsel0_o;
22 volatile unsigned int gpfsel1_o;
23 volatile unsigned int gpfsel2_o;
25 volatile uint16_t srdata;
26 volatile uint32_t srdata2;
27 volatile uint32_t srdata2_old;
29 extern int mem_fd, mouse_fd, keyboard_fd;
30 extern int mem_fd_gpclk;
31 extern uint8_t gayle_int;
40 inline void write16(uint32_t address, uint32_t data) {
41 // asm volatile ("dmb" ::: "memory");
44 *(gpio + 1) = gpfsel1_o;
45 *(gpio + 2) = gpfsel2_o;
47 *(gpio + 7) = ((address & 0x0000ffff) << 8);
48 *(gpio + 10) = ((~address & 0x0000ffff) << 8);
52 *(gpio + 7) = ((address >> 16) << 8);
53 *(gpio + 10) = ((~address >> 16) << 8);
58 *(gpio + 7) = ((data & 0x0000ffff) << 8);
59 *(gpio + 10) = ((~data & 0x0000ffff) << 8);
64 *(gpio + 1) = gpfsel1;
65 *(gpio + 2) = gpfsel2;
68 // asm volatile ("dmb" ::: "memory");
71 inline void write8(uint32_t address, uint32_t data) {
72 if ((address & 1) == 0)
73 data = data + (data << 8); // EVEN, A0=0,UDS
75 data = data & 0xff; // ODD , A0=1,LDS
77 // asm volatile ("dmb" ::: "memory");
80 *(gpio + 1) = gpfsel1_o;
81 *(gpio + 2) = gpfsel2_o;
83 *(gpio + 7) = ((address & 0x0000ffff) << 8);
84 *(gpio + 10) = ((~address & 0x0000ffff) << 8);
88 *(gpio + 7) = ((address >> 16) << 8);
89 *(gpio + 10) = ((~address >> 16) << 8);
94 *(gpio + 7) = ((data & 0x0000ffff) << 8);
95 *(gpio + 10) = ((~data & 0x0000ffff) << 8);
100 *(gpio + 1) = gpfsel1;
101 *(gpio + 2) = gpfsel2;
102 while ((GET_GPIO(0)))
104 // asm volatile ("dmb" ::: "memory");
107 inline uint32_t read32(uint32_t address) {
111 asm volatile ("dmb" ::: "memory");
114 *(gpio + 1) = gpfsel1_o;
115 *(gpio + 2) = gpfsel2_o;
117 *(gpio + 7) = ((address & 0x0000ffff) << 8);
118 *(gpio + 10) = ((~address & 0x0000ffff) << 8);
123 *(gpio + 7) = ((address >> 16) << 8);
124 *(gpio + 10) = ((~address >> 16) << 8);
130 *(gpio + 1) = gpfsel1;
131 *(gpio + 2) = gpfsel2;
133 while (!(GET_GPIO(0)))
139 // asm volatile ("dmb" ::: "memory");
140 a = (val >> 8) & 0xffff;
144 *(gpio + 1) = gpfsel1_o;
145 *(gpio + 2) = gpfsel2_o;
147 *(gpio + 7) = (((address+2) & 0x0000ffff) << 8);
148 *(gpio + 10) = ((~(address+2) & 0x0000ffff) << 8);
153 *(gpio + 7) = (((address+2) >> 16) << 8);
154 *(gpio + 10) = ((~(address+2) >> 16) << 8);
160 *(gpio + 1) = gpfsel1;
161 *(gpio + 2) = gpfsel2;
163 while (!(GET_GPIO(0)))
169 b = (val >> 8) & 0xffff;
170 asm volatile ("dmb" ::: "memory");
172 return (a << 16) | b;
175 inline uint32_t read16(uint32_t address) {
177 // asm volatile ("dmb" ::: "memory");
180 *(gpio + 1) = gpfsel1_o;
181 *(gpio + 2) = gpfsel2_o;
183 *(gpio + 7) = ((address & 0x0000ffff) << 8);
184 *(gpio + 10) = ((~address & 0x0000ffff) << 8);
189 *(gpio + 7) = ((address >> 16) << 8);
190 *(gpio + 10) = ((~address >> 16) << 8);
196 *(gpio + 1) = gpfsel1;
197 *(gpio + 2) = gpfsel2;
199 while (!(GET_GPIO(0)))
204 // asm volatile ("dmb" ::: "memory");
205 return (val >> 8) & 0xffff;
208 inline uint32_t read8(uint32_t address) {
210 // asm volatile ("dmb" ::: "memory");
213 *(gpio + 1) = gpfsel1_o;
214 *(gpio + 2) = gpfsel2_o;
216 *(gpio + 7) = ((address & 0x0000ffff) << 8);
217 *(gpio + 10) = ((~address & 0x0000ffff) << 8);
221 *(gpio + 7) = ((address >> 16) << 8);
222 *(gpio + 10) = ((~address >> 16) << 8);
228 *(gpio + 1) = gpfsel1;
229 *(gpio + 2) = gpfsel2;
232 while (!(GET_GPIO(0)))
237 // asm volatile ("dmb" ::: "memory");
239 val = (val >> 8) & 0xffff;
240 if ((address & 1) == 0)
241 return (val >> 8) & 0xff; // EVEN, A0=0,UDS
243 return val & 0xff; // ODD , A0=1,LDS
246 /******************************************************/
248 void write_reg(unsigned int value) {
251 *(gpio + 1) = gpfsel1_o;
252 *(gpio + 2) = gpfsel2_o;
253 *(gpio + 7) = (value & 0xffff) << 8;
254 *(gpio + 10) = (~value & 0xffff) << 8;
256 GPIO_CLR = 1 << 7; // delay
261 *(gpio + 1) = gpfsel1;
262 *(gpio + 2) = gpfsel2;
265 uint16_t read_reg(void) {
270 *(gpio + 1) = gpfsel1;
271 *(gpio + 2) = gpfsel2;
273 GPIO_CLR = 1 << 6; // delay
278 return (uint16_t)(val >> 8);
282 // Set up a memory regions to access GPIO
286 if ((mem_fd = open("/dev/mem", O_RDWR | O_SYNC)) < 0) {
287 printf("can't open /dev/mem \n");
293 NULL, // Any adddress in our space will do
294 BCM2708_PERI_SIZE, // Map length
295 PROT_READ | PROT_WRITE, // Enable reading & writting to mapped memory
296 MAP_SHARED, // Shared with other processes
297 mem_fd, // File to map
298 BCM2708_PERI_BASE // Offset to GPIO peripheral
301 close(mem_fd); // No need to keep mem_fd open after mmap
303 if (gpio_map == MAP_FAILED) {
304 printf("gpio mmap error %d\n", (int)gpio_map); // errno also set!
308 gpio = ((volatile unsigned *)gpio_map) + GPIO_ADDR / 4;
309 gpclk = ((volatile unsigned *)gpio_map) + GPCLK_ADDR / 4;
313 void gpio_enable_200mhz() {
314 *(gpclk + (CLK_GP0_CTL / 4)) = CLK_PASSWD | (1 << 5);
316 while ((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7))
319 *(gpclk + (CLK_GP0_DIV / 4)) =
320 CLK_PASSWD | (6 << 12); // divider , 6=200MHz on pi3
322 *(gpclk + (CLK_GP0_CTL / 4)) =
323 CLK_PASSWD | 5 | (1 << 4); // pll? 6=plld, 5=pllc
325 while (((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7)) == 0)
329 SET_GPIO_ALT(4, 0); // gpclk0
339 // set gpio0 (aux0) and gpio1 (aux1) to input
343 // Set GPIO pins 6,7 and 8-23 to output
344 for (g = 6; g <= 23; g++) {
348 printf("Precalculate GPIO8-23 as Output\n");
349 gpfsel0_o = *(gpio); // store gpio ddr
350 printf("gpfsel0: %#x\n", gpfsel0_o);
351 gpfsel1_o = *(gpio + 1); // store gpio ddr
352 printf("gpfsel1: %#x\n", gpfsel1_o);
353 gpfsel2_o = *(gpio + 2); // store gpio ddr
354 printf("gpfsel2: %#x\n", gpfsel2_o);
356 // Set GPIO pins 8-23 to input
357 for (g = 8; g <= 23; g++) {
360 printf("Precalculate GPIO8-23 as Input\n");
361 gpfsel0 = *(gpio); // store gpio ddr
362 printf("gpfsel0: %#x\n", gpfsel0);
363 gpfsel1 = *(gpio + 1); // store gpio ddr
364 printf("gpfsel1: %#x\n", gpfsel1);
365 gpfsel2 = *(gpio + 2); // store gpio ddr
366 printf("gpfsel2: %#x\n", gpfsel2);
376 inline void gpio_handle_irq() {
377 if (GET_GPIO(1) == 0) {
379 m68k_set_irq((srdata >> 13) & 0xff);
381 if ((gayle_int & 0x80) && (get_ide(0)->drive[0].intrq || get_ide(0)->drive[1].intrq)) {
382 write16(0xdff09c, 0x8008);
390 inline int gpio_get_irq() {
391 return (GET_GPIO(1));