1 // SPDX-License-Identifier: MIT
4 Code reorganized and rewritten by
5 Niklas Ekström 2021 (https://github.com/niklasekstrom)
11 #define PIN_TXN_IN_PROGRESS 0
12 #define PIN_IPL_ZERO 1
19 #define PIN_D(x) (8 + x)
26 #define STATUS_BIT_INIT 1
27 #define STATUS_BIT_RESET 2
29 #define STATUS_MASK_IPL 0xe000
30 #define STATUS_SHIFT_IPL 13
32 //#define BCM2708_PERI_BASE 0x20000000 // pi0-1
33 //#define BCM2708_PERI_BASE 0xFE000000 // pi4
34 #define BCM2708_PERI_BASE 0x3F000000 // pi3
35 #define BCM2708_PERI_SIZE 0x01000000
37 #define GPIO_ADDR 0x200000 /* GPIO controller */
38 #define GPCLK_ADDR 0x101000
40 #define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO controller */
41 #define GPCLK_BASE (BCM2708_PERI_BASE + 0x101000)
43 #define CLK_PASSWD 0x5a000000
44 #define CLK_GP0_CTL 0x070
45 #define CLK_GP0_DIV 0x074
47 // GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x) or
49 #define INP_GPIO(g) *(gpio + ((g) / 10)) &= ~(7 << (((g) % 10) * 3))
50 #define OUT_GPIO(g) *(gpio + ((g) / 10)) |= (1 << (((g) % 10) * 3))
51 #define SET_GPIO_ALT(g, a) \
52 *(gpio + (((g) / 10))) |= \
53 (((a) <= 3 ? (a) + 4 : (a) == 4 ? 3 : 2) << (((g) % 10) * 3))
55 #define GPIO_PULL *(gpio + 37) // Pull up/pull down
56 #define GPIO_PULLCLK0 *(gpio + 38) // Pull up/pull down clock
58 #define GPFSEL0_INPUT 0x0024c240
59 #define GPFSEL1_INPUT 0x00000000
60 #define GPFSEL2_INPUT 0x00000000
62 #define GPFSEL0_OUTPUT 0x0924c240
63 #define GPFSEL1_OUTPUT 0x09249249
64 #define GPFSEL2_OUTPUT 0x00000249
66 unsigned int ps_read_8(unsigned int address);
67 unsigned int ps_read_16(unsigned int address);
68 unsigned int ps_read_32(unsigned int address);
70 void ps_write_8(unsigned int address, unsigned int data);
71 void ps_write_16(unsigned int address, unsigned int data);
72 void ps_write_32(unsigned int address, unsigned int data);
74 unsigned int ps_read_status_reg();
75 void ps_write_status_reg(unsigned int value);
77 void ps_setup_protocol();
78 void ps_reset_state_machine();
79 void ps_pulse_reset();
81 unsigned int ps_get_ipl_zero();
83 #define read8 ps_read_8
84 #define read16 ps_read_16
85 #define read32 ps_read_32
87 #define write8 ps_write_8
88 #define write16 ps_write_16
89 #define write32 ps_write_32
91 #define write_reg ps_write_status_reg
92 #define read_reg ps_read_status_reg
94 #define gpio_get_irq ps_get_ipl_zero
96 #endif /* _PS_PROTOCOL_H */