1 ;*****************************************************************************
2 ;* x86inc.asm: x264asm abstraction layer
3 ;*****************************************************************************
4 ;* Copyright (C) 2005-2011 x264 project
6 ;* Authors: Loren Merritt <lorenm@u.washington.edu>
7 ;* Anton Mitrofanov <BugMaster@narod.ru>
8 ;* Jason Garrett-Glaser <darkshikari@gmail.com>
10 ;* Permission to use, copy, modify, and/or distribute this software for any
11 ;* purpose with or without fee is hereby granted, provided that the above
12 ;* copyright notice and this permission notice appear in all copies.
14 ;* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
15 ;* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
16 ;* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
17 ;* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
18 ;* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
19 ;* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
20 ;* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21 ;*****************************************************************************
23 ; This is a header file for the x264ASM assembly language, which uses
24 ; NASM/YASM syntax combined with a large number of macros to provide easy
25 ; abstraction between different calling conventions (x86_32, win64, linux64).
26 ; It also has various other useful features to simplify writing the kind of
27 ; DSP functions that are most often used in x264.
29 ; Unlike the rest of x264, this file is available under an ISC license, as it
30 ; has significant usefulness outside of x264 and we want it to be available
31 ; to the largest audience possible. Of course, if you modify it for your own
32 ; purposes to add a new feature, we strongly encourage contributing a patch
33 ; as this feature might be useful for others as well. Send patches or ideas
34 ; to x264-devel@videolan.org .
36 %define program_name ff
41 %ifidn __OUTPUT_FORMAT__,win32
49 %define mangle(x) _ %+ x
54 ; FIXME: All of the 64bit asm functions that take a stride as an argument
55 ; via register, assume that the high dword of that register is filled with 0.
56 ; This is true in practice (since we never do any 64bit arithmetic on strides,
57 ; and x264's strides are all positive), but is not guaranteed by the ABI.
59 ; Name of the .rodata section.
60 ; Kludge: Something on OS X fails to align .rodata even given an align attribute,
61 ; so use a different read-only section.
62 %macro SECTION_RODATA 0-1 16
63 %ifidn __OUTPUT_FORMAT__,macho64
64 SECTION .text align=%1
65 %elifidn __OUTPUT_FORMAT__,macho
66 SECTION .text align=%1
68 %elifidn __OUTPUT_FORMAT__,aout
71 SECTION .rodata align=%1
75 ; aout does not support align=
76 %macro SECTION_TEXT 0-1 16
77 %ifidn __OUTPUT_FORMAT__,aout
80 SECTION .text align=%1
86 %elif ARCH_X86_64 == 0
87 ; x86_32 doesn't require PIC.
88 ; Some distros prefer shared objects to be PIC, but nothing breaks if
89 ; the code contains a few textrels, so we'll skip that complexity.
96 ; Macros to eliminate most code duplication between x86_32 and x86_64:
97 ; Currently this works only for leaf functions which load all their arguments
98 ; into registers at the start, and make no other use of the stack. Luckily that
99 ; covers most of x264's asm.
102 ; %1 = number of arguments. loads them from stack if needed.
103 ; %2 = number of registers used. pushes callee-saved regs if needed.
104 ; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed.
105 ; %4 = list of names to define to registers
106 ; PROLOGUE can also be invoked by adding the same options to cglobal
109 ; cglobal foo, 2,3,0, dst, src, tmp
110 ; declares a function (foo), taking two args (dst and src) and one local variable (tmp)
112 ; TODO Some functions can use some args directly from the stack. If they're the
113 ; last args then you can just not declare them, but if they're in the middle
114 ; we need more flexible macro.
117 ; Pops anything that was pushed by PROLOGUE, and returns.
120 ; Same, but if it doesn't pop anything it becomes a 2-byte ret, for athlons
121 ; which are slow when a normal ret follows a branch.
124 ; rN and rNq are the native-size register holding function argument N
125 ; rNd, rNw, rNb are dword, word, and byte size
126 ; rNm is the original location of arg N (a register or on the stack), dword
127 ; rNmp is native size
135 %ifid %6 ; i.e. it's a register
137 %elif ARCH_X86_64 ; memory
138 %define r%1mp qword %6
140 %define r%1mp dword %6
145 %macro DECLARE_REG_SIZE 2
159 DECLARE_REG_SIZE ax, al
160 DECLARE_REG_SIZE bx, bl
161 DECLARE_REG_SIZE cx, cl
162 DECLARE_REG_SIZE dx, dl
163 DECLARE_REG_SIZE si, sil
164 DECLARE_REG_SIZE di, dil
165 DECLARE_REG_SIZE bp, bpl
167 ; t# defines for when per-arch register allocation is more complex than just function arguments
169 %macro DECLARE_REG_TMP 1-*
172 CAT_XDEFINE t, %%i, r%1
178 %macro DECLARE_REG_TMP_SIZE 0-*
180 %define t%1q t%1 %+ q
181 %define t%1d t%1 %+ d
182 %define t%1w t%1 %+ w
183 %define t%1b t%1 %+ b
188 DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9
198 %assign stack_offset stack_offset+gprsize
203 %assign stack_offset stack_offset-gprsize
209 %assign stack_offset stack_offset+(%2)
216 %assign stack_offset stack_offset-(%2)
226 %macro movsxdifnidn 2
238 %macro DEFINE_ARGS 0-*
242 CAT_UNDEF arg_name %+ %%i, q
243 CAT_UNDEF arg_name %+ %%i, d
244 CAT_UNDEF arg_name %+ %%i, w
245 CAT_UNDEF arg_name %+ %%i, b
246 CAT_UNDEF arg_name %+ %%i, m
247 CAT_UNDEF arg_name, %%i
254 %xdefine %1q r %+ %%i %+ q
255 %xdefine %1d r %+ %%i %+ d
256 %xdefine %1w r %+ %%i %+ w
257 %xdefine %1b r %+ %%i %+ b
258 %xdefine %1m r %+ %%i %+ m
259 CAT_XDEFINE arg_name, %%i, %1
263 %assign n_arg_names %%i
266 %if WIN64 ; Windows x64 ;=================================================
268 DECLARE_REG 0, rcx, ecx, cx, cl, ecx
269 DECLARE_REG 1, rdx, edx, dx, dl, edx
270 DECLARE_REG 2, r8, r8d, r8w, r8b, r8d
271 DECLARE_REG 3, r9, r9d, r9w, r9b, r9d
272 DECLARE_REG 4, rdi, edi, di, dil, [rsp + stack_offset + 40]
273 DECLARE_REG 5, rsi, esi, si, sil, [rsp + stack_offset + 48]
274 DECLARE_REG 6, rax, eax, ax, al, [rsp + stack_offset + 56]
275 %define r7m [rsp + stack_offset + 64]
276 %define r8m [rsp + stack_offset + 72]
278 %macro LOAD_IF_USED 2 ; reg_id, number_of_args
280 mov r%1, [rsp + stack_offset + 8 + %1*8]
284 %macro PROLOGUE 2-4+ 0 ; #args, #regs, #xmm_regs, arg_names...
287 ASSERT regs_used <= 7
291 %assign stack_offset stack_offset+16
300 %macro WIN64_SPILL_XMM 1
301 %assign xmm_regs_used %1
303 %assign xmm_regs_used 0
305 ASSERT xmm_regs_used <= 16
306 %if xmm_regs_used > 6
307 sub rsp, (xmm_regs_used-6)*16+16
308 %assign stack_offset stack_offset+(xmm_regs_used-6)*16+16
309 %assign %%i xmm_regs_used
310 %rep (xmm_regs_used-6)
312 movdqa [rsp + (%%i-6)*16+8], xmm %+ %%i
317 %macro WIN64_RESTORE_XMM_INTERNAL 1
318 %if xmm_regs_used > 6
319 %assign %%i xmm_regs_used
320 %rep (xmm_regs_used-6)
322 movdqa xmm %+ %%i, [%1 + (%%i-6)*16+8]
324 add %1, (xmm_regs_used-6)*16+16
328 %macro WIN64_RESTORE_XMM 1
329 WIN64_RESTORE_XMM_INTERNAL %1
330 %assign stack_offset stack_offset-(xmm_regs_used-6)*16+16
331 %assign xmm_regs_used 0
335 WIN64_RESTORE_XMM_INTERNAL rsp
344 %if regs_used > 4 || xmm_regs_used > 6
351 %elif ARCH_X86_64 ; *nix x64 ;=============================================
353 DECLARE_REG 0, rdi, edi, di, dil, edi
354 DECLARE_REG 1, rsi, esi, si, sil, esi
355 DECLARE_REG 2, rdx, edx, dx, dl, edx
356 DECLARE_REG 3, rcx, ecx, cx, cl, ecx
357 DECLARE_REG 4, r8, r8d, r8w, r8b, r8d
358 DECLARE_REG 5, r9, r9d, r9w, r9b, r9d
359 DECLARE_REG 6, rax, eax, ax, al, [rsp + stack_offset + 8]
360 %define r7m [rsp + stack_offset + 16]
361 %define r8m [rsp + stack_offset + 24]
363 %macro LOAD_IF_USED 2 ; reg_id, number_of_args
365 mov r%1, [rsp - 40 + %1*8]
369 %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
384 %else ; X86_32 ;==============================================================
386 DECLARE_REG 0, eax, eax, ax, al, [esp + stack_offset + 4]
387 DECLARE_REG 1, ecx, ecx, cx, cl, [esp + stack_offset + 8]
388 DECLARE_REG 2, edx, edx, dx, dl, [esp + stack_offset + 12]
389 DECLARE_REG 3, ebx, ebx, bx, bl, [esp + stack_offset + 16]
390 DECLARE_REG 4, esi, esi, si, null, [esp + stack_offset + 20]
391 DECLARE_REG 5, edi, edi, di, null, [esp + stack_offset + 24]
392 DECLARE_REG 6, ebp, ebp, bp, null, [esp + stack_offset + 28]
393 %define r7m [esp + stack_offset + 32]
394 %define r8m [esp + stack_offset + 36]
397 %macro PUSH_IF_USED 1 ; reg_id
400 %assign stack_offset stack_offset+4
404 %macro POP_IF_USED 1 ; reg_id
410 %macro LOAD_IF_USED 2 ; reg_id, number_of_args
412 mov r%1, [esp + stack_offset + 4 + %1*4]
416 %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
419 ASSERT regs_used <= 7
450 %endif ;======================================================================
453 %macro WIN64_SPILL_XMM 1
455 %macro WIN64_RESTORE_XMM 1
461 ;=============================================================================
462 ; arch-independent part
463 ;=============================================================================
465 %assign function_align 16
468 ; Applies any symbol mangling needed for C linkage, and sets up a define such that
469 ; subsequent uses of the function name automatically refer to the mangled version.
470 ; Appends cpuflags to the function name if cpuflags has been specified.
471 %macro cglobal 1-2+ ; name, [PROLOGUE args]
473 ; HACK: work around %+ broken with empty SUFFIX for nasm 2.09.10
477 cglobal_internal %1 %+ SUFFIX
480 ; HACK: work around %+ broken with empty SUFFIX for nasm 2.09.10
482 cglobal_internal %1, %2
484 cglobal_internal %1 %+ SUFFIX, %2
488 %macro cglobal_internal 1-2+
490 %xdefine %1 mangle(program_name %+ _ %+ %1)
491 %xdefine %1.skip_prologue %1 %+ .skip_prologue
492 CAT_XDEFINE cglobaled_, %1, 1
494 %xdefine current_function %1
495 %ifidn __OUTPUT_FORMAT__,elf
496 global %1:function hidden
502 RESET_MM_PERMUTATION ; not really needed, but makes disassembly somewhat nicer
503 %assign stack_offset 0
510 %xdefine %1 mangle(program_name %+ _ %+ %1)
511 CAT_XDEFINE cglobaled_, %1, 1
515 ; like cextern, but without the prefix
516 %macro cextern_naked 1
517 %xdefine %1 mangle(%1)
518 CAT_XDEFINE cglobaled_, %1, 1
523 %xdefine %1 mangle(program_name %+ _ %+ %1)
528 ; This is needed for ELF, otherwise the GNU linker assumes the stack is
529 ; executable by default.
530 %ifidn __OUTPUT_FORMAT__,elf
531 SECTION .note.GNU-stack noalloc noexec nowrite progbits
536 %assign cpuflags_mmx (1<<0)
537 %assign cpuflags_mmx2 (1<<1) | cpuflags_mmx
538 %assign cpuflags_3dnow (1<<2) | cpuflags_mmx
539 %assign cpuflags_3dnow2 (1<<3) | cpuflags_3dnow
540 %assign cpuflags_sse (1<<4) | cpuflags_mmx2
541 %assign cpuflags_sse2 (1<<5) | cpuflags_sse
542 %assign cpuflags_sse2slow (1<<6) | cpuflags_sse2
543 %assign cpuflags_sse3 (1<<7) | cpuflags_sse2
544 %assign cpuflags_ssse3 (1<<8) | cpuflags_sse3
545 %assign cpuflags_sse4 (1<<9) | cpuflags_ssse3
546 %assign cpuflags_sse42 (1<<10)| cpuflags_sse4
547 %assign cpuflags_avx (1<<11)| cpuflags_sse42
548 %assign cpuflags_xop (1<<12)| cpuflags_avx
549 %assign cpuflags_fma4 (1<<13)| cpuflags_avx
551 %assign cpuflags_cache32 (1<<16)
552 %assign cpuflags_cache64 (1<<17)
553 %assign cpuflags_slowctz (1<<18)
554 %assign cpuflags_lzcnt (1<<19)
555 %assign cpuflags_misalign (1<<20)
556 %assign cpuflags_aligned (1<<21) ; not a cpu feature, but a function variant
557 %assign cpuflags_atom (1<<22)
559 %define cpuflag(x) ((cpuflags & (cpuflags_ %+ x)) == (cpuflags_ %+ x))
560 %define notcpuflag(x) ((cpuflags & (cpuflags_ %+ x)) != (cpuflags_ %+ x))
562 ; Takes up to 2 cpuflags from the above list.
563 ; All subsequent functions (up to the next INIT_CPUFLAGS) is built for the specified cpu.
564 ; You shouldn't need to invoke this macro directly, it's a subroutine for INIT_MMX &co.
565 %macro INIT_CPUFLAGS 0-2
568 %assign cpuflags cpuflags_%1
570 %xdefine cpuname %1_%2
571 %assign cpuflags cpuflags | cpuflags_%2
573 %xdefine SUFFIX _ %+ cpuname
575 %assign avx_enabled 1
577 %if mmsize == 16 && notcpuflag(sse2)
580 %define movnta movntps
605 %assign avx_enabled 0
606 %define RESET_MM_PERMUTATION INIT_MMX %1
612 %define movnta movntq
615 CAT_XDEFINE m, %%i, mm %+ %%i
616 CAT_XDEFINE nmm, %%i, %%i
628 %assign avx_enabled 0
629 %define RESET_MM_PERMUTATION INIT_XMM %1
633 %define num_mmregs 16
638 %define movnta movntdq
641 CAT_XDEFINE m, %%i, xmm %+ %%i
642 CAT_XDEFINE nxmm, %%i, %%i
648 ; FIXME: INIT_AVX can be replaced by INIT_XMM avx
651 %assign avx_enabled 1
652 %define PALIGNR PALIGNR_SSSE3
653 %define RESET_MM_PERMUTATION INIT_AVX
657 %assign avx_enabled 1
658 %define RESET_MM_PERMUTATION INIT_YMM %1
662 %define num_mmregs 16
667 %define movnta vmovntps
670 CAT_XDEFINE m, %%i, ymm %+ %%i
671 CAT_XDEFINE nymm, %%i, %%i
679 ; I often want to use macros that permute their arguments. e.g. there's no
680 ; efficient way to implement butterfly or transpose or dct without swapping some
683 ; I would like to not have to manually keep track of the permutations:
684 ; If I insert a permutation in the middle of a function, it should automatically
685 ; change everything that follows. For more complex macros I may also have multiple
686 ; implementations, e.g. the SSE2 and SSSE3 versions may have different permutations.
688 ; Hence these macros. Insert a PERMUTE or some SWAPs at the end of a macro that
689 ; permutes its arguments. It's equivalent to exchanging the contents of the
690 ; registers, except that this way you exchange the register names instead, so it
691 ; doesn't cost any cycles.
693 %macro PERMUTE 2-* ; takes a list of pairs to swap
708 %macro SWAP 2-* ; swaps a single chain (sometimes more concise than pairs)
714 CAT_XDEFINE n, m%1, %1
715 CAT_XDEFINE n, m%2, %2
717 ; If we were called as "SWAP m0,m1" rather than "SWAP 0,1" infer the original numbers here.
718 ; Be careful using this mode in nested macros though, as in some cases there may be
719 ; other copies of m# that have already been dereferenced and don't get updated correctly.
720 %xdefine %%n1 n %+ %1
721 %xdefine %%n2 n %+ %2
722 %xdefine tmp m %+ %%n1
723 CAT_XDEFINE m, %%n1, m %+ %%n2
724 CAT_XDEFINE m, %%n2, tmp
725 CAT_XDEFINE n, m %+ %%n1, %%n1
726 CAT_XDEFINE n, m %+ %%n2, %%n2
733 ; If SAVE_MM_PERMUTATION is placed at the end of a function, then any later
734 ; calls to that function will automatically load the permutation, so values can
735 ; be returned in mmregs.
736 %macro SAVE_MM_PERMUTATION 0-1
740 %xdefine %%f current_function %+ _m
744 CAT_XDEFINE %%f, %%i, m %+ %%i
749 %macro LOAD_MM_PERMUTATION 1 ; name to load from
753 CAT_XDEFINE m, %%i, %1_m %+ %%i
754 CAT_XDEFINE n, m %+ %%i, %%i
760 ; Append cpuflags to the callee's name iff the appended name is known and the plain name isn't
762 ; HACK: work around %+ broken with empty SUFFIX for nasm 2.09.10
766 call_internal %1, %1 %+ SUFFIX
769 %macro call_internal 2
777 LOAD_MM_PERMUTATION %%i
780 ; Substitutions that reduce instruction size but are functionally equivalent
805 ;=============================================================================
806 ; AVX abstraction layer
807 ;=============================================================================
812 CAT_XDEFINE sizeofmm, i, 8
814 CAT_XDEFINE sizeofxmm, i, 16
815 CAT_XDEFINE sizeofymm, i, 32
821 ;%2 == 1 if float, 0 if int
822 ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 3-operand (xmm, xmm, xmm)
823 ;%4 == number of operands given
825 %macro RUN_AVX_INSTR 6-7+
827 %define %%size sizeof%5
829 %define %%size mmsize
835 %define %%regmov movq
837 %define %%regmov movaps
839 %define %%regmov movdqa
844 %if avx_enabled && sizeof%5==16
861 ; 3arg AVX ops with a memory arg can only have it in src2,
862 ; whereas SSE emulation of 3arg prefers to have it in src1 (i.e. the mov).
863 ; So, if the op is symmetric and the wrong one is memory, swap them.
864 %macro RUN_AVX_INSTR1 8
875 %if %%swap && %3 == 0 && %8 == 1
876 RUN_AVX_INSTR %1, %2, %3, %4, %5, %7, %6
878 RUN_AVX_INSTR %1, %2, %3, %4, %5, %6, %7
883 ;%2 == 1 if float, 0 if int
884 ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 3-operand (xmm, xmm, xmm)
885 ;%4 == 1 if symmetric (i.e. doesn't matter which src arg is which), 0 if not
887 %macro %1 2-9 fnord, fnord, fnord, %1, %2, %3, %4
889 RUN_AVX_INSTR %6, %7, %8, 2, %1, %2
891 RUN_AVX_INSTR1 %6, %7, %8, 3, %1, %2, %3, %9
893 RUN_AVX_INSTR %6, %7, %8, 4, %1, %2, %3, %4
895 RUN_AVX_INSTR %6, %7, %8, 5, %1, %2, %3, %4, %5
900 AVX_INSTR addpd, 1, 0, 1
901 AVX_INSTR addps, 1, 0, 1
902 AVX_INSTR addsd, 1, 0, 1
903 AVX_INSTR addss, 1, 0, 1
904 AVX_INSTR addsubpd, 1, 0, 0
905 AVX_INSTR addsubps, 1, 0, 0
906 AVX_INSTR andpd, 1, 0, 1
907 AVX_INSTR andps, 1, 0, 1
908 AVX_INSTR andnpd, 1, 0, 0
909 AVX_INSTR andnps, 1, 0, 0
910 AVX_INSTR blendpd, 1, 0, 0
911 AVX_INSTR blendps, 1, 0, 0
912 AVX_INSTR blendvpd, 1, 0, 0
913 AVX_INSTR blendvps, 1, 0, 0
914 AVX_INSTR cmppd, 1, 0, 0
915 AVX_INSTR cmpps, 1, 0, 0
916 AVX_INSTR cmpsd, 1, 0, 0
917 AVX_INSTR cmpss, 1, 0, 0
918 AVX_INSTR divpd, 1, 0, 0
919 AVX_INSTR divps, 1, 0, 0
920 AVX_INSTR divsd, 1, 0, 0
921 AVX_INSTR divss, 1, 0, 0
922 AVX_INSTR dppd, 1, 1, 0
923 AVX_INSTR dpps, 1, 1, 0
924 AVX_INSTR haddpd, 1, 0, 0
925 AVX_INSTR haddps, 1, 0, 0
926 AVX_INSTR hsubpd, 1, 0, 0
927 AVX_INSTR hsubps, 1, 0, 0
928 AVX_INSTR maxpd, 1, 0, 1
929 AVX_INSTR maxps, 1, 0, 1
930 AVX_INSTR maxsd, 1, 0, 1
931 AVX_INSTR maxss, 1, 0, 1
932 AVX_INSTR minpd, 1, 0, 1
933 AVX_INSTR minps, 1, 0, 1
934 AVX_INSTR minsd, 1, 0, 1
935 AVX_INSTR minss, 1, 0, 1
936 AVX_INSTR movhlps, 1, 0, 0
937 AVX_INSTR movlhps, 1, 0, 0
938 AVX_INSTR movsd, 1, 0, 0
939 AVX_INSTR movss, 1, 0, 0
940 AVX_INSTR mpsadbw, 0, 1, 0
941 AVX_INSTR mulpd, 1, 0, 1
942 AVX_INSTR mulps, 1, 0, 1
943 AVX_INSTR mulsd, 1, 0, 1
944 AVX_INSTR mulss, 1, 0, 1
945 AVX_INSTR orpd, 1, 0, 1
946 AVX_INSTR orps, 1, 0, 1
947 AVX_INSTR packsswb, 0, 0, 0
948 AVX_INSTR packssdw, 0, 0, 0
949 AVX_INSTR packuswb, 0, 0, 0
950 AVX_INSTR packusdw, 0, 0, 0
951 AVX_INSTR paddb, 0, 0, 1
952 AVX_INSTR paddw, 0, 0, 1
953 AVX_INSTR paddd, 0, 0, 1
954 AVX_INSTR paddq, 0, 0, 1
955 AVX_INSTR paddsb, 0, 0, 1
956 AVX_INSTR paddsw, 0, 0, 1
957 AVX_INSTR paddusb, 0, 0, 1
958 AVX_INSTR paddusw, 0, 0, 1
959 AVX_INSTR palignr, 0, 1, 0
960 AVX_INSTR pand, 0, 0, 1
961 AVX_INSTR pandn, 0, 0, 0
962 AVX_INSTR pavgb, 0, 0, 1
963 AVX_INSTR pavgw, 0, 0, 1
964 AVX_INSTR pblendvb, 0, 0, 0
965 AVX_INSTR pblendw, 0, 1, 0
966 AVX_INSTR pcmpestri, 0, 0, 0
967 AVX_INSTR pcmpestrm, 0, 0, 0
968 AVX_INSTR pcmpistri, 0, 0, 0
969 AVX_INSTR pcmpistrm, 0, 0, 0
970 AVX_INSTR pcmpeqb, 0, 0, 1
971 AVX_INSTR pcmpeqw, 0, 0, 1
972 AVX_INSTR pcmpeqd, 0, 0, 1
973 AVX_INSTR pcmpeqq, 0, 0, 1
974 AVX_INSTR pcmpgtb, 0, 0, 0
975 AVX_INSTR pcmpgtw, 0, 0, 0
976 AVX_INSTR pcmpgtd, 0, 0, 0
977 AVX_INSTR pcmpgtq, 0, 0, 0
978 AVX_INSTR phaddw, 0, 0, 0
979 AVX_INSTR phaddd, 0, 0, 0
980 AVX_INSTR phaddsw, 0, 0, 0
981 AVX_INSTR phsubw, 0, 0, 0
982 AVX_INSTR phsubd, 0, 0, 0
983 AVX_INSTR phsubsw, 0, 0, 0
984 AVX_INSTR pmaddwd, 0, 0, 1
985 AVX_INSTR pmaddubsw, 0, 0, 0
986 AVX_INSTR pmaxsb, 0, 0, 1
987 AVX_INSTR pmaxsw, 0, 0, 1
988 AVX_INSTR pmaxsd, 0, 0, 1
989 AVX_INSTR pmaxub, 0, 0, 1
990 AVX_INSTR pmaxuw, 0, 0, 1
991 AVX_INSTR pmaxud, 0, 0, 1
992 AVX_INSTR pminsb, 0, 0, 1
993 AVX_INSTR pminsw, 0, 0, 1
994 AVX_INSTR pminsd, 0, 0, 1
995 AVX_INSTR pminub, 0, 0, 1
996 AVX_INSTR pminuw, 0, 0, 1
997 AVX_INSTR pminud, 0, 0, 1
998 AVX_INSTR pmulhuw, 0, 0, 1
999 AVX_INSTR pmulhrsw, 0, 0, 1
1000 AVX_INSTR pmulhw, 0, 0, 1
1001 AVX_INSTR pmullw, 0, 0, 1
1002 AVX_INSTR pmulld, 0, 0, 1
1003 AVX_INSTR pmuludq, 0, 0, 1
1004 AVX_INSTR pmuldq, 0, 0, 1
1005 AVX_INSTR por, 0, 0, 1
1006 AVX_INSTR psadbw, 0, 0, 1
1007 AVX_INSTR pshufb, 0, 0, 0
1008 AVX_INSTR psignb, 0, 0, 0
1009 AVX_INSTR psignw, 0, 0, 0
1010 AVX_INSTR psignd, 0, 0, 0
1011 AVX_INSTR psllw, 0, 0, 0
1012 AVX_INSTR pslld, 0, 0, 0
1013 AVX_INSTR psllq, 0, 0, 0
1014 AVX_INSTR pslldq, 0, 0, 0
1015 AVX_INSTR psraw, 0, 0, 0
1016 AVX_INSTR psrad, 0, 0, 0
1017 AVX_INSTR psrlw, 0, 0, 0
1018 AVX_INSTR psrld, 0, 0, 0
1019 AVX_INSTR psrlq, 0, 0, 0
1020 AVX_INSTR psrldq, 0, 0, 0
1021 AVX_INSTR psubb, 0, 0, 0
1022 AVX_INSTR psubw, 0, 0, 0
1023 AVX_INSTR psubd, 0, 0, 0
1024 AVX_INSTR psubq, 0, 0, 0
1025 AVX_INSTR psubsb, 0, 0, 0
1026 AVX_INSTR psubsw, 0, 0, 0
1027 AVX_INSTR psubusb, 0, 0, 0
1028 AVX_INSTR psubusw, 0, 0, 0
1029 AVX_INSTR punpckhbw, 0, 0, 0
1030 AVX_INSTR punpckhwd, 0, 0, 0
1031 AVX_INSTR punpckhdq, 0, 0, 0
1032 AVX_INSTR punpckhqdq, 0, 0, 0
1033 AVX_INSTR punpcklbw, 0, 0, 0
1034 AVX_INSTR punpcklwd, 0, 0, 0
1035 AVX_INSTR punpckldq, 0, 0, 0
1036 AVX_INSTR punpcklqdq, 0, 0, 0
1037 AVX_INSTR pxor, 0, 0, 1
1038 AVX_INSTR shufps, 1, 1, 0
1039 AVX_INSTR subpd, 1, 0, 0
1040 AVX_INSTR subps, 1, 0, 0
1041 AVX_INSTR subsd, 1, 0, 0
1042 AVX_INSTR subss, 1, 0, 0
1043 AVX_INSTR unpckhpd, 1, 0, 0
1044 AVX_INSTR unpckhps, 1, 0, 0
1045 AVX_INSTR unpcklpd, 1, 0, 0
1046 AVX_INSTR unpcklps, 1, 0, 0
1047 AVX_INSTR xorpd, 1, 0, 1
1048 AVX_INSTR xorps, 1, 0, 1
1050 ; 3DNow instructions, for sharing code between AVX, SSE and 3DN
1051 AVX_INSTR pfadd, 1, 0, 1
1052 AVX_INSTR pfsub, 1, 0, 0
1053 AVX_INSTR pfmul, 1, 0, 1
1055 ; base-4 constants for shuffles
1058 %assign j ((i>>6)&3)*1000 + ((i>>4)&3)*100 + ((i>>2)&3)*10 + (i&3)
1060 CAT_XDEFINE q000, j, i
1062 CAT_XDEFINE q00, j, i
1064 CAT_XDEFINE q0, j, i
1074 %macro %1 4-7 %1, %2, %3
1084 FMA_INSTR pmacsdd, pmulld, paddd
1085 FMA_INSTR pmacsww, pmullw, paddw
1086 FMA_INSTR pmadcswd, pmaddwd, paddd