extern void m68040_fpu_op0(void);
extern void m68040_fpu_op1(void);
-extern void m68881_mmu_ops();
+extern void m68851_mmu_ops();
extern unsigned char m68ki_cycles[][0x10000];
extern void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */
extern void m68ki_build_opcode_table(void);
34, /* 7: TRAPV */
34, /* 8: Privilege Violation */
34, /* 9: Trace */
- 34, /* 10: 1010 */
- 34, /* 11: 1111 */
+ 4, /* 10: 1010 */
+ 4, /* 11: 1111 */
4, /* 12: RESERVED */
4, /* 13: Coprocessor Protocol Violation (unemulated) */
4, /* 14: Format Error */
case M68K_REG_A6: return cpu->dar[14];
case M68K_REG_A7: return cpu->dar[15];
case M68K_REG_PC: return MASK_OUT_ABOVE_32(cpu->pc);
- case M68K_REG_SR: return cpu->t1_flag |
- cpu->t0_flag |
+ case M68K_REG_SR: return cpu->t1_flag |
+ cpu->t0_flag |
(cpu->s_flag << 11) |
(cpu->m_flag << 11) |
- cpu->int_mask |
+ cpu->int_mask |
((cpu->x_flag & XFLAG_SET) >> 4) |
((cpu->n_flag & NFLAG_SET) >> 4) |
((!cpu->not_z_flag) << 2) |
{
case CPU_TYPE_000: return (unsigned int)M68K_CPU_TYPE_68000;
case CPU_TYPE_010: return (unsigned int)M68K_CPU_TYPE_68010;
- case CPU_TYPE_EC020: return (unsigned int)M68K_CPU_TYPE_68EC020;
+ case CPU_TYPE_EC020: return (unsigned int)M68K_CPU_TYPE_68EC020;
case CPU_TYPE_020: return (unsigned int)M68K_CPU_TYPE_68020;
+ case CPU_TYPE_EC030: return (unsigned int)M68K_CPU_TYPE_68EC030;
+ case CPU_TYPE_030: return (unsigned int)M68K_CPU_TYPE_68030;
+ case CPU_TYPE_EC040: return (unsigned int)M68K_CPU_TYPE_68EC040;
+ case CPU_TYPE_LC040: return (unsigned int)M68K_CPU_TYPE_68LC040;
case CPU_TYPE_040: return (unsigned int)M68K_CPU_TYPE_68040;
}
return M68K_CPU_TYPE_INVALID;
/* Main loop. Keep going until we run out of clock cycles */
do
{
-#ifdef M68K_BUSERR_THING
- int i;
-#endif
/* Set tracing accodring to T1. (T0 is done inside instruction) */
m68ki_trace_t1(); /* auto-disable (see m68kcpu.h) */
REG_PPC = REG_PC;
/* Record previous D/A register state (in case of bus error) */
+//#define M68K_BUSERR_THING
#ifdef M68K_BUSERR_THING
- for (i = 15; i >= 0; i--){
+ for (int i = 15; i >= 0; i--){
REG_DA_SAVE[i] = REG_DA[i];
}
#endif
/* The first call to this function initializes the opcode handler jump table */
if(!emulation_initialized)
- {
+ {
m68ki_build_opcode_table();
emulation_initialized = 1;
}
/* Pulse the RESET line on the CPU */
void m68k_pulse_reset(void)
{
- /* Disable the PMMU on reset */
+ /* Disable the PMMU/HMMU on reset, if any */
m68ki_cpu.pmmu_enabled = 0;
+// m68ki_cpu.hmmu_enabled = 0;
+
+ m68ki_cpu.mmu_tc = 0;
+ m68ki_cpu.mmu_tt0 = 0;
+ m68ki_cpu.mmu_tt1 = 0;
/* Clear all stop levels and eat up all remaining cycles */
CPU_STOPPED = 0;
CPU_RUN_MODE = RUN_MODE_NORMAL;
RESET_CYCLES = CYC_EXCEPTION[EXCEPTION_RESET];
+
+ /* flush the MMU's cache */
+ pmmu_atc_flush();
+
+ if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
+ {
+ // clear instruction cache
+ m68ki_ic_clear();
+ }
}
/* Pulse the HALT line on the CPU */
}
}
#endif
-
+
return m68k_read_memory_16(address);
}
inline unsigned int m68k_read_immediate_32(unsigned int address) {
return read_data[i][address - read_addr[i]];
}
}
-
+
return m68k_read_memory_8(address);
}
inline unsigned int m68k_read_pcrelative_16(unsigned int address) {
}
#endif
+
+uint m68ki_read_imm6_addr_slowpath(uint32_t pc, address_translation_cache *cache)
+{
+ uint32_t address = ADDRESS_68K(pc);
+ uint32_t pc_address_diff = pc - address;
+ for (int i = 0; i < read_ranges; i++) {
+ if(address >= read_addr[i] && address < read_upper[i]) {
+ cache->lower = read_addr[i] + pc_address_diff;
+ cache->upper = read_upper[i] + pc_address_diff;
+ cache->data = read_data[i];
+ REG_PC += 2;
+ return be16toh(((unsigned short *)(read_data[i] + (address - read_addr[i])))[0]);
+ }
+ }
+
+ m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
+ m68ki_cpu.mmu_tmp_fc = FLAG_S | FUNCTION_CODE_USER_PROGRAM;
+ m68ki_cpu.mmu_tmp_rw = 1;
+ m68ki_cpu.mmu_tmp_sz = M68K_SZ_WORD;
+ m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
+
+#if M68K_EMULATE_PREFETCH
+{
+ uint result;
+ if(REG_PC != CPU_PREF_ADDR)
+ {
+ CPU_PREF_DATA = m68ki_ic_readimm16(REG_PC);
+ CPU_PREF_ADDR = m68ki_cpu.mmu_tmp_buserror_occurred ? ((uint32)~0) : REG_PC;
+ }
+ result = MASK_OUT_ABOVE_16(CPU_PREF_DATA);
+ REG_PC += 2;
+ if (!m68ki_cpu.mmu_tmp_buserror_occurred) {
+ // prefetch only if no bus error occurred in opcode fetch
+ CPU_PREF_DATA = m68ki_ic_readimm16(REG_PC);
+ CPU_PREF_ADDR = m68ki_cpu.mmu_tmp_buserror_occurred ? ((uint32)~0) : REG_PC;
+ // ignore bus error on prefetch
+ m68ki_cpu.mmu_tmp_buserror_occurred = 0;
+ }
+ return result;
+}
+#else
+
+ uint32_t address = ADDRESS_68K(REG_PC);
+ REG_PC += 2;
+
+ for (int i = 0; i < read_ranges; i++) {
+ if(address >= read_addr[i] && address < read_upper[i]) {
+ return be16toh(((unsigned short *)(read_data[i] + (address - read_addr[i])))[0]);
+ }
+ }
+
+ return m68k_read_immediate_16(address);
+#endif /* M68K_EMULATE_PREFETCH */
+}
+
+
+
void m68k_add_ram_range(uint32_t addr, uint32_t upper, unsigned char *ptr)
{
+ code_translation_cache.lower = 0;
+ code_translation_cache.upper = 0;
if ((addr == 0 && upper == 0) || upper < addr)
return;
void m68k_add_rom_range(uint32_t addr, uint32_t upper, unsigned char *ptr)
{
+ code_translation_cache.lower = 0;
+ code_translation_cache.upper = 0;
if ((addr == 0 && upper == 0) || upper < addr)
return;
}
}
+void m68k_clear_ranges()
+{
+ printf("[MUSASHI] Clearing all reads/write memory ranges.\n");
+ for (int i = 0; i < 8; i++) {
+ read_upper[i] = 0;
+ read_addr[i] = 0;
+ read_data[i] = NULL;
+ write_upper[i] = 0;
+ write_addr[i] = 0;
+ write_data[i] = NULL;
+ }
+ write_ranges = 0;
+ read_ranges = 0;
+}
+
/* ======================================================================== */
/* ============================== MAME STUFF ============================== */
/* ======================================================================== */