X-Git-Url: https://git.sesse.net/?a=blobdiff_plain;f=m68k_in.c;h=7c36327a378b191c967e6d16461c03563703c85b;hb=6d74804193233a5fe5c57a2eb776219e6e1a31c1;hp=ec2614fb48e84a5c133defa5d21257ed65dcd189;hpb=34a050838be38ed718ee23b6498dcd7a3285aacb;p=pistorm diff --git a/m68k_in.c b/m68k_in.c index ec2614f..7c36327 100644 --- a/m68k_in.c +++ b/m68k_in.c @@ -112,7 +112,9 @@ M68KMAKE_PROTOTYPE_FOOTER /* Build the opcode handler table */ void m68ki_build_opcode_table(void); -extern void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */ +struct m68ki_cpu_core; + +extern void (*m68ki_instruction_jump_table[0x10000])(struct m68ki_cpu_core *state); /* opcode handler jump table */ extern unsigned char m68ki_cycles[][0x10000]; @@ -136,13 +138,13 @@ M68KMAKE_TABLE_HEADER #define NUM_CPU_TYPES 5 -void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */ +void (*m68ki_instruction_jump_table[0x10000])(m68ki_cpu_core *state); /* opcode handler jump table */ unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */ /* This is used to generate the opcode handler jump table */ typedef struct { - void (*opcode_handler)(void); /* handler function */ + void (*opcode_handler)(m68ki_cpu_core *state); /* handler function */ unsigned int mask; /* mask on opcode */ unsigned int match; /* what to match after masking */ unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */ @@ -281,10 +283,10 @@ M68KMAKE_OPCODE_HANDLER_HEADER #include #include "m68kcpu.h" -extern void m68040_fpu_op0(void); -extern void m68040_fpu_op1(void); -extern void m68851_mmu_ops(); -extern void m68881_ftrap(); +extern void m68040_fpu_op0(m68ki_cpu_core *state); +extern void m68040_fpu_op1(m68ki_cpu_core *state); +extern void m68851_mmu_ops(m68ki_cpu_core *state); +extern void m68881_ftrap(m68ki_cpu_core *state); /* ======================================================================== */ /* ========================= INSTRUCTION HANDLERS ========================= */ @@ -921,7 +923,7 @@ M68KMAKE_OP(040fpu0, 32, ., .) // printf("FPU 040fpu0 HAS_FPU=%d\n",!!HAS_FPU); if(HAS_FPU) { - m68040_fpu_op0(); + void m68040_fpu_op0(m68ki_cpu_core *state); return; } m68ki_exception_1111(); @@ -933,7 +935,7 @@ M68KMAKE_OP(040fpu1, 32, ., .) // printf("FPU 040fpu1 HAS_FPU=%d\n",!!HAS_FPU); if(HAS_FPU) { - m68040_fpu_op1(); + void m68040_fpu_op1(m68ki_cpu_core *state); return; } m68ki_exception_1111(); @@ -970,7 +972,7 @@ M68KMAKE_OP(abcd, 8, rr, .) M68KMAKE_OP(abcd, 8, mm, ax7) { - uint src = OPER_AY_PD_8(); + uint src = OPER_AY_PD_8(state); uint ea = EA_A7_PD_8(); uint dst = m68ki_read_8(ea); uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(); @@ -997,7 +999,7 @@ M68KMAKE_OP(abcd, 8, mm, ax7) M68KMAKE_OP(abcd, 8, mm, ay7) { - uint src = OPER_A7_PD_8(); + uint src = OPER_A7_PD_8(state); uint ea = EA_AX_PD_8(); uint dst = m68ki_read_8(ea); uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(); @@ -1024,7 +1026,7 @@ M68KMAKE_OP(abcd, 8, mm, ay7) M68KMAKE_OP(abcd, 8, mm, axy7) { - uint src = OPER_A7_PD_8(); + uint src = OPER_A7_PD_8(state); uint ea = EA_A7_PD_8(); uint dst = m68ki_read_8(ea); uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(); @@ -1051,7 +1053,7 @@ M68KMAKE_OP(abcd, 8, mm, axy7) M68KMAKE_OP(abcd, 8, mm, .) { - uint src = OPER_AY_PD_8(); + uint src = OPER_AY_PD_8(state); uint ea = EA_AX_PD_8(); uint dst = m68ki_read_8(ea); uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(); @@ -1305,7 +1307,7 @@ M68KMAKE_OP(adda, 32, ., .) M68KMAKE_OP(addi, 8, ., d) { uint* r_dst = &DY; - uint src = OPER_I_8(); + uint src = OPER_I_8(state); uint dst = MASK_OUT_ABOVE_8(*r_dst); uint res = src + dst; @@ -1320,7 +1322,7 @@ M68KMAKE_OP(addi, 8, ., d) M68KMAKE_OP(addi, 8, ., .) { - uint src = OPER_I_8(); + uint src = OPER_I_8(state); uint ea = M68KMAKE_GET_EA_AY_8; uint dst = m68ki_read_8(ea); uint res = src + dst; @@ -1337,7 +1339,7 @@ M68KMAKE_OP(addi, 8, ., .) M68KMAKE_OP(addi, 16, ., d) { uint* r_dst = &DY; - uint src = OPER_I_16(); + uint src = OPER_I_16(state); uint dst = MASK_OUT_ABOVE_16(*r_dst); uint res = src + dst; @@ -1352,7 +1354,7 @@ M68KMAKE_OP(addi, 16, ., d) M68KMAKE_OP(addi, 16, ., .) { - uint src = OPER_I_16(); + uint src = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_16; uint dst = m68ki_read_16(ea); uint res = src + dst; @@ -1369,7 +1371,7 @@ M68KMAKE_OP(addi, 16, ., .) M68KMAKE_OP(addi, 32, ., d) { uint* r_dst = &DY; - uint src = OPER_I_32(); + uint src = OPER_I_32(state); uint dst = *r_dst; uint res = src + dst; @@ -1384,7 +1386,7 @@ M68KMAKE_OP(addi, 32, ., d) M68KMAKE_OP(addi, 32, ., .) { - uint src = OPER_I_32(); + uint src = OPER_I_32(state); uint ea = M68KMAKE_GET_EA_AY_32; uint dst = m68ki_read_32(ea); uint res = src + dst; @@ -1567,7 +1569,7 @@ M68KMAKE_OP(addx, 32, rr, .) M68KMAKE_OP(addx, 8, mm, ax7) { - uint src = OPER_AY_PD_8(); + uint src = OPER_AY_PD_8(state); uint ea = EA_A7_PD_8(); uint dst = m68ki_read_8(ea); uint res = src + dst + XFLAG_AS_1(); @@ -1585,7 +1587,7 @@ M68KMAKE_OP(addx, 8, mm, ax7) M68KMAKE_OP(addx, 8, mm, ay7) { - uint src = OPER_A7_PD_8(); + uint src = OPER_A7_PD_8(state); uint ea = EA_AX_PD_8(); uint dst = m68ki_read_8(ea); uint res = src + dst + XFLAG_AS_1(); @@ -1603,7 +1605,7 @@ M68KMAKE_OP(addx, 8, mm, ay7) M68KMAKE_OP(addx, 8, mm, axy7) { - uint src = OPER_A7_PD_8(); + uint src = OPER_A7_PD_8(state); uint ea = EA_A7_PD_8(); uint dst = m68ki_read_8(ea); uint res = src + dst + XFLAG_AS_1(); @@ -1621,7 +1623,7 @@ M68KMAKE_OP(addx, 8, mm, axy7) M68KMAKE_OP(addx, 8, mm, .) { - uint src = OPER_AY_PD_8(); + uint src = OPER_AY_PD_8(state); uint ea = EA_AX_PD_8(); uint dst = m68ki_read_8(ea); uint res = src + dst + XFLAG_AS_1(); @@ -1639,7 +1641,7 @@ M68KMAKE_OP(addx, 8, mm, .) M68KMAKE_OP(addx, 16, mm, .) { - uint src = OPER_AY_PD_16(); + uint src = OPER_AY_PD_16(state); uint ea = EA_AX_PD_16(); uint dst = m68ki_read_16(ea); uint res = src + dst + XFLAG_AS_1(); @@ -1657,7 +1659,7 @@ M68KMAKE_OP(addx, 16, mm, .) M68KMAKE_OP(addx, 32, mm, .) { - uint src = OPER_AY_PD_32(); + uint src = OPER_AY_PD_32(state); uint ea = EA_AX_PD_32(); uint dst = m68ki_read_32(ea); uint res = src + dst + XFLAG_AS_1(); @@ -1777,7 +1779,7 @@ M68KMAKE_OP(and, 32, re, .) M68KMAKE_OP(andi, 8, ., d) { - FLAG_Z = MASK_OUT_ABOVE_8(DY &= (OPER_I_8() | 0xffffff00)); + FLAG_Z = MASK_OUT_ABOVE_8(DY &= (OPER_I_8(state) | 0xffffff00)); FLAG_N = NFLAG_8(FLAG_Z); FLAG_C = CFLAG_CLEAR; @@ -1787,7 +1789,7 @@ M68KMAKE_OP(andi, 8, ., d) M68KMAKE_OP(andi, 8, ., .) { - uint src = OPER_I_8(); + uint src = OPER_I_8(state); uint ea = M68KMAKE_GET_EA_AY_8; uint res = src & m68ki_read_8(ea); @@ -1802,7 +1804,7 @@ M68KMAKE_OP(andi, 8, ., .) M68KMAKE_OP(andi, 16, ., d) { - FLAG_Z = MASK_OUT_ABOVE_16(DY &= (OPER_I_16() | 0xffff0000)); + FLAG_Z = MASK_OUT_ABOVE_16(DY &= (OPER_I_16(state) | 0xffff0000)); FLAG_N = NFLAG_16(FLAG_Z); FLAG_C = CFLAG_CLEAR; @@ -1812,7 +1814,7 @@ M68KMAKE_OP(andi, 16, ., d) M68KMAKE_OP(andi, 16, ., .) { - uint src = OPER_I_16(); + uint src = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_16; uint res = src & m68ki_read_16(ea); @@ -1827,7 +1829,7 @@ M68KMAKE_OP(andi, 16, ., .) M68KMAKE_OP(andi, 32, ., d) { - FLAG_Z = DY &= (OPER_I_32()); + FLAG_Z = DY &= (OPER_I_32(state)); FLAG_N = NFLAG_32(FLAG_Z); FLAG_C = CFLAG_CLEAR; @@ -1837,7 +1839,7 @@ M68KMAKE_OP(andi, 32, ., d) M68KMAKE_OP(andi, 32, ., .) { - uint src = OPER_I_32(); + uint src = OPER_I_32(state); uint ea = M68KMAKE_GET_EA_AY_32; uint res = src & m68ki_read_32(ea); @@ -1852,7 +1854,7 @@ M68KMAKE_OP(andi, 32, ., .) M68KMAKE_OP(andi, 16, toc, .) { - m68ki_set_ccr(m68ki_get_ccr() & OPER_I_8()); + m68ki_set_ccr(m68ki_get_ccr() & OPER_I_8(state)); } @@ -1860,9 +1862,9 @@ M68KMAKE_OP(andi, 16, tos, .) { if(FLAG_S) { - uint src = OPER_I_16(); + uint src = OPER_I_16(state); m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ - m68ki_set_sr(m68ki_get_sr() & src); + m68ki_set_sr(state, m68ki_get_sr() & src); return; } m68ki_exception_privilege_violation(); @@ -2312,7 +2314,7 @@ M68KMAKE_OP(bcc, 16, ., .) { if(M68KMAKE_CC) { - uint offset = OPER_I_16(); + uint offset = OPER_I_16(state); REG_PC -= 2; m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ m68ki_branch_16(offset); @@ -2329,7 +2331,7 @@ M68KMAKE_OP(bcc, 32, ., .) { if(M68KMAKE_CC) { - uint offset = OPER_I_32(); + uint offset = OPER_I_32(state); REG_PC -= 4; m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ m68ki_branch_32(offset); @@ -2375,7 +2377,7 @@ M68KMAKE_OP(bchg, 8, r, .) M68KMAKE_OP(bchg, 32, s, d) { uint* r_dst = &DY; - uint mask = 1 << (OPER_I_8() & 0x1f); + uint mask = 1 << (OPER_I_8(state) & 0x1f); FLAG_Z = *r_dst & mask; *r_dst ^= mask; @@ -2384,7 +2386,7 @@ M68KMAKE_OP(bchg, 32, s, d) M68KMAKE_OP(bchg, 8, s, .) { - uint mask = 1 << (OPER_I_8() & 7); + uint mask = 1 << (OPER_I_8(state) & 7); uint ea = M68KMAKE_GET_EA_AY_8; uint src = m68ki_read_8(ea); @@ -2417,7 +2419,7 @@ M68KMAKE_OP(bclr, 8, r, .) M68KMAKE_OP(bclr, 32, s, d) { uint* r_dst = &DY; - uint mask = 1 << (OPER_I_8() & 0x1f); + uint mask = 1 << (OPER_I_8(state) & 0x1f); FLAG_Z = *r_dst & mask; *r_dst &= ~mask; @@ -2426,7 +2428,7 @@ M68KMAKE_OP(bclr, 32, s, d) M68KMAKE_OP(bclr, 8, s, .) { - uint mask = 1 << (OPER_I_8() & 7); + uint mask = 1 << (OPER_I_8(state) & 7); uint ea = M68KMAKE_GET_EA_AY_8; uint src = m68ki_read_8(ea); @@ -2439,7 +2441,7 @@ M68KMAKE_OP(bfchg, 32, ., d) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint offset = (word2>>6)&31; uint width = word2; uint* data = &DY; @@ -2474,7 +2476,7 @@ M68KMAKE_OP(bfchg, 32, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); sint offset = (word2>>6)&31; uint width = word2; uint mask_base; @@ -2528,7 +2530,7 @@ M68KMAKE_OP(bfclr, 32, ., d) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint offset = (word2>>6)&31; uint width = word2; uint* data = &DY; @@ -2565,7 +2567,7 @@ M68KMAKE_OP(bfclr, 32, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); sint offset = (word2>>6)&31; uint width = word2; uint mask_base; @@ -2619,7 +2621,7 @@ M68KMAKE_OP(bfexts, 32, ., d) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint offset = (word2>>6)&31; uint width = word2; uint64 data = DY; @@ -2653,7 +2655,7 @@ M68KMAKE_OP(bfexts, 32, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); sint offset = (word2>>6)&31; uint width = word2; uint data; @@ -2704,7 +2706,7 @@ M68KMAKE_OP(bfextu, 32, ., d) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint offset = (word2>>6)&31; uint width = word2; uint64 data = DY; @@ -2738,7 +2740,7 @@ M68KMAKE_OP(bfextu, 32, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); sint offset = (word2>>6)&31; uint width = word2; uint data; @@ -2788,7 +2790,7 @@ M68KMAKE_OP(bfffo, 32, ., d) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint offset = (word2>>6)&31; uint width = word2; uint64 data = DY; @@ -2826,7 +2828,7 @@ M68KMAKE_OP(bfffo, 32, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); sint offset = (word2>>6)&31; sint local_offset; uint width = word2; @@ -2878,7 +2880,7 @@ M68KMAKE_OP(bfins, 32, ., d) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint offset = (word2>>6)&31; uint width = word2; uint* data = &DY; @@ -2920,7 +2922,7 @@ M68KMAKE_OP(bfins, 32, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); sint offset = (word2>>6)&31; uint width = word2; uint insert_base = REG_D[(word2>>12)&7]; @@ -2990,7 +2992,7 @@ M68KMAKE_OP(bfset, 32, ., d) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint offset = (word2>>6)&31; uint width = word2; uint* data = &DY; @@ -3027,7 +3029,7 @@ M68KMAKE_OP(bfset, 32, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); sint offset = (word2>>6)&31; uint width = word2; uint mask_base; @@ -3082,7 +3084,7 @@ M68KMAKE_OP(bftst, 32, ., d) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint offset = (word2>>6)&31; uint width = word2; uint* data = &DY; @@ -3117,7 +3119,7 @@ M68KMAKE_OP(bftst, 32, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); sint offset = (word2>>6)&31; uint width = word2; uint mask_base; @@ -3187,7 +3189,7 @@ M68KMAKE_OP(bra, 8, ., .) M68KMAKE_OP(bra, 16, ., .) { - uint offset = OPER_I_16(); + uint offset = OPER_I_16(state); REG_PC -= 2; m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ m68ki_branch_16(offset); @@ -3201,7 +3203,7 @@ M68KMAKE_OP(bra, 32, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint offset = OPER_I_32(); + uint offset = OPER_I_32(state); REG_PC -= 4; m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ m68ki_branch_32(offset); @@ -3246,7 +3248,7 @@ M68KMAKE_OP(bset, 8, r, .) M68KMAKE_OP(bset, 32, s, d) { uint* r_dst = &DY; - uint mask = 1 << (OPER_I_8() & 0x1f); + uint mask = 1 << (OPER_I_8(state) & 0x1f); FLAG_Z = *r_dst & mask; *r_dst |= mask; @@ -3255,7 +3257,7 @@ M68KMAKE_OP(bset, 32, s, d) M68KMAKE_OP(bset, 8, s, .) { - uint mask = 1 << (OPER_I_8() & 7); + uint mask = 1 << (OPER_I_8(state) & 7); uint ea = M68KMAKE_GET_EA_AY_8; uint src = m68ki_read_8(ea); @@ -3274,7 +3276,7 @@ M68KMAKE_OP(bsr, 8, ., .) M68KMAKE_OP(bsr, 16, ., .) { - uint offset = OPER_I_16(); + uint offset = OPER_I_16(state); m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ m68ki_push_32(REG_PC); REG_PC -= 2; @@ -3286,7 +3288,7 @@ M68KMAKE_OP(bsr, 32, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint offset = OPER_I_32(); + uint offset = OPER_I_32(state); m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ m68ki_push_32(REG_PC); REG_PC -= 4; @@ -3318,13 +3320,13 @@ M68KMAKE_OP(btst, 8, r, .) M68KMAKE_OP(btst, 32, s, d) { - FLAG_Z = DY & (1 << (OPER_I_8() & 0x1f)); + FLAG_Z = DY & (1 << (OPER_I_8(state) & 0x1f)); } M68KMAKE_OP(btst, 8, s, .) { - uint bit = OPER_I_8() & 7; + uint bit = OPER_I_8(state) & 7; FLAG_Z = M68KMAKE_GET_OPER_AY_8 & (1 << bit); } @@ -3353,7 +3355,7 @@ M68KMAKE_OP(cas, 8, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_8; uint dest = m68ki_read_8(ea); uint* compare = ®_D[word2 & 7]; @@ -3382,7 +3384,7 @@ M68KMAKE_OP(cas, 16, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_16; uint dest = m68ki_read_16(ea); uint* compare = ®_D[word2 & 7]; @@ -3411,7 +3413,7 @@ M68KMAKE_OP(cas, 32, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_32; uint dest = m68ki_read_32(ea); uint* compare = ®_D[word2 & 7]; @@ -3440,7 +3442,7 @@ M68KMAKE_OP(cas2, 16, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_32(); + uint word2 = OPER_I_32(state); uint* compare1 = ®_D[(word2 >> 16) & 7]; uint ea1 = REG_DA[(word2 >> 28) & 15]; uint dest1 = m68ki_read_16(ea1); @@ -3485,7 +3487,7 @@ M68KMAKE_OP(cas2, 32, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_32(); + uint word2 = OPER_I_32(state); uint* compare1 = ®_D[(word2 >> 16) & 7]; uint ea1 = REG_DA[(word2 >> 28) & 15]; uint dest1 = m68ki_read_32(ea1); @@ -3612,7 +3614,7 @@ M68KMAKE_OP(chk2cmp2, 8, ., pcdi) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); sint compare = REG_DA[(word2 >> 12) & 15]; if(!BIT_F(word2)) compare &= 0xff; @@ -3638,7 +3640,7 @@ M68KMAKE_OP(chk2cmp2, 8, ., pcdi) return; } - + m68ki_exception_illegal(); } @@ -3647,7 +3649,7 @@ M68KMAKE_OP(chk2cmp2, 8, ., pcix) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); sint compare = REG_DA[(word2 >> 12) & 15]; if(!BIT_F(word2)) compare &= 0xff; @@ -3680,7 +3682,7 @@ M68KMAKE_OP(chk2cmp2, 8, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); sint compare = REG_DA[(word2 >> 12) & 15]; if(!BIT_F(word2)) compare &= 0xff; @@ -3713,7 +3715,7 @@ M68KMAKE_OP(chk2cmp2, 16, ., pcdi) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); sint compare = REG_DA[(word2 >> 12) & 15]; if(!BIT_F(word2)) compare &= 0xffff; @@ -3746,7 +3748,7 @@ M68KMAKE_OP(chk2cmp2, 16, ., pcix) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); sint compare = REG_DA[(word2 >> 12) & 15]; if(!BIT_F(word2)) compare &= 0xffff; @@ -3779,7 +3781,7 @@ M68KMAKE_OP(chk2cmp2, 16, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); sint compare = REG_DA[(word2 >> 12) & 15]; if(!BIT_F(word2)) compare &= 0xffff; @@ -3812,7 +3814,7 @@ M68KMAKE_OP(chk2cmp2, 32, ., pcdi) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint32 word2 = OPER_I_16(); + uint32 word2 = OPER_I_16(state); sint64 compare = REG_DA[(word2 >> 12) & 15]; uint32 ea = EA_PCDI_32(); sint64 lower_bound = m68ki_read_pcrel_32(ea); @@ -3840,7 +3842,7 @@ M68KMAKE_OP(chk2cmp2, 32, ., pcix) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint32 word2 = OPER_I_16(); + uint32 word2 = OPER_I_16(state); sint64 compare = REG_DA[(word2 >> 12) & 15]; uint32 ea = EA_PCIX_32(); sint64 lower_bound = m68ki_read_32(ea); @@ -3867,8 +3869,8 @@ M68KMAKE_OP(chk2cmp2, 32, ., pcix) M68KMAKE_OP(chk2cmp2, 32, ., .) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) - { - uint32 word2 = OPER_I_16(); + { + uint32 word2 = OPER_I_16(state); sint64 compare = REG_DA[(word2 >> 12) & 15]; uint32 ea = M68KMAKE_GET_EA_AY_32; sint64 lower_bound = m68ki_read_32(ea); @@ -4154,7 +4156,7 @@ M68KMAKE_OP(cmpa, 32, ., .) M68KMAKE_OP(cmpi, 8, ., d) { - uint src = OPER_I_8(); + uint src = OPER_I_8(state); uint dst = MASK_OUT_ABOVE_8(DY); uint res = dst - src; @@ -4167,7 +4169,7 @@ M68KMAKE_OP(cmpi, 8, ., d) M68KMAKE_OP(cmpi, 8, ., .) { - uint src = OPER_I_8(); + uint src = OPER_I_8(state); uint dst = M68KMAKE_GET_OPER_AY_8; uint res = dst - src; @@ -4182,8 +4184,8 @@ M68KMAKE_OP(cmpi, 8, ., pcdi) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint src = OPER_I_8(); - uint dst = OPER_PCDI_8(); + uint src = OPER_I_8(state); + uint dst = OPER_PCDI_8(state); uint res = dst - src; FLAG_N = NFLAG_8(res); @@ -4200,8 +4202,8 @@ M68KMAKE_OP(cmpi, 8, ., pcix) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint src = OPER_I_8(); - uint dst = OPER_PCIX_8(); + uint src = OPER_I_8(state); + uint dst = OPER_PCIX_8(state); uint res = dst - src; FLAG_N = NFLAG_8(res); @@ -4216,7 +4218,7 @@ M68KMAKE_OP(cmpi, 8, ., pcix) M68KMAKE_OP(cmpi, 16, ., d) { - uint src = OPER_I_16(); + uint src = OPER_I_16(state); uint dst = MASK_OUT_ABOVE_16(DY); uint res = dst - src; @@ -4229,7 +4231,7 @@ M68KMAKE_OP(cmpi, 16, ., d) M68KMAKE_OP(cmpi, 16, ., .) { - uint src = OPER_I_16(); + uint src = OPER_I_16(state); uint dst = M68KMAKE_GET_OPER_AY_16; uint res = dst - src; @@ -4244,8 +4246,8 @@ M68KMAKE_OP(cmpi, 16, ., pcdi) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint src = OPER_I_16(); - uint dst = OPER_PCDI_16(); + uint src = OPER_I_16(state); + uint dst = OPER_PCDI_16(state); uint res = dst - src; FLAG_N = NFLAG_16(res); @@ -4262,8 +4264,8 @@ M68KMAKE_OP(cmpi, 16, ., pcix) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint src = OPER_I_16(); - uint dst = OPER_PCIX_16(); + uint src = OPER_I_16(state); + uint dst = OPER_PCIX_16(state); uint res = dst - src; FLAG_N = NFLAG_16(res); @@ -4278,7 +4280,7 @@ M68KMAKE_OP(cmpi, 16, ., pcix) M68KMAKE_OP(cmpi, 32, ., d) { - uint src = OPER_I_32(); + uint src = OPER_I_32(state); uint dst = DY; uint res = dst - src; @@ -4292,7 +4294,7 @@ M68KMAKE_OP(cmpi, 32, ., d) M68KMAKE_OP(cmpi, 32, ., .) { - uint src = OPER_I_32(); + uint src = OPER_I_32(state); uint dst = M68KMAKE_GET_OPER_AY_32; uint res = dst - src; @@ -4307,8 +4309,8 @@ M68KMAKE_OP(cmpi, 32, ., pcdi) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint src = OPER_I_32(); - uint dst = OPER_PCDI_32(); + uint src = OPER_I_32(state); + uint dst = OPER_PCDI_32(state); uint res = dst - src; FLAG_N = NFLAG_32(res); @@ -4325,8 +4327,8 @@ M68KMAKE_OP(cmpi, 32, ., pcix) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint src = OPER_I_32(); - uint dst = OPER_PCIX_32(); + uint src = OPER_I_32(state); + uint dst = OPER_PCIX_32(state); uint res = dst - src; FLAG_N = NFLAG_32(res); @@ -4341,8 +4343,8 @@ M68KMAKE_OP(cmpi, 32, ., pcix) M68KMAKE_OP(cmpm, 8, ., ax7) { - uint src = OPER_AY_PI_8(); - uint dst = OPER_A7_PI_8(); + uint src = OPER_AY_PI_8(state); + uint dst = OPER_A7_PI_8(state); uint res = dst - src; FLAG_N = NFLAG_8(res); @@ -4354,8 +4356,8 @@ M68KMAKE_OP(cmpm, 8, ., ax7) M68KMAKE_OP(cmpm, 8, ., ay7) { - uint src = OPER_A7_PI_8(); - uint dst = OPER_AX_PI_8(); + uint src = OPER_A7_PI_8(state); + uint dst = OPER_AX_PI_8(state); uint res = dst - src; FLAG_N = NFLAG_8(res); @@ -4367,8 +4369,8 @@ M68KMAKE_OP(cmpm, 8, ., ay7) M68KMAKE_OP(cmpm, 8, ., axy7) { - uint src = OPER_A7_PI_8(); - uint dst = OPER_A7_PI_8(); + uint src = OPER_A7_PI_8(state); + uint dst = OPER_A7_PI_8(state); uint res = dst - src; FLAG_N = NFLAG_8(res); @@ -4380,8 +4382,8 @@ M68KMAKE_OP(cmpm, 8, ., axy7) M68KMAKE_OP(cmpm, 8, ., .) { - uint src = OPER_AY_PI_8(); - uint dst = OPER_AX_PI_8(); + uint src = OPER_AY_PI_8(state); + uint dst = OPER_AX_PI_8(state); uint res = dst - src; FLAG_N = NFLAG_8(res); @@ -4393,8 +4395,8 @@ M68KMAKE_OP(cmpm, 8, ., .) M68KMAKE_OP(cmpm, 16, ., .) { - uint src = OPER_AY_PI_16(); - uint dst = OPER_AX_PI_16(); + uint src = OPER_AY_PI_16(state); + uint dst = OPER_AX_PI_16(state); uint res = dst - src; FLAG_N = NFLAG_16(res); @@ -4406,8 +4408,8 @@ M68KMAKE_OP(cmpm, 16, ., .) M68KMAKE_OP(cmpm, 32, ., .) { - uint src = OPER_AY_PI_32(); - uint dst = OPER_AX_PI_32(); + uint src = OPER_AY_PI_32(state); + uint dst = OPER_AX_PI_32(state); uint res = dst - src; FLAG_N = NFLAG_32(res); @@ -4479,7 +4481,7 @@ M68KMAKE_OP(cptrapcc, 32, ., .) m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR, m68ki_disassemble_quick(ADDRESS_68K(REG_PC - 2),CPU_TYPE))); // JFF: unsupported, but at least if the trap doesn't occur, app should still work, so at least PC increase is correct - REG_PC += 4; + REG_PC += 4; return; } m68ki_exception_1111(); @@ -4489,7 +4491,7 @@ M68KMAKE_OP(ftrapcc,32, ., .) { if(HAS_FPU) { - m68881_ftrap(); + m68881_ftrap(state); } else { m68ki_exception_1111(); } @@ -4509,7 +4511,7 @@ M68KMAKE_OP(dbf, 16, ., .) *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; if(res != 0xffff) { - uint offset = OPER_I_16(); + uint offset = OPER_I_16(state); REG_PC -= 2; m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ m68ki_branch_16(offset); @@ -4531,7 +4533,7 @@ M68KMAKE_OP(dbcc, 16, ., .) *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; if(res != 0xffff) { - uint offset = OPER_I_16(); + uint offset = OPER_I_16(state); REG_PC -= 2; m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ m68ki_branch_16(offset); @@ -4678,7 +4680,7 @@ M68KMAKE_OP(divl, 32, ., d) if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint64 divisor = DY; uint64 dividend = 0; uint64 quotient = 0; @@ -4746,7 +4748,7 @@ M68KMAKE_OP(divl, 32, ., d) if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint divisor = DY; uint dividend_hi = REG_D[word2 & 7]; uint dividend_lo = REG_D[(word2 >> 12) & 7]; @@ -4889,7 +4891,7 @@ M68KMAKE_OP(divl, 32, ., .) if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint64 divisor = M68KMAKE_GET_OPER_AY_32; uint64 dividend = 0; uint64 quotient = 0; @@ -4957,7 +4959,7 @@ M68KMAKE_OP(divl, 32, ., .) if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint divisor = M68KMAKE_GET_OPER_AY_32; uint dividend_hi = REG_D[word2 & 7]; uint dividend_lo = REG_D[(word2 >> 12) & 7]; @@ -5171,7 +5173,7 @@ M68KMAKE_OP(eor, 32, ., .) M68KMAKE_OP(eori, 8, ., d) { - uint res = MASK_OUT_ABOVE_8(DY ^= OPER_I_8()); + uint res = MASK_OUT_ABOVE_8(DY ^= OPER_I_8(state)); FLAG_N = NFLAG_8(res); FLAG_Z = res; @@ -5182,7 +5184,7 @@ M68KMAKE_OP(eori, 8, ., d) M68KMAKE_OP(eori, 8, ., .) { - uint src = OPER_I_8(); + uint src = OPER_I_8(state); uint ea = M68KMAKE_GET_EA_AY_8; uint res = src ^ m68ki_read_8(ea); @@ -5197,7 +5199,7 @@ M68KMAKE_OP(eori, 8, ., .) M68KMAKE_OP(eori, 16, ., d) { - uint res = MASK_OUT_ABOVE_16(DY ^= OPER_I_16()); + uint res = MASK_OUT_ABOVE_16(DY ^= OPER_I_16(state)); FLAG_N = NFLAG_16(res); FLAG_Z = res; @@ -5208,7 +5210,7 @@ M68KMAKE_OP(eori, 16, ., d) M68KMAKE_OP(eori, 16, ., .) { - uint src = OPER_I_16(); + uint src = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_16; uint res = src ^ m68ki_read_16(ea); @@ -5223,7 +5225,7 @@ M68KMAKE_OP(eori, 16, ., .) M68KMAKE_OP(eori, 32, ., d) { - uint res = DY ^= OPER_I_32(); + uint res = DY ^= OPER_I_32(state); FLAG_N = NFLAG_32(res); FLAG_Z = res; @@ -5234,7 +5236,7 @@ M68KMAKE_OP(eori, 32, ., d) M68KMAKE_OP(eori, 32, ., .) { - uint src = OPER_I_32(); + uint src = OPER_I_32(state); uint ea = M68KMAKE_GET_EA_AY_32; uint res = src ^ m68ki_read_32(ea); @@ -5249,7 +5251,7 @@ M68KMAKE_OP(eori, 32, ., .) M68KMAKE_OP(eori, 16, toc, .) { - m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_8()); + m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_8(state)); } @@ -5257,9 +5259,9 @@ M68KMAKE_OP(eori, 16, tos, .) { if(FLAG_S) { - uint src = OPER_I_16(); + uint src = OPER_I_16(state); m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ - m68ki_set_sr(m68ki_get_sr() ^ src); + m68ki_set_sr(state, m68ki_get_sr() ^ src); return; } m68ki_exception_privilege_violation(); @@ -5371,7 +5373,7 @@ M68KMAKE_OP(link, 16, ., a7) { REG_A[7] -= 4; m68ki_write_32(REG_A[7], REG_A[7]); - REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16())); + REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16(state))); } @@ -5381,7 +5383,7 @@ M68KMAKE_OP(link, 16, ., .) m68ki_push_32(*r_dst); *r_dst = REG_A[7]; - REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16())); + REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16(state))); } @@ -5391,7 +5393,7 @@ M68KMAKE_OP(link, 32, ., a7) { REG_A[7] -= 4; m68ki_write_32(REG_A[7], REG_A[7]); - REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32()); + REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32(state)); return; } m68ki_exception_illegal(); @@ -5406,7 +5408,7 @@ M68KMAKE_OP(link, 32, ., .) m68ki_push_32(*r_dst); *r_dst = REG_A[7]; - REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32()); + REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32(state)); return; } m68ki_exception_illegal(); @@ -6829,7 +6831,7 @@ M68KMAKE_OP(move, 16, tos, d) { if(FLAG_S) { - m68ki_set_sr(DY); + m68ki_set_sr(state, DY); return; } m68ki_exception_privilege_violation(); @@ -6842,7 +6844,7 @@ M68KMAKE_OP(move, 16, tos, .) { uint new_sr = M68KMAKE_GET_OPER_AY_16; m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ - m68ki_set_sr(new_sr); + m68ki_set_sr(state, new_sr); return; } m68ki_exception_privilege_violation(); @@ -6878,7 +6880,7 @@ M68KMAKE_OP(movec, 32, cr, .) { if(FLAG_S) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ switch (word2 & 0xfff) @@ -7008,7 +7010,7 @@ M68KMAKE_OP(movec, 32, rc, .) { if(FLAG_S) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ switch (word2 & 0xfff) @@ -7038,7 +7040,7 @@ M68KMAKE_OP(movec, 32, rc, .) } if (REG_CACR & (M68K_CACR_CI | M68K_CACR_CEI)) { - m68ki_ic_clear(); + m68ki_ic_clear(state); } return; } @@ -7173,7 +7175,7 @@ M68KMAKE_OP(movec, 32, rc, .) M68KMAKE_OP(movem, 16, re, pd) { uint i = 0; - uint register_list = OPER_I_16(); + uint register_list = OPER_I_16(state); uint ea = AY; uint count = 0; @@ -7193,7 +7195,7 @@ M68KMAKE_OP(movem, 16, re, pd) M68KMAKE_OP(movem, 16, re, .) { uint i = 0; - uint register_list = OPER_I_16(); + uint register_list = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_16; uint count = 0; @@ -7212,7 +7214,7 @@ M68KMAKE_OP(movem, 16, re, .) M68KMAKE_OP(movem, 32, re, pd) { uint i = 0; - uint register_list = OPER_I_16(); + uint register_list = OPER_I_16(state); uint ea = AY; uint count = 0; @@ -7233,7 +7235,7 @@ M68KMAKE_OP(movem, 32, re, pd) M68KMAKE_OP(movem, 32, re, .) { uint i = 0; - uint register_list = OPER_I_16(); + uint register_list = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_32; uint count = 0; @@ -7252,7 +7254,7 @@ M68KMAKE_OP(movem, 32, re, .) M68KMAKE_OP(movem, 16, er, pi) { uint i = 0; - uint register_list = OPER_I_16(); + uint register_list = OPER_I_16(state); uint ea = AY; uint count = 0; @@ -7272,7 +7274,7 @@ M68KMAKE_OP(movem, 16, er, pi) M68KMAKE_OP(movem, 16, er, pcdi) { uint i = 0; - uint register_list = OPER_I_16(); + uint register_list = OPER_I_16(state); uint ea = EA_PCDI_16(); uint count = 0; @@ -7291,7 +7293,7 @@ M68KMAKE_OP(movem, 16, er, pcdi) M68KMAKE_OP(movem, 16, er, pcix) { uint i = 0; - uint register_list = OPER_I_16(); + uint register_list = OPER_I_16(state); uint ea = EA_PCIX_16(); uint count = 0; @@ -7310,7 +7312,7 @@ M68KMAKE_OP(movem, 16, er, pcix) M68KMAKE_OP(movem, 16, er, .) { uint i = 0; - uint register_list = OPER_I_16(); + uint register_list = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_16; uint count = 0; @@ -7329,7 +7331,7 @@ M68KMAKE_OP(movem, 16, er, .) M68KMAKE_OP(movem, 32, er, pi) { uint i = 0; - uint register_list = OPER_I_16(); + uint register_list = OPER_I_16(state); uint ea = AY; uint count = 0; @@ -7349,7 +7351,7 @@ M68KMAKE_OP(movem, 32, er, pi) M68KMAKE_OP(movem, 32, er, pcdi) { uint i = 0; - uint register_list = OPER_I_16(); + uint register_list = OPER_I_16(state); uint ea = EA_PCDI_32(); uint count = 0; @@ -7368,7 +7370,7 @@ M68KMAKE_OP(movem, 32, er, pcdi) M68KMAKE_OP(movem, 32, er, pcix) { uint i = 0; - uint register_list = OPER_I_16(); + uint register_list = OPER_I_16(state); uint ea = EA_PCIX_32(); uint count = 0; @@ -7387,7 +7389,7 @@ M68KMAKE_OP(movem, 32, er, pcix) M68KMAKE_OP(movem, 32, er, .) { uint i = 0; - uint register_list = OPER_I_16(); + uint register_list = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_32; uint count = 0; @@ -7449,7 +7451,7 @@ M68KMAKE_OP(moves, 8, ., .) { if(FLAG_S) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_8; m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ @@ -7484,7 +7486,7 @@ M68KMAKE_OP(moves, 16, ., .) { if(FLAG_S) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_16; m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ @@ -7519,7 +7521,7 @@ M68KMAKE_OP(moves, 32, ., .) { if(FLAG_S) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_32; m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ @@ -7556,7 +7558,7 @@ M68KMAKE_OP(moveq, 32, ., .) M68KMAKE_OP(move16, 32, ., .) { - uint16 w2 = OPER_I_16(); + uint16 w2 = OPER_I_16(state); int ax = REG_IR & 7; int ay = (w2 >> 12) & 7; @@ -7632,7 +7634,7 @@ M68KMAKE_OP(mull, 32, ., d) if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint64 src = DY; uint64 dst = REG_D[(word2 >> 12) & 7]; uint64 res; @@ -7680,7 +7682,7 @@ M68KMAKE_OP(mull, 32, ., d) if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint src = DY; uint dst = REG_D[(word2 >> 12) & 7]; uint neg = GET_MSB_32(src ^ dst); @@ -7756,7 +7758,7 @@ M68KMAKE_OP(mull, 32, ., .) if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint64 src = M68KMAKE_GET_OPER_AY_32; uint64 dst = REG_D[(word2 >> 12) & 7]; uint64 res; @@ -7804,7 +7806,7 @@ M68KMAKE_OP(mull, 32, ., .) if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint word2 = OPER_I_16(); + uint word2 = OPER_I_16(state); uint src = M68KMAKE_GET_OPER_AY_32; uint dst = REG_D[(word2 >> 12) & 7]; uint neg = GET_MSB_32(src ^ dst); @@ -8324,7 +8326,7 @@ M68KMAKE_OP(or, 32, re, .) M68KMAKE_OP(ori, 8, ., d) { - uint res = MASK_OUT_ABOVE_8((DY |= OPER_I_8())); + uint res = MASK_OUT_ABOVE_8((DY |= OPER_I_8(state))); FLAG_N = NFLAG_8(res); FLAG_Z = res; @@ -8335,7 +8337,7 @@ M68KMAKE_OP(ori, 8, ., d) M68KMAKE_OP(ori, 8, ., .) { - uint src = OPER_I_8(); + uint src = OPER_I_8(state); uint ea = M68KMAKE_GET_EA_AY_8; uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); @@ -8350,7 +8352,7 @@ M68KMAKE_OP(ori, 8, ., .) M68KMAKE_OP(ori, 16, ., d) { - uint res = MASK_OUT_ABOVE_16(DY |= OPER_I_16()); + uint res = MASK_OUT_ABOVE_16(DY |= OPER_I_16(state)); FLAG_N = NFLAG_16(res); FLAG_Z = res; @@ -8361,7 +8363,7 @@ M68KMAKE_OP(ori, 16, ., d) M68KMAKE_OP(ori, 16, ., .) { - uint src = OPER_I_16(); + uint src = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_16; uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); @@ -8376,7 +8378,7 @@ M68KMAKE_OP(ori, 16, ., .) M68KMAKE_OP(ori, 32, ., d) { - uint res = DY |= OPER_I_32(); + uint res = DY |= OPER_I_32(state); FLAG_N = NFLAG_32(res); FLAG_Z = res; @@ -8387,7 +8389,7 @@ M68KMAKE_OP(ori, 32, ., d) M68KMAKE_OP(ori, 32, ., .) { - uint src = OPER_I_32(); + uint src = OPER_I_32(state); uint ea = M68KMAKE_GET_EA_AY_32; uint res = src | m68ki_read_32(ea); @@ -8402,7 +8404,7 @@ M68KMAKE_OP(ori, 32, ., .) M68KMAKE_OP(ori, 16, toc, .) { - m68ki_set_ccr(m68ki_get_ccr() | OPER_I_8()); + m68ki_set_ccr(m68ki_get_ccr() | OPER_I_8(state)); } @@ -8410,9 +8412,9 @@ M68KMAKE_OP(ori, 16, tos, .) { if(FLAG_S) { - uint src = OPER_I_16(); + uint src = OPER_I_16(state); m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ - m68ki_set_sr(m68ki_get_sr() | src); + m68ki_set_sr(state, m68ki_get_sr() | src); return; } m68ki_exception_privilege_violation(); @@ -8424,7 +8426,7 @@ M68KMAKE_OP(pack, 16, rr, .) if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { /* Note: DX and DY are reversed in Motorola's docs */ - uint src = DY + OPER_I_16(); + uint src = DY + OPER_I_16(state); uint* r_dst = &DX; *r_dst = MASK_OUT_BELOW_8(*r_dst) | ((src >> 4) & 0x00f0) | (src & 0x000f); @@ -8442,7 +8444,7 @@ M68KMAKE_OP(pack, 16, mm, ax7) uint ea_src = EA_AY_PD_8(); uint src = m68ki_read_8(ea_src); ea_src = EA_AY_PD_8(); - src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(); + src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(state); m68ki_write_8(EA_A7_PD_8(), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0)); return; @@ -8459,7 +8461,7 @@ M68KMAKE_OP(pack, 16, mm, ay7) uint ea_src = EA_A7_PD_8(); uint src = m68ki_read_8(ea_src); ea_src = EA_A7_PD_8(); - src = (src | (m68ki_read_8(ea_src) << 8)) + OPER_I_16(); + src = (src | (m68ki_read_8(ea_src) << 8)) + OPER_I_16(state); m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f)); return; @@ -8475,7 +8477,7 @@ M68KMAKE_OP(pack, 16, mm, axy7) uint ea_src = EA_A7_PD_8(); uint src = m68ki_read_8(ea_src); ea_src = EA_A7_PD_8(); - src = (src | (m68ki_read_8(ea_src) << 8)) + OPER_I_16(); + src = (src | (m68ki_read_8(ea_src) << 8)) + OPER_I_16(state); m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f)); return; @@ -8492,7 +8494,7 @@ M68KMAKE_OP(pack, 16, mm, .) uint ea_src = EA_AY_PD_8(); uint src = m68ki_read_8(ea_src); ea_src = EA_AY_PD_8(); - src = (src | (m68ki_read_8(ea_src) << 8)) + OPER_I_16(); + src = (src | (m68ki_read_8(ea_src) << 8)) + OPER_I_16(state); m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f)); return; @@ -8532,7 +8534,7 @@ M68KMAKE_OP(pmmu, 32, ., .) { if ((CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) && (HAS_PMMU)) { - m68851_mmu_ops(); + void m68851_mmu_ops(m68ki_cpu_core *state); } else { @@ -9333,7 +9335,7 @@ M68KMAKE_OP(rtd, 32, ., .) uint new_pc = m68ki_pull_32(); m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ - REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16())); + REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16(state))); m68ki_jump(new_pc); return; } @@ -9357,7 +9359,7 @@ M68KMAKE_OP(rte, 32, ., .) new_sr = m68ki_pull_16(); new_pc = m68ki_pull_32(); m68ki_jump(new_pc); - m68ki_set_sr(new_sr); + m68ki_set_sr(state, new_sr); CPU_INSTR_MODE = INSTRUCTION_YES; CPU_RUN_MODE = RUN_MODE_NORMAL; @@ -9374,7 +9376,7 @@ M68KMAKE_OP(rte, 32, ., .) new_pc = m68ki_pull_32(); m68ki_fake_pull_16(); /* format word */ m68ki_jump(new_pc); - m68ki_set_sr(new_sr); + m68ki_set_sr(state, new_sr); CPU_INSTR_MODE = INSTRUCTION_YES; CPU_RUN_MODE = RUN_MODE_NORMAL; return; @@ -9384,7 +9386,7 @@ M68KMAKE_OP(rte, 32, ., .) new_pc = m68ki_pull_32(); m68ki_fake_pull_16(); /* format word */ m68ki_jump(new_pc); - m68ki_set_sr(new_sr); + m68ki_set_sr(state, new_sr); CPU_INSTR_MODE = INSTRUCTION_YES; CPU_RUN_MODE = RUN_MODE_NORMAL; m68ki_fake_pull_16(); /* special status */ @@ -9419,7 +9421,7 @@ rte_loop: new_pc = m68ki_pull_32(); m68ki_fake_pull_16(); /* format word */ m68ki_jump(new_pc); - m68ki_set_sr(new_sr); + m68ki_set_sr(state, new_sr); CPU_INSTR_MODE = INSTRUCTION_YES; CPU_RUN_MODE = RUN_MODE_NORMAL; return; @@ -9427,7 +9429,7 @@ rte_loop: new_sr = m68ki_pull_16(); m68ki_fake_pull_32(); /* program counter */ m68ki_fake_pull_16(); /* format word */ - m68ki_set_sr_noint(new_sr); + m68ki_set_sr_noint(state, new_sr); goto rte_loop; case 2: /* Trap */ new_sr = m68ki_pull_16(); @@ -9435,7 +9437,7 @@ rte_loop: m68ki_fake_pull_16(); /* format word */ m68ki_fake_pull_32(); /* address */ m68ki_jump(new_pc); - m68ki_set_sr(new_sr); + m68ki_set_sr(state, new_sr); CPU_INSTR_MODE = INSTRUCTION_YES; CPU_RUN_MODE = RUN_MODE_NORMAL; return; @@ -9459,7 +9461,7 @@ rte_loop: m68ki_fake_pull_32(); /* $34: pd2 */ m68ki_fake_pull_32(); /* $38: pd3 */ m68ki_jump(new_pc); - m68ki_set_sr(new_sr); + m68ki_set_sr(state, new_sr); CPU_INSTR_MODE = INSTRUCTION_YES; CPU_RUN_MODE = RUN_MODE_NORMAL; return; @@ -9478,7 +9480,7 @@ rte_loop: m68ki_fake_pull_32(); /* $1c: internal registers */ m68ki_jump(new_pc); - m68ki_set_sr(new_sr); + m68ki_set_sr(state, new_sr); CPU_INSTR_MODE = INSTRUCTION_YES; CPU_RUN_MODE = RUN_MODE_NORMAL; return; @@ -9513,7 +9515,7 @@ rte_loop: m68ki_fake_pull_32(); /* $58: */ m68ki_jump(new_pc); - m68ki_set_sr(new_sr); + m68ki_set_sr(state, new_sr); CPU_INSTR_MODE = INSTRUCTION_YES; CPU_RUN_MODE = RUN_MODE_NORMAL; return; @@ -9589,7 +9591,7 @@ M68KMAKE_OP(sbcd, 8, rr, .) M68KMAKE_OP(sbcd, 8, mm, ax7) { - uint src = OPER_AY_PD_8(); + uint src = OPER_AY_PD_8(state); uint ea = EA_A7_PD_8(); uint dst = m68ki_read_8(ea); uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(); @@ -9619,7 +9621,7 @@ M68KMAKE_OP(sbcd, 8, mm, ax7) M68KMAKE_OP(sbcd, 8, mm, ay7) { - uint src = OPER_A7_PD_8(); + uint src = OPER_A7_PD_8(state); uint ea = EA_AX_PD_8(); uint dst = m68ki_read_8(ea); uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(); @@ -9649,7 +9651,7 @@ M68KMAKE_OP(sbcd, 8, mm, ay7) M68KMAKE_OP(sbcd, 8, mm, axy7) { - uint src = OPER_A7_PD_8(); + uint src = OPER_A7_PD_8(state); uint ea = EA_A7_PD_8(); uint dst = m68ki_read_8(ea); uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(); @@ -9679,7 +9681,7 @@ M68KMAKE_OP(sbcd, 8, mm, axy7) M68KMAKE_OP(sbcd, 8, mm, .) { - uint src = OPER_AY_PD_8(); + uint src = OPER_AY_PD_8(state); uint ea = EA_AX_PD_8(); uint dst = m68ki_read_8(ea); uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(); @@ -9753,10 +9755,10 @@ M68KMAKE_OP(stop, 0, ., .) { if(FLAG_S) { - uint new_sr = OPER_I_16(); + uint new_sr = OPER_I_16(state); m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ CPU_STOPPED |= STOP_LEVEL_STOP; - m68ki_set_sr(new_sr); + m68ki_set_sr(state, new_sr); if(m68ki_remaining_cycles >= CYC_INSTRUCTION[REG_IR]) m68ki_remaining_cycles = CYC_INSTRUCTION[REG_IR]; else @@ -9996,7 +9998,7 @@ M68KMAKE_OP(suba, 32, ., .) M68KMAKE_OP(subi, 8, ., d) { uint* r_dst = &DY; - uint src = OPER_I_8(); + uint src = OPER_I_8(state); uint dst = MASK_OUT_ABOVE_8(*r_dst); uint res = dst - src; @@ -10011,7 +10013,7 @@ M68KMAKE_OP(subi, 8, ., d) M68KMAKE_OP(subi, 8, ., .) { - uint src = OPER_I_8(); + uint src = OPER_I_8(state); uint ea = M68KMAKE_GET_EA_AY_8; uint dst = m68ki_read_8(ea); uint res = dst - src; @@ -10028,7 +10030,7 @@ M68KMAKE_OP(subi, 8, ., .) M68KMAKE_OP(subi, 16, ., d) { uint* r_dst = &DY; - uint src = OPER_I_16(); + uint src = OPER_I_16(state); uint dst = MASK_OUT_ABOVE_16(*r_dst); uint res = dst - src; @@ -10043,7 +10045,7 @@ M68KMAKE_OP(subi, 16, ., d) M68KMAKE_OP(subi, 16, ., .) { - uint src = OPER_I_16(); + uint src = OPER_I_16(state); uint ea = M68KMAKE_GET_EA_AY_16; uint dst = m68ki_read_16(ea); uint res = dst - src; @@ -10060,7 +10062,7 @@ M68KMAKE_OP(subi, 16, ., .) M68KMAKE_OP(subi, 32, ., d) { uint* r_dst = &DY; - uint src = OPER_I_32(); + uint src = OPER_I_32(state); uint dst = *r_dst; uint res = dst - src; @@ -10075,7 +10077,7 @@ M68KMAKE_OP(subi, 32, ., d) M68KMAKE_OP(subi, 32, ., .) { - uint src = OPER_I_32(); + uint src = OPER_I_32(state); uint ea = M68KMAKE_GET_EA_AY_32; uint dst = m68ki_read_32(ea); uint res = dst - src; @@ -10257,7 +10259,7 @@ M68KMAKE_OP(subx, 32, rr, .) M68KMAKE_OP(subx, 8, mm, ax7) { - uint src = OPER_AY_PD_8(); + uint src = OPER_AY_PD_8(state); uint ea = EA_A7_PD_8(); uint dst = m68ki_read_8(ea); uint res = dst - src - XFLAG_AS_1(); @@ -10275,7 +10277,7 @@ M68KMAKE_OP(subx, 8, mm, ax7) M68KMAKE_OP(subx, 8, mm, ay7) { - uint src = OPER_A7_PD_8(); + uint src = OPER_A7_PD_8(state); uint ea = EA_AX_PD_8(); uint dst = m68ki_read_8(ea); uint res = dst - src - XFLAG_AS_1(); @@ -10293,7 +10295,7 @@ M68KMAKE_OP(subx, 8, mm, ay7) M68KMAKE_OP(subx, 8, mm, axy7) { - uint src = OPER_A7_PD_8(); + uint src = OPER_A7_PD_8(state); uint ea = EA_A7_PD_8(); uint dst = m68ki_read_8(ea); uint res = dst - src - XFLAG_AS_1(); @@ -10311,7 +10313,7 @@ M68KMAKE_OP(subx, 8, mm, axy7) M68KMAKE_OP(subx, 8, mm, .) { - uint src = OPER_AY_PD_8(); + uint src = OPER_AY_PD_8(state); uint ea = EA_AX_PD_8(); uint dst = m68ki_read_8(ea); uint res = dst - src - XFLAG_AS_1(); @@ -10329,7 +10331,7 @@ M68KMAKE_OP(subx, 8, mm, .) M68KMAKE_OP(subx, 16, mm, .) { - uint src = OPER_AY_PD_16(); + uint src = OPER_AY_PD_16(state); uint ea = EA_AX_PD_16(); uint dst = m68ki_read_16(ea); uint res = dst - src - XFLAG_AS_1(); @@ -10347,7 +10349,7 @@ M68KMAKE_OP(subx, 16, mm, .) M68KMAKE_OP(subx, 32, mm, .) { - uint src = OPER_AY_PD_32(); + uint src = OPER_AY_PD_32(state); uint ea = EA_AX_PD_32(); uint dst = m68ki_read_32(ea); uint res = dst - src - XFLAG_AS_1(); @@ -10569,7 +10571,7 @@ M68KMAKE_OP(tst, 8, ., pcdi) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint res = OPER_PCDI_8(); + uint res = OPER_PCDI_8(state); FLAG_N = NFLAG_8(res); FLAG_Z = res; @@ -10585,7 +10587,7 @@ M68KMAKE_OP(tst, 8, ., pcix) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint res = OPER_PCIX_8(); + uint res = OPER_PCIX_8(state); FLAG_N = NFLAG_8(res); FLAG_Z = res; @@ -10601,7 +10603,7 @@ M68KMAKE_OP(tst, 8, ., i) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint res = OPER_I_8(); + uint res = OPER_I_8(state); FLAG_N = NFLAG_8(res); FLAG_Z = res; @@ -10655,7 +10657,7 @@ M68KMAKE_OP(tst, 16, ., pcdi) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint res = OPER_PCDI_16(); + uint res = OPER_PCDI_16(state); FLAG_N = NFLAG_16(res); FLAG_Z = res; @@ -10671,7 +10673,7 @@ M68KMAKE_OP(tst, 16, ., pcix) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint res = OPER_PCIX_16(); + uint res = OPER_PCIX_16(state); FLAG_N = NFLAG_16(res); FLAG_Z = res; @@ -10687,7 +10689,7 @@ M68KMAKE_OP(tst, 16, ., i) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint res = OPER_I_16(); + uint res = OPER_I_16(state); FLAG_N = NFLAG_16(res); FLAG_Z = res; @@ -10741,7 +10743,7 @@ M68KMAKE_OP(tst, 32, ., pcdi) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint res = OPER_PCDI_32(); + uint res = OPER_PCDI_32(state); FLAG_N = NFLAG_32(res); FLAG_Z = res; @@ -10757,7 +10759,7 @@ M68KMAKE_OP(tst, 32, ., pcix) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint res = OPER_PCIX_32(); + uint res = OPER_PCIX_32(state); FLAG_N = NFLAG_32(res); FLAG_Z = res; @@ -10773,7 +10775,7 @@ M68KMAKE_OP(tst, 32, ., i) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint res = OPER_I_32(); + uint res = OPER_I_32(state); FLAG_N = NFLAG_32(res); FLAG_Z = res; @@ -10808,7 +10810,7 @@ M68KMAKE_OP(unpk, 16, rr, .) uint src = DY; uint* r_dst = &DX; - *r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16()) & 0xffff); + *r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(state)) & 0xffff); return; } m68ki_exception_illegal(); @@ -10820,10 +10822,10 @@ M68KMAKE_OP(unpk, 16, mm, ax7) if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { /* Note: AX and AY are reversed in Motorola's docs */ - uint src = OPER_AY_PD_8(); + uint src = OPER_AY_PD_8(state); uint ea_dst; - src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(state); ea_dst = EA_A7_PD_8(); m68ki_write_8(ea_dst, src & 0xff); ea_dst = EA_A7_PD_8(); @@ -10839,10 +10841,10 @@ M68KMAKE_OP(unpk, 16, mm, ay7) if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { /* Note: AX and AY are reversed in Motorola's docs */ - uint src = OPER_A7_PD_8(); + uint src = OPER_A7_PD_8(state); uint ea_dst; - src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(state); ea_dst = EA_AX_PD_8(); m68ki_write_8(ea_dst, src & 0xff); ea_dst = EA_AX_PD_8(); @@ -10857,10 +10859,10 @@ M68KMAKE_OP(unpk, 16, mm, axy7) { if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { - uint src = OPER_A7_PD_8(); + uint src = OPER_A7_PD_8(state); uint ea_dst; - src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(state); ea_dst = EA_A7_PD_8(); m68ki_write_8(ea_dst, src & 0xff); ea_dst = EA_A7_PD_8(); @@ -10876,10 +10878,10 @@ M68KMAKE_OP(unpk, 16, mm, .) if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) { /* Note: AX and AY are reversed in Motorola's docs */ - uint src = OPER_AY_PD_8(); + uint src = OPER_AY_PD_8(state); uint ea_dst; - src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(); + src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(state); ea_dst = EA_AX_PD_8(); m68ki_write_8(ea_dst, src & 0xff); ea_dst = EA_AX_PD_8();