From 9cbdb635a4bd78e6767e735a062c0d9a5766b849 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Martin=20Storsj=C3=B6?= Date: Fri, 14 Aug 2015 00:00:57 +0300 Subject: [PATCH 1/1] checkasm: Try different widths for ssd_nv12 To test all codepaths in the aarch64 neon implementation, one at the very least needs to test with width 8, 16, 24 and 32. --- tools/checkasm.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/tools/checkasm.c b/tools/checkasm.c index 183cef5f..01a97c93 100644 --- a/tools/checkasm.c +++ b/tools/checkasm.c @@ -716,13 +716,16 @@ static int check_pixel( int cpu_ref, int cpu_new ) used_asm = 1; set_func_name( "ssd_nv12" ); uint64_t res_u_c, res_v_c, res_u_a, res_v_a; - pixel_c.ssd_nv12_core( pbuf1, 368, pbuf2, 368, 360, 8, &res_u_c, &res_v_c ); - pixel_asm.ssd_nv12_core( pbuf1, 368, pbuf2, 368, 360, 8, &res_u_a, &res_v_a ); - if( res_u_c != res_u_a || res_v_c != res_v_a ) + for( int w = 8; w <= 360; w += 8 ) { - ok = 0; - fprintf( stderr, "ssd_nv12: %"PRIu64",%"PRIu64" != %"PRIu64",%"PRIu64"\n", - res_u_c, res_v_c, res_u_a, res_v_a ); + pixel_c.ssd_nv12_core( pbuf1, 368, pbuf2, 368, w, 8, &res_u_c, &res_v_c ); + pixel_asm.ssd_nv12_core( pbuf1, 368, pbuf2, 368, w, 8, &res_u_a, &res_v_a ); + if( res_u_c != res_u_a || res_v_c != res_v_a ) + { + ok = 0; + fprintf( stderr, "ssd_nv12: %"PRIu64",%"PRIu64" != %"PRIu64",%"PRIu64"\n", + res_u_c, res_v_c, res_u_a, res_v_a ); + } } call_c( pixel_c.ssd_nv12_core, pbuf1, (intptr_t)368, pbuf2, (intptr_t)368, 360, 8, &res_u_c, &res_v_c ); call_a( pixel_asm.ssd_nv12_core, pbuf1, (intptr_t)368, pbuf2, (intptr_t)368, 360, 8, &res_u_a, &res_v_a ); -- 2.39.5