14 #include <sys/types.h>
16 #include <sys/ioctl.h>
18 #include <linux/input.h>
23 #include "config_file/config_file.h"
30 struct termios term2 = term;
31 term2.c_lflag &= ~ICANON;
32 tcsetattr(0, TCSANOW, &term2);
35 ioctl(0, FIONREAD, &byteswaiting);
37 tcsetattr(0, TCSANOW, &term);
39 return byteswaiting > 0;
42 //#define BCM2708_PERI_BASE 0x20000000 //pi0-1
43 //#define BCM2708_PERI_BASE 0xFE000000 //pi4
44 #define BCM2708_PERI_BASE 0x3F000000 // pi3
45 #define BCM2708_PERI_SIZE 0x01000000
46 #define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO controller */
47 #define GPCLK_BASE (BCM2708_PERI_BASE + 0x101000)
48 #define GPIO_ADDR 0x200000 /* GPIO controller */
49 #define GPCLK_ADDR 0x101000
50 #define CLK_PASSWD 0x5a000000
51 #define CLK_GP0_CTL 0x070
52 #define CLK_GP0_DIV 0x074
58 #define STATUSREGADDR \
59 GPIO_CLR = 1 << SA0; \
60 GPIO_CLR = 1 << SA1; \
63 GPIO_CLR = 1 << SA0; \
64 GPIO_CLR = 1 << SA1; \
67 GPIO_SET = 1 << SA0; \
68 GPIO_CLR = 1 << SA1; \
71 GPIO_CLR = 1 << SA0; \
72 GPIO_SET = 1 << SA1; \
75 GPIO_SET = 1 << SA0; \
76 GPIO_SET = 1 << SA1; \
79 #define PAGE_SIZE (4 * 1024)
80 #define BLOCK_SIZE (4 * 1024)
82 #define GPIOSET(no, ishigh) \
87 reset |= (1 << (no)); \
90 #define FASTBASE 0x07FFFFFF
91 #define FASTSIZE 0xFFFFFFF
92 #define GAYLEBASE 0xD80000 // D7FFFF
93 #define GAYLESIZE 0x6FFFF
95 #define JOY0DAT 0xDFF00A
96 #define JOY1DAT 0xDFF00C
97 #define CIAAPRA 0xBFE001
98 #define POTGOR 0xDFF016
100 int kb_hook_enabled = 0;
101 int mouse_hook_enabled = 0;
103 char mouse_dx = 0, mouse_dy = 0;
104 char mouse_buttons = 0;
106 #define KICKBASE 0xF80000
107 #define KICKSIZE 0x7FFFF
109 int mem_fd, mouse_fd = -1;
111 int gayle_emulation_enabled = 1;
115 // Configurable emulator options
116 unsigned int cpu_type = M68K_CPU_TYPE_68000;
117 unsigned int loop_cycles = 300;
118 struct emulator_config *cfg = NULL;
121 volatile unsigned int *gpio;
122 volatile unsigned int *gpclk;
123 volatile unsigned int gpfsel0;
124 volatile unsigned int gpfsel1;
125 volatile unsigned int gpfsel2;
126 volatile unsigned int gpfsel0_o;
127 volatile unsigned int gpfsel1_o;
128 volatile unsigned int gpfsel2_o;
130 // GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x) or
132 #define INP_GPIO(g) *(gpio + ((g) / 10)) &= ~(7 << (((g) % 10) * 3))
133 #define OUT_GPIO(g) *(gpio + ((g) / 10)) |= (1 << (((g) % 10) * 3))
134 #define SET_GPIO_ALT(g, a) \
135 *(gpio + (((g) / 10))) |= \
136 (((a) <= 3 ? (a) + 4 : (a) == 4 ? 3 : 2) << (((g) % 10) * 3))
139 *(gpio + 7) // sets bits which are 1 ignores bits which are 0
141 *(gpio + 10) // clears bits which are 1 ignores bits which are 0
143 #define GET_GPIO(g) (*(gpio + 13) & (1 << g)) // 0 if LOW, (1<<g) if HIGH
145 #define GPIO_PULL *(gpio + 37) // Pull up/pull down
146 #define GPIO_PULLCLK0 *(gpio + 38) // Pull up/pull down clock
150 uint32_t read8(uint32_t address);
151 void write8(uint32_t address, uint32_t data);
153 uint32_t read16(uint32_t address);
154 void write16(uint32_t address, uint32_t data);
156 void write32(uint32_t address, uint32_t data);
157 uint32_t read32(uint32_t address);
159 uint16_t read_reg(void);
160 void write_reg(unsigned int value);
162 volatile uint16_t srdata;
163 volatile uint32_t srdata2;
164 volatile uint32_t srdata2_old;
166 //unsigned char g_kick[524288];
167 //unsigned char g_ram[FASTSIZE + 1]; /* RAM */
168 unsigned char toggle;
169 static volatile unsigned char ovl;
170 static volatile unsigned char maprom;
172 void sigint_handler(int sig_num) {
173 printf("\n Exit Ctrl+C %d\n", sig_num);
181 void *iplThread(void *args) {
182 printf("IPL thread running/n");
186 if (GET_GPIO(1) == 0) {
188 m68k_end_timeslice();
189 //printf("thread!/n");
198 int main(int argc, char *argv[]) {
200 const struct sched_param priority = {99};
202 // Some command line switch stuffles
203 for (g = 1; g < argc; g++) {
204 if (strcmp(argv[g], "--disable-gayle") == 0) {
205 gayle_emulation_enabled = 0;
207 else if (strcmp(argv[g], "--cpu_type") == 0 || strcmp(argv[g], "--cpu") == 0) {
209 printf("%s switch found, but no CPU type specified.\n", argv[g]);
212 cpu_type = get_m68k_cpu_type(argv[g]);
215 else if (strcmp(argv[g], "--config-file") == 0 || strcmp(argv[g], "--config") == 0) {
217 printf("%s switch found, but no config filename specified.\n", argv[g]);
220 cfg = load_config_file(argv[g]);
226 printf("No config file specified. Trying to load default.cfg...\n");
227 cfg = load_config_file("default.cfg");
229 printf("Couldn't load default.cfg, empty emulator config will be used.\n");
230 cfg = (struct emulator_config *)calloc(1, sizeof(struct emulator_config));
232 printf("Failed to allocate memory for emulator config!\n");
235 memset(cfg, 0x00, sizeof(struct emulator_config));
239 if (cfg->cpu_type) cpu_type = cfg->cpu_type;
240 if (cfg->loop_cycles) loop_cycles = cfg->loop_cycles;
243 if (cfg->mouse_enabled) {
244 mouse_fd = open(cfg->mouse_file, O_RDONLY | O_NONBLOCK);
245 if (mouse_fd == -1) {
246 printf("Failed to open %s, can't enable mouse hook.\n", cfg->mouse_file);
247 cfg->mouse_enabled = 0;
251 sched_setscheduler(0, SCHED_FIFO, &priority);
252 mlockall(MCL_CURRENT); // lock in memory to keep us from paging out
256 signal(SIGINT, sigint_handler);
259 //goto skip_everything;
261 // Enable 200MHz CLK output on GPIO4, adjust divider and pll source depending
263 printf("Enable 200MHz GPCLK0 on GPIO4\n");
265 *(gpclk + (CLK_GP0_CTL / 4)) = CLK_PASSWD | (1 << 5);
267 while ((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7))
270 *(gpclk + (CLK_GP0_DIV / 4)) =
271 CLK_PASSWD | (6 << 12); // divider , 6=200MHz on pi3
273 *(gpclk + (CLK_GP0_CTL / 4)) =
274 CLK_PASSWD | 5 | (1 << 4); // pll? 6=plld, 5=pllc
276 while (((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7)) == 0)
280 SET_GPIO_ALT(4, 0); // gpclk0
290 // set gpio0 (aux0) and gpio1 (aux1) to input
294 // Set GPIO pins 6,7 and 8-23 to output
295 for (g = 6; g <= 23; g++) {
299 printf("Precalculate GPIO8-23 as Output\n");
300 gpfsel0_o = *(gpio); // store gpio ddr
301 printf("gpfsel0: %#x\n", gpfsel0_o);
302 gpfsel1_o = *(gpio + 1); // store gpio ddr
303 printf("gpfsel1: %#x\n", gpfsel1_o);
304 gpfsel2_o = *(gpio + 2); // store gpio ddr
305 printf("gpfsel2: %#x\n", gpfsel2_o);
307 // Set GPIO pins 8-23 to input
308 for (g = 8; g <= 23; g++) {
311 printf("Precalculate GPIO8-23 as Input\n");
312 gpfsel0 = *(gpio); // store gpio ddr
313 printf("gpfsel0: %#x\n", gpfsel0);
314 gpfsel1 = *(gpio + 1); // store gpio ddr
315 printf("gpfsel1: %#x\n", gpfsel1);
316 gpfsel2 = *(gpio + 2); // store gpio ddr
317 printf("gpfsel2: %#x\n", gpfsel2);
326 // reset cpld statemachine first
334 // load kick.rom if present
337 fd = open("kick.rom", O_RDONLY);
339 printf("Failed loading kick.rom, using motherboard kickstart\n");
342 int size = (int)lseek(fd, 0, SEEK_END);
343 if (size == 0x40000) {
344 lseek(fd, 0, SEEK_SET);
345 read(fd, &g_kick, size);
346 lseek(fd, 0, SEEK_SET);
347 read(fd, &g_kick[0x40000], size);
349 lseek(fd, 0, SEEK_SET);
350 read(fd, &g_kick, size);
352 printf("Loaded kick.rom with size %d kib\n", size / 1024);
355 // reset amiga and statemachine
359 m68k_write_memory_8(0xbfe201, 0x0001); // AMIGA OVL
360 m68k_write_memory_8(0xbfe001, 0x0001); // AMIGA OVL high (ROM@0x0)
365 m68k_set_cpu_type(cpu_type);
369 m68k_set_reg(M68K_REG_PC, 0xF80002);
371 m68k_set_reg(M68K_REG_PC, 0x0);
377 err = pthread_create(&id, NULL, &iplThread, NULL);
379 printf("\ncan't create IPL thread :[%s]", strerror(err));
381 printf("\n IPL Thread created successfully\n");
384 int cpu_emulation_running = 1;
388 if (mouse_hook_enabled) {
389 if (get_mouse_status(&mouse_dx, &mouse_dy, &mouse_buttons)) {
390 //printf("Maus: %d (%.2X), %d (%.2X), B:%.2X\n", mouse_dx, mouse_dx, mouse_dy, mouse_dy, mouse_buttons);
394 if (cpu_emulation_running)
395 m68k_execute(loop_cycles);
399 if (c == cfg->keyboard_toggle_key && !kb_hook_enabled) {
401 printf("Keyboard hook enabled.\n");
403 else if (c == 0x1B && kb_hook_enabled) {
405 printf("Keyboard hook disabled.\n");
407 if (c == cfg->mouse_toggle_key) {
408 mouse_hook_enabled ^= 1;
409 printf("Mouse hook %s.\n", mouse_hook_enabled ? "enabled" : "disabled");
410 mouse_dx = mouse_dy = mouse_buttons = 0;
413 cpu_emulation_running ^= 1;
414 printf("CPU emulation is now %s\n", cpu_emulation_running ? "running" : "stopped");
420 m68k_set_irq((srdata >> 13) & 0xff);
428 if (GET_GPIO(1) == 0){
430 m68k_set_irq((srdata >> 13) & 0xff);
432 if (CheckIrq() == 1){
433 write16(0xdff09c, 0x8008);
444 void cpu_pulse_reset(void) {
446 // printf("Status Reg%x\n",read_reg());
449 // printf("Status Reg%x\n",read_reg());
452 int cpu_irq_ack(int level) {
453 printf("cpu irq ack\n");
457 static unsigned int target = 0;
459 unsigned int m68k_read_memory_8(unsigned int address) {
461 int ret = handle_mapped_read(cfg, address, &target, OP_TYPE_BYTE, ovl);
465 /*if (address > FASTBASE && address < FASTBASE + FASTSIZE) {
466 return g_ram[address - FASTBASE];
470 if (address > KICKBASE && address < KICKBASE + KICKSIZE) {
471 return g_kick[address - KICKBASE];
475 if (gayle_emulation_enabled) {
476 if (address > GAYLEBASE && address < GAYLEBASE + GAYLESIZE) {
477 return readGayleB(address);
482 // if (address < 0xffffff) {
483 return read8((uint32_t)address);
489 unsigned int m68k_read_memory_16(unsigned int address) {
491 int ret = handle_mapped_read(cfg, address, &target, OP_TYPE_WORD, ovl);
496 if (mouse_hook_enabled) {
497 if (address == JOY0DAT) {
498 // Forward mouse valueses to Amyga.
499 unsigned short result = (mouse_dy << 8) | (mouse_dx);
500 mouse_dx = mouse_dy = 0;
501 return (unsigned int)result;
503 if (address == CIAAPRA) {
504 unsigned short result = (unsigned int)read16((uint32_t)address);
505 if (mouse_buttons & 0x01) {
507 return (unsigned int)(result | 0x40);
510 return (unsigned int)result;
512 if (address == POTGOR) {
513 unsigned short result = (unsigned int)read16((uint32_t)address);
514 if (mouse_buttons & 0x02) {
516 return (unsigned int)(result | 0x2);
519 return (unsigned int)result;
522 /*if (address > FASTBASE && address < FASTBASE + FASTSIZE) {
523 return be16toh(*(uint16_t *)&g_ram[address - FASTBASE]);
527 if (address > KICKBASE && address < KICKBASE + KICKSIZE) {
528 return be16toh(*(uint16_t *)&g_kick[address - KICKBASE]);
532 if (gayle_emulation_enabled) {
533 if (address > GAYLEBASE && address < GAYLEBASE + GAYLESIZE) {
534 return readGayle(address);
538 // if (address < 0xffffff) {
540 return (unsigned int)read16((uint32_t)address);
546 unsigned int m68k_read_memory_32(unsigned int address) {
548 int ret = handle_mapped_read(cfg, address, &target, OP_TYPE_LONGWORD, ovl);
552 /*if (address > FASTBASE && address < FASTBASE + FASTSIZE) {
553 return be32toh(*(uint32_t *)&g_ram[address - FASTBASE]);
557 if (address > KICKBASE && address < KICKBASE + KICKSIZE) {
558 return be32toh(*(uint32_t *)&g_kick[address - KICKBASE]);
562 if (gayle_emulation_enabled) {
563 if (address > GAYLEBASE && address < GAYLEBASE + GAYLESIZE) {
564 return readGayleL(address);
568 // if (address < 0xffffff) {
570 uint16_t a = read16(address);
571 uint16_t b = read16(address + 2);
572 return (a << 16) | b;
578 void m68k_write_memory_8(unsigned int address, unsigned int value) {
580 int ret = handle_mapped_write(cfg, address, value, OP_TYPE_BYTE, ovl);
584 /*if (address > FASTBASE && address < FASTBASE + FASTSIZE) {
585 g_ram[address - FASTBASE] = value;
589 if (gayle_emulation_enabled) {
590 if (address > GAYLEBASE && address < GAYLEBASE + GAYLESIZE) {
591 writeGayleB(address, value);
596 if (address == 0xbfe001) {
597 ovl = (value & (1 << 0));
598 printf("OVL:%x\n", ovl);
601 // if (address < 0xffffff) {
603 write8((uint32_t)address, value);
610 void m68k_write_memory_16(unsigned int address, unsigned int value) {
612 int ret = handle_mapped_write(cfg, address, value, OP_TYPE_WORD, ovl);
616 /*if (address > FASTBASE && address < FASTBASE + FASTSIZE) {
617 *(uint16_t *)&g_ram[address - FASTBASE] = htobe16(value);
621 if (gayle_emulation_enabled) {
622 if (address > GAYLEBASE && address < GAYLEBASE + GAYLESIZE) {
623 writeGayle(address, value);
628 // if (address < 0xffffff) {
630 write16((uint32_t)address, value);
636 void m68k_write_memory_32(unsigned int address, unsigned int value) {
638 int ret = handle_mapped_write(cfg, address, value, OP_TYPE_LONGWORD, ovl);
642 /*if (address > FASTBASE && address < FASTBASE + FASTSIZE) {
643 *(uint32_t *)&g_ram[address - FASTBASE] = htobe32(value);
647 if (gayle_emulation_enabled) {
648 if (address > GAYLEBASE && address < GAYLEBASE + GAYLESIZE) {
649 writeGayleL(address, value);
653 // if (address < 0xffffff) {
655 write16(address, value >> 16);
656 write16(address + 2, value);
663 void write16(uint32_t address, uint32_t data) {
664 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
665 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
666 uint32_t addr_l_s = (address >> 16) << 8;
667 uint32_t addr_l_r = (~address >> 16) << 8;
668 uint32_t data_s = (data & 0x0000ffff) << 8;
669 uint32_t data_r = (~data & 0x0000ffff) << 8;
671 // asm volatile ("dmb" ::: "memory");
674 *(gpio + 1) = gpfsel1_o;
675 *(gpio + 2) = gpfsel2_o;
677 *(gpio + 7) = addr_h_s;
678 *(gpio + 10) = addr_h_r;
682 *(gpio + 7) = addr_l_s;
683 *(gpio + 10) = addr_l_r;
688 *(gpio + 7) = data_s;
689 *(gpio + 10) = data_r;
694 *(gpio + 1) = gpfsel1;
695 *(gpio + 2) = gpfsel2;
696 while ((GET_GPIO(0)))
698 // asm volatile ("dmb" ::: "memory");
701 void write8(uint32_t address, uint32_t data) {
702 if ((address & 1) == 0)
703 data = data + (data << 8); // EVEN, A0=0,UDS
705 data = data & 0xff; // ODD , A0=1,LDS
706 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
707 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
708 uint32_t addr_l_s = (address >> 16) << 8;
709 uint32_t addr_l_r = (~address >> 16) << 8;
710 uint32_t data_s = (data & 0x0000ffff) << 8;
711 uint32_t data_r = (~data & 0x0000ffff) << 8;
713 // asm volatile ("dmb" ::: "memory");
716 *(gpio + 1) = gpfsel1_o;
717 *(gpio + 2) = gpfsel2_o;
719 *(gpio + 7) = addr_h_s;
720 *(gpio + 10) = addr_h_r;
724 *(gpio + 7) = addr_l_s;
725 *(gpio + 10) = addr_l_r;
730 *(gpio + 7) = data_s;
731 *(gpio + 10) = data_r;
736 *(gpio + 1) = gpfsel1;
737 *(gpio + 2) = gpfsel2;
738 while ((GET_GPIO(0)))
740 // asm volatile ("dmb" ::: "memory");
743 uint32_t read16(uint32_t address) {
745 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
746 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
747 uint32_t addr_l_s = (address >> 16) << 8;
748 uint32_t addr_l_r = (~address >> 16) << 8;
750 // asm volatile ("dmb" ::: "memory");
753 *(gpio + 1) = gpfsel1_o;
754 *(gpio + 2) = gpfsel2_o;
756 *(gpio + 7) = addr_h_s;
757 *(gpio + 10) = addr_h_r;
761 *(gpio + 7) = addr_l_s;
762 *(gpio + 10) = addr_l_r;
768 *(gpio + 1) = gpfsel1;
769 *(gpio + 2) = gpfsel2;
771 while (!(GET_GPIO(0)))
776 // asm volatile ("dmb" ::: "memory");
777 return (val >> 8) & 0xffff;
780 uint32_t read8(uint32_t address) {
782 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
783 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
784 uint32_t addr_l_s = (address >> 16) << 8;
785 uint32_t addr_l_r = (~address >> 16) << 8;
787 // asm volatile ("dmb" ::: "memory");
790 *(gpio + 1) = gpfsel1_o;
791 *(gpio + 2) = gpfsel2_o;
793 *(gpio + 7) = addr_h_s;
794 *(gpio + 10) = addr_h_r;
798 *(gpio + 7) = addr_l_s;
799 *(gpio + 10) = addr_l_r;
805 *(gpio + 1) = gpfsel1;
806 *(gpio + 2) = gpfsel2;
809 while (!(GET_GPIO(0)))
814 // asm volatile ("dmb" ::: "memory");
816 val = (val >> 8) & 0xffff;
817 if ((address & 1) == 0)
818 return (val >> 8) & 0xff; // EVEN, A0=0,UDS
820 return val & 0xff; // ODD , A0=1,LDS
823 /******************************************************/
825 void write_reg(unsigned int value) {
828 *(gpio + 1) = gpfsel1_o;
829 *(gpio + 2) = gpfsel2_o;
830 *(gpio + 7) = (value & 0xffff) << 8;
831 *(gpio + 10) = (~value & 0xffff) << 8;
833 GPIO_CLR = 1 << 7; // delay
838 *(gpio + 1) = gpfsel1;
839 *(gpio + 2) = gpfsel2;
842 uint16_t read_reg(void) {
847 *(gpio + 1) = gpfsel1;
848 *(gpio + 2) = gpfsel2;
850 GPIO_CLR = 1 << 6; // delay
855 return (uint16_t)(val >> 8);
859 // Set up a memory regions to access GPIO
863 if ((mem_fd = open("/dev/mem", O_RDWR | O_SYNC)) < 0) {
864 printf("can't open /dev/mem \n");
870 NULL, // Any adddress in our space will do
871 BCM2708_PERI_SIZE, // Map length
872 PROT_READ | PROT_WRITE, // Enable reading & writting to mapped memory
873 MAP_SHARED, // Shared with other processes
874 mem_fd, // File to map
875 BCM2708_PERI_BASE // Offset to GPIO peripheral
878 close(mem_fd); // No need to keep mem_fd open after mmap
880 if (gpio_map == MAP_FAILED) {
881 printf("gpio mmap error %d\n", (int)gpio_map); // errno also set!
885 gpio = ((volatile unsigned *)gpio_map) + GPIO_ADDR / 4;
886 gpclk = ((volatile unsigned *)gpio_map) + GPCLK_ADDR / 4;
890 int get_mouse_status(char *x, char *y, char *b) {
891 struct input_event ie;
892 if (read(mouse_fd, &ie, sizeof(struct input_event)) != -1) {
893 *b = ((char *)&ie)[0];
894 *x = ((char *)&ie)[1];
895 *y = ((char *)&ie)[2];