20 //#define BCM2708_PERI_BASE 0x20000000 //pi0-1
21 //#define BCM2708_PERI_BASE 0xFE000000 //pi4
22 #define BCM2708_PERI_BASE 0x3F000000 //pi3
23 #define BCM2708_PERI_SIZE 0x01000000
24 #define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO controller */
25 #define GPCLK_BASE (BCM2708_PERI_BASE + 0x101000)
26 #define GPIO_ADDR 0x200000 /* GPIO controller */
27 #define GPCLK_ADDR 0x101000
28 #define CLK_PASSWD 0x5a000000
29 #define CLK_GP0_CTL 0x070
30 #define CLK_GP0_DIV 0x074
36 #define STATUSREGADDR GPIO_CLR = 1<<SA0;GPIO_CLR = 1<<SA1;GPIO_SET = 1<<SA2;
37 #define W16 GPIO_CLR = 1<<SA0;GPIO_CLR = 1<<SA1;GPIO_CLR = 1<<SA2;
38 #define R16 GPIO_SET = 1<<SA0;GPIO_CLR = 1<<SA1;GPIO_CLR = 1<<SA2;
39 #define W8 GPIO_CLR = 1<<SA0;GPIO_SET = 1<<SA1;GPIO_CLR = 1<<SA2;
40 #define R8 GPIO_SET = 1<<SA0;GPIO_SET = 1<<SA1;GPIO_CLR = 1<<SA2;
42 #define PAGE_SIZE (4*1024)
43 #define BLOCK_SIZE (4*1024)
45 #define GPIOSET(no, ishigh) \
50 reset |= (1 << (no)); \
54 #define FASTBASE 0x07FFFFFF
55 //#define FASTSIZE 0xFFFFFF
56 #define FASTSIZE 0xFFFFFFF
59 #define GAYLEBASE 0xD80000 //D7FFFF
60 #define GAYLESIZE 0x6FFFF
68 volatile unsigned int *gpio;
69 volatile unsigned int *gpclk;
70 volatile unsigned int gpfsel0;
71 volatile unsigned int gpfsel1;
72 volatile unsigned int gpfsel2;
73 volatile unsigned int gpfsel0_o;
74 volatile unsigned int gpfsel1_o;
75 volatile unsigned int gpfsel2_o;
77 // GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x) or SET_GPIO_ALT(x,y)
78 #define INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3))
79 #define OUT_GPIO(g) *(gpio+((g)/10)) |= (1<<(((g)%10)*3))
80 #define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3))
82 #define GPIO_SET *(gpio+7) // sets bits which are 1 ignores bits which are 0
83 #define GPIO_CLR *(gpio+10) // clears bits which are 1 ignores bits which are 0
85 #define GET_GPIO(g) (*(gpio+13)&(1<<g)) // 0 if LOW, (1<<g) if HIGH
87 #define GPIO_PULL *(gpio+37) // Pull up/pull down
88 #define GPIO_PULLCLK0 *(gpio+38) // Pull up/pull down clock
93 uint32_t read8(uint32_t address);
94 void write8(uint32_t address, uint32_t data);
96 uint32_t read16(uint32_t address);
97 void write16(uint32_t address, uint32_t data);
99 void write32(uint32_t address, uint32_t data);
100 uint32_t read32(uint32_t address);
102 uint16_t read_reg(void);
103 void write_reg(unsigned int value);
105 volatile uint16_t srdata;
106 volatile uint32_t srdata2;
107 volatile uint32_t srdata2_old;
110 unsigned char g_kick[524288];
111 unsigned char g_ram[FASTSIZE+1]; /* RAM */
112 unsigned char toggle;
113 static volatile unsigned char ovl;
114 static volatile unsigned char maprom;
117 /* Signal Handler for SIGINT */
118 void sigint_handler(int sig_num)
120 /* Reset handler to catch SIGINT next time.
121 Refer http://en.cppreference.com/w/c/program/signal */
122 printf("\n User provided signal handler for Ctrl+C \n");
124 /* Do a graceful cleanup of the program like: free memory/resources/etc and exit */
129 void* iplThread(void *args){
132 //srdata2_old = read_reg();
136 //printf("thread!/n");
137 if (GET_GPIO(1) == 0){
139 if (srdata != srdata2_old){
140 srdata2 = ((srdata >> 13)&0xff);
141 //printf("STATUS: %d\n", srdata2);
142 srdata2_old = srdata;
143 m68k_set_irq(srdata2);
150 srdata2 = ((srdata >> 13)&0xff);
151 srdata2_old = srdata;
152 m68k_set_irq(srdata2);
155 //printf("STATUS: 0\n");
171 const struct sched_param priority = {99};
173 sched_setscheduler(0, SCHED_RR , &priority);
174 printf("YES locked in memory\n");
175 mlockall(MCL_CURRENT); // lock in memory to keep us from paging out
182 ide0 = ide_allocate("cf");
183 fd = open("hd0.img", O_RDWR);
185 printf("HDD Image hd0.image failed open\n");
187 ide_attach(ide0, 0, fd);
188 ide_reset_begin(ide0);
189 printf("HDD Image hd0.image attached\n");
192 signal(SIGINT, sigint_handler);
195 //Enable 200MHz CLK output on GPIO4, adjust divider and pll source depending on pi model
196 printf("Enable GPCLK0 on GPIO4\n");
198 *(gpclk+ (CLK_GP0_CTL/4)) = CLK_PASSWD | (1 << 5);
200 while ( (*(gpclk+(CLK_GP0_CTL/4))) & (1 << 7));
202 *(gpclk+(CLK_GP0_DIV/4)) = CLK_PASSWD | (6 << 12); //divider , 6=200MHz on pi3
204 *(gpclk+(CLK_GP0_CTL/4)) = CLK_PASSWD | 5 | (1 << 4); //pll? 6=plld, 5=pllc
206 while (((*(gpclk+(CLK_GP0_CTL/4))) & (1 << 7))== 0);
209 SET_GPIO_ALT(4,0); //gpclk0
219 //set gpio0 (aux0) and gpio1 (aux1) to input
223 // Set GPIO pins 6,7 and 8-23 to output
224 for (g=6; g<=23; g++)
229 printf ("Precalculate GPIO8-23 aus Output\n");
230 gpfsel0_o =*(gpio); //store gpio ddr
231 printf ("gpfsel0: %#x\n", gpfsel0_o);
232 gpfsel1_o =*(gpio+1); //store gpio ddr
233 printf ("gpfsel1: %#x\n", gpfsel1_o);
234 gpfsel2_o =*(gpio+2); //store gpio ddr
235 printf ("gpfsel2: %#x\n", gpfsel2_o);
237 // Set GPIO pins 8-23 to input
238 for (g=8; g<=23; g++)
242 printf ("Precalculate GPIO8-23 as Input\n");
243 gpfsel0 =*(gpio); //store gpio ddr
244 printf ("gpfsel0: %#x\n", gpfsel0);
245 gpfsel1 =*(gpio+1); //store gpio ddr
246 printf ("gpfsel1: %#x\n", gpfsel1);
247 gpfsel2 =*(gpio+2); //store gpio ddr
248 printf ("gpfsel2: %#x\n", gpfsel2);
257 //reset cpld statemachine first
267 fp = fopen("kick.rom", "rb");
270 printf("kick.rom cannot be opened\n");
272 printf("kick.rom found, using that instead of motherboard rom\n");
275 unsigned int reads = fread(&g_kick, sizeof(g_kick), 1, fp);
277 printf("failed loading kick.rom\n");
279 printf("loaded kick.rom\n");
287 m68k_write_memory_8(0xbfe201,0x0001); //AMIGA OVL
288 m68k_write_memory_8(0xbfe001,0x0001); //AMIGA OVL high (ROM@0x0)
294 m68k_set_cpu_type(M68K_CPU_TYPE_68EC030);
296 srdata2_old = read_reg();
297 printf("STATUS: %d\n", srdata2_old);
304 //err = pthread_create(&id, NULL, &iplThread, NULL);
306 printf("\ncan't create IPL thread :[%s]", strerror(err));
308 printf("\n IPL Thread created successfully\n");
316 //printf("IRQ:0x%06x\n",CheckIrq());
324 if (GET_GPIO(1) == 0 || CheckIrq() == 1){
326 // if (CheckIrq() == 1) srdata |= (1 << 14);
327 if (srdata != srdata2_old){
328 srdata2 = ((srdata >> 13)&0xff);
329 //printf("STATUS: %d\n", srdata2);
330 srdata2_old = srdata;
331 m68k_set_irq(srdata2);
338 srdata2 = ((srdata >> 13)&0xff);
339 srdata2_old = srdata;
340 m68k_set_irq(srdata2);
341 //printf("STATUS: 0\n");
353 void cpu_pulse_reset(void){
361 int cpu_irq_ack(int level)
363 printf("cpu irq ack\n");
369 unsigned int m68k_read_memory_8(unsigned int address){
371 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
372 return readGayleB(address);
375 if(address>FASTBASE){
376 return g_ram[address- FASTBASE];
380 if (ovl == 1 && address<0x07FFFF ){
381 return g_kick[address];}
382 if (ovl == 0 && (address>0xF80000-1 && address<0xFFFFFF)){
383 return g_kick[address-0xF80000];}
386 if (address < 0xffffff){
387 return read8((uint32_t)address);
393 unsigned int m68k_read_memory_16(unsigned int address){
395 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
396 return readGayle(address);
399 if(address>FASTBASE){
400 uint16_t value = *(uint16_t*)&g_ram[address- FASTBASE];
401 value = (value << 8) | (value >> 8);
406 if (ovl == 1 && address<0x07FFFF ){
407 uint16_t value = *(uint16_t*)&g_kick[address];
408 return (value << 8) | (value >> 8);}
409 if (ovl == 0 && (address>0xF80000-1 && address<0xFFFFFF)){
410 //printf("kread16/n");
411 uint16_t value = *(uint16_t*)&g_kick[address-0xF80000];
412 return (value << 8) | (value >> 8);}
415 if (address < 0xffffff){
416 return (unsigned int)read16((uint32_t)address);
422 unsigned int m68k_read_memory_32(unsigned int address){
424 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
425 return readGayleL(address);
428 if(address>FASTBASE){
429 uint32_t value = *(uint32_t*)&g_ram[address- FASTBASE];
430 value = ((value << 8) & 0xFF00FF00 ) | ((value >> 8) & 0xFF00FF );
431 return value << 16 | value >> 16;
435 if (ovl == 1 && address<0x07FFFF){
436 uint32_t value = *(uint32_t*)&g_kick[address];
437 value = ((value << 8) & 0xFF00FF00 ) | ((value >> 8) & 0xFF00FF );
438 return value << 16 | value >> 16;}
440 if (ovl == 0 && (address>0xF80000-1 && address<0xFFFFFF)){
441 //printf("kread32/n");
442 uint32_t value = *(uint32_t*)&g_kick[address-0xF80000];
443 value = ((value << 8) & 0xFF00FF00 ) | ((value >> 8) & 0xFF00FF );
444 return value << 16 | value >> 16;}
447 if (address < 0xffffff){
448 uint16_t a = read16(address);
449 uint16_t b = read16(address+2);
450 return (a << 16) | b;
456 void m68k_write_memory_8(unsigned int address, unsigned int value){
459 if (address == 0xbfe001){
460 ovl = (value & (1<<0));
461 //printf("OVL:%x\n", ovl );
465 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
466 writeGayleB(address, value);
471 if(address>FASTBASE){
472 g_ram[address- FASTBASE] = value;
476 if (address < 0xffffff){
477 write8((uint32_t)address,value);
484 void m68k_write_memory_16(unsigned int address, unsigned int value){
485 // if (address==0xdff030) printf("%c", value);
487 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
488 writeGayle(address,value);
492 if (address == 0xbfe001)
493 printf("16CIA Output:%x\n", value );
496 if(address>FASTBASE){
497 uint16_t* dest = (uint16_t*)&g_ram[address- FASTBASE];
498 value = (value << 8) | (value >> 8);
503 if (address < 0xffffff){
504 write16((uint32_t)address,value);
510 void m68k_write_memory_32(unsigned int address, unsigned int value){
513 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
514 writeGayleL(address, value);
517 if(address>FASTBASE){
518 uint32_t* dest = (uint32_t*)&g_ram[address- FASTBASE];
519 value = ((value << 8) & 0xFF00FF00 ) | ((value >> 8) & 0xFF00FF );
520 value = value << 16 | value >> 16;
525 if (address < 0xffffff){
526 write16(address , value >> 16);
527 write16(address+2 , value );
535 void write32(uint32_t address, uint32_t data){
536 write16(address+2 , data);
537 write16(address , data >>16 );
540 uint32_t read32(uint32_t address){
541 uint16_t a = read16(address+2);
542 uint16_t b = read16(address);
547 void write16(uint32_t address, uint32_t data)
549 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
550 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
551 uint32_t addr_l_s = (address >> 16) << 8;
552 uint32_t addr_l_r = (~address >> 16) << 8;
553 uint32_t data_s = (data & 0x0000ffff) << 8;
554 uint32_t data_r = (~data & 0x0000ffff) << 8;
556 // asm volatile ("dmb" ::: "memory");
559 *(gpio + 1) = gpfsel1_o;
560 *(gpio + 2) = gpfsel2_o;
562 *(gpio + 7) = addr_h_s;
563 *(gpio + 10) = addr_h_r;
567 *(gpio + 7) = addr_l_s;
568 *(gpio + 10) = addr_l_r;
573 *(gpio + 7) = data_s;
574 *(gpio + 10) = data_r;
579 *(gpio + 1) = gpfsel1;
580 *(gpio + 2) = gpfsel2;
581 while ((GET_GPIO(0)));
582 // asm volatile ("dmb" ::: "memory");
586 void write8(uint32_t address, uint32_t data)
589 if ((address & 1) == 0)
590 data = data + (data << 8); //EVEN, A0=0,UDS
591 else data = data & 0xff ; //ODD , A0=1,LDS
592 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
593 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
594 uint32_t addr_l_s = (address >> 16) << 8;
595 uint32_t addr_l_r = (~address >> 16) << 8;
596 uint32_t data_s = (data & 0x0000ffff) << 8;
597 uint32_t data_r = (~data & 0x0000ffff) << 8;
600 // asm volatile ("dmb" ::: "memory");
603 *(gpio + 1) = gpfsel1_o;
604 *(gpio + 2) = gpfsel2_o;
606 *(gpio + 7) = addr_h_s;
607 *(gpio + 10) = addr_h_r;
611 *(gpio + 7) = addr_l_s;
612 *(gpio + 10) = addr_l_r;
617 *(gpio + 7) = data_s;
618 *(gpio + 10) = data_r;
623 *(gpio + 1) = gpfsel1;
624 *(gpio + 2) = gpfsel2;
625 while ((GET_GPIO(0)));
626 // asm volatile ("dmb" ::: "memory");
631 uint32_t read16(uint32_t address)
634 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
635 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
636 uint32_t addr_l_s = (address >> 16) << 8;
637 uint32_t addr_l_r = (~address >> 16) << 8;
639 // asm volatile ("dmb" ::: "memory");
643 *(gpio + 1) = gpfsel1_o;
644 *(gpio + 2) = gpfsel2_o;
646 *(gpio + 7) = addr_h_s;
647 *(gpio + 10) = addr_h_r;
651 *(gpio + 7) = addr_l_s;
652 *(gpio + 10) = addr_l_r;
660 *(gpio + 1) = gpfsel1;
661 *(gpio + 2) = gpfsel2;
664 while (!(GET_GPIO(0)));
666 asm volatile ("nop" ::);
667 asm volatile ("nop" ::);
668 asm volatile ("nop" ::);
671 // asm volatile ("dmb" ::: "memory");
672 return (val >>8)&0xffff;
676 uint32_t read8(uint32_t address)
679 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
680 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
681 uint32_t addr_l_s = (address >> 16) << 8;
682 uint32_t addr_l_r = (~address >> 16) << 8;
684 // asm volatile ("dmb" ::: "memory");
687 *(gpio + 1) = gpfsel1_o;
688 *(gpio + 2) = gpfsel2_o;
690 *(gpio + 7) = addr_h_s;
691 *(gpio + 10) = addr_h_r;
695 *(gpio + 7) = addr_l_s;
696 *(gpio + 10) = addr_l_r;
703 *(gpio + 1) = gpfsel1;
704 *(gpio + 2) = gpfsel2;
707 while (!(GET_GPIO(0)));
709 asm volatile ("nop" ::);
710 asm volatile ("nop" ::);
711 asm volatile ("nop" ::);
714 // asm volatile ("dmb" ::: "memory");
716 val = (val >>8)&0xffff;
717 if ((address & 1) == 0)
718 val = (val >> 8) & 0xff ; //EVEN, A0=0,UDS
720 val = val & 0xff ; //ODD , A0=1,LDS
726 /******************************************************/
728 void write_reg(unsigned int value)
730 asm volatile ("dmb" ::: "memory");
732 asm volatile ("nop" ::);
733 asm volatile ("nop" ::);
734 asm volatile ("nop" ::);
735 //Write Status register
741 *(gpio + 1) = gpfsel1_o;
742 *(gpio + 2) = gpfsel2_o;
743 *(gpio + 7) = (value & 0xffff) << 8;
744 *(gpio + 10) = (~value & 0xffff) << 8;
746 GPIO_CLR = 1 << 7; //delay
751 *(gpio + 1) = gpfsel1;
752 *(gpio + 2) = gpfsel2;
753 asm volatile ("dmb" ::: "memory");
757 uint16_t read_reg(void)
761 asm volatile ("dmb" ::: "memory");
763 asm volatile ("nop" ::);
764 asm volatile ("nop" ::);
765 asm volatile ("nop" ::);
768 *(gpio + 1) = gpfsel1;
769 *(gpio + 2) = gpfsel2;
772 GPIO_CLR = 1 << 6; //delay
777 asm volatile ("dmb" ::: "memory");
779 return (uint16_t)(val >> 8);
784 // Set up a memory regions to access GPIO
789 if ((mem_fd = open("/dev/mem", O_RDWR|O_SYNC) ) < 0) {
790 printf("can't open /dev/mem \n");
796 NULL, //Any adddress in our space will do
797 BCM2708_PERI_SIZE, //Map length
798 PROT_READ|PROT_WRITE,// Enable reading & writting to mapped memory
799 MAP_SHARED, //Shared with other processes
800 mem_fd, //File to map
801 BCM2708_PERI_BASE //Offset to GPIO peripheral
804 close(mem_fd); //No need to keep mem_fd open after mmap
806 if (gpio_map == MAP_FAILED) {
807 printf("gpio mmap error %d\n", (int)gpio_map);//errno also set!
811 gpio = ((volatile unsigned *)gpio_map) + GPIO_ADDR/4;
812 gpclk = ((volatile unsigned *)gpio_map) + GPCLK_ADDR/4;