19 //#define BCM2708_PERI_BASE 0x20000000 //pi0-1
20 //#define BCM2708_PERI_BASE 0xFE000000 //pi4
21 #define BCM2708_PERI_BASE 0x3F000000 //pi3
22 #define BCM2708_PERI_SIZE 0x01000000
23 #define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO controller */
24 #define GPCLK_BASE (BCM2708_PERI_BASE + 0x101000)
25 #define GPIO_ADDR 0x200000 /* GPIO controller */
26 #define GPCLK_ADDR 0x101000
27 #define CLK_PASSWD 0x5a000000
28 #define CLK_GP0_CTL 0x070
29 #define CLK_GP0_DIV 0x074
35 #define STATUSREGADDR GPIO_CLR = 1<<SA0;GPIO_CLR = 1<<SA1;GPIO_SET = 1<<SA2;
36 #define W16 GPIO_CLR = 1<<SA0;GPIO_CLR = 1<<SA1;GPIO_CLR = 1<<SA2;
37 #define R16 GPIO_SET = 1<<SA0;GPIO_CLR = 1<<SA1;GPIO_CLR = 1<<SA2;
38 #define W8 GPIO_CLR = 1<<SA0;GPIO_SET = 1<<SA1;GPIO_CLR = 1<<SA2;
39 #define R8 GPIO_SET = 1<<SA0;GPIO_SET = 1<<SA1;GPIO_CLR = 1<<SA2;
41 #define PAGE_SIZE (4*1024)
42 #define BLOCK_SIZE (4*1024)
44 #define GPIOSET(no, ishigh) \
49 reset |= (1 << (no)); \
53 #define FASTBASE 0x07FFFFFF
54 //#define FASTSIZE 0xFFFFFF
55 #define FASTSIZE 0xFFFFFFF
58 #define GAYLEBASE 0xD80000 //D7FFFF
59 #define GAYLESIZE 0x6FFFF
67 volatile unsigned int *gpio;
68 volatile unsigned int *gpclk;
69 volatile unsigned int gpfsel0;
70 volatile unsigned int gpfsel1;
71 volatile unsigned int gpfsel2;
72 volatile unsigned int gpfsel0_o;
73 volatile unsigned int gpfsel1_o;
74 volatile unsigned int gpfsel2_o;
76 // GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x) or SET_GPIO_ALT(x,y)
77 #define INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3))
78 #define OUT_GPIO(g) *(gpio+((g)/10)) |= (1<<(((g)%10)*3))
79 #define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3))
81 #define GPIO_SET *(gpio+7) // sets bits which are 1 ignores bits which are 0
82 #define GPIO_CLR *(gpio+10) // clears bits which are 1 ignores bits which are 0
84 #define GET_GPIO(g) (*(gpio+13)&(1<<g)) // 0 if LOW, (1<<g) if HIGH
86 #define GPIO_PULL *(gpio+37) // Pull up/pull down
87 #define GPIO_PULLCLK0 *(gpio+38) // Pull up/pull down clock
92 uint32_t read8(uint32_t address);
93 void write8(uint32_t address, uint32_t data);
95 uint32_t read16(uint32_t address);
96 void write16(uint32_t address, uint32_t data);
98 void write32(uint32_t address, uint32_t data);
99 uint32_t read32(uint32_t address);
101 uint16_t read_reg(void);
102 void write_reg(unsigned int value);
104 volatile uint16_t srdata;
105 volatile uint32_t srdata2;
106 volatile uint32_t srdata2_old;
109 unsigned char g_ram[FASTSIZE+1]; /* RAM */
110 unsigned char toggle;
115 void* iplThread(void *args){
118 //srdata2_old = read_reg();
122 //printf("thread!/n");
123 if (GET_GPIO(1) == 0){
125 if (srdata != srdata2_old){
126 srdata2 = ((srdata >> 13)&0xff);
127 //printf("STATUS: %d\n", srdata2);
128 srdata2_old = srdata;
129 m68k_set_irq(srdata2);
136 srdata2 = ((srdata >> 13)&0xff);
137 srdata2_old = srdata;
138 m68k_set_irq(srdata2);
141 //printf("STATUS: 0\n");
157 const struct sched_param priority = {99};
159 sched_setscheduler(0, SCHED_RR , &priority);
160 printf("YES locked in memory\n");
161 mlockall(MCL_CURRENT); // lock in memory to keep us from paging out
168 ide0 = ide_allocate("cf");
169 fd = open("hd0.img", O_RDWR);
171 printf("HDD Image hd0.image failed open\n");
173 ide_attach(ide0, 0, fd);
174 ide_reset_begin(ide0);
175 printf("HDD Image hd0.image attached\n");
181 //Enable 200MHz CLK output on GPIO4, adjust divider and pll source depending on pi model
182 printf("Enable GPCLK0 on GPIO4\n");
184 *(gpclk+ (CLK_GP0_CTL/4)) = CLK_PASSWD | (1 << 5);
186 while ( (*(gpclk+(CLK_GP0_CTL/4))) & (1 << 7));
188 *(gpclk+(CLK_GP0_DIV/4)) = CLK_PASSWD | (6 << 12); //divider , 6=200MHz on pi3
190 *(gpclk+(CLK_GP0_CTL/4)) = CLK_PASSWD | 5 | (1 << 4); //pll? 6=plld, 5=pllc
192 while (((*(gpclk+(CLK_GP0_CTL/4))) & (1 << 7))== 0);
195 SET_GPIO_ALT(4,0); //gpclk0
205 //set gpio0 (aux0) and gpio1 (aux1) to input
209 // Set GPIO pins 6,7 and 8-23 to output
210 for (g=6; g<=23; g++)
215 printf ("Precalculate GPIO8-23 aus Output\n");
216 gpfsel0_o =*(gpio); //store gpio ddr
217 printf ("gpfsel0: %#x\n", gpfsel0_o);
218 gpfsel1_o =*(gpio+1); //store gpio ddr
219 printf ("gpfsel1: %#x\n", gpfsel1_o);
220 gpfsel2_o =*(gpio+2); //store gpio ddr
221 printf ("gpfsel2: %#x\n", gpfsel2_o);
223 // Set GPIO pins 8-23 to input
224 for (g=8; g<=23; g++)
228 printf ("Precalculate GPIO8-23 as Input\n");
229 gpfsel0 =*(gpio); //store gpio ddr
230 printf ("gpfsel0: %#x\n", gpfsel0);
231 gpfsel1 =*(gpio+1); //store gpio ddr
232 printf ("gpfsel1: %#x\n", gpfsel1);
233 gpfsel2 =*(gpio+2); //store gpio ddr
234 printf ("gpfsel2: %#x\n", gpfsel2);
243 //reset cpld statemachine first
252 write8(0xbfe201,0x0001); //AMIGA OVL
253 write8(0xbfe001,0x0001); //AMIGA OVL high (ROM@0x0)
258 m68k_set_cpu_type(M68K_CPU_TYPE_68EC030);
260 srdata2_old = read_reg();
261 printf("STATUS: %d\n", srdata2_old);
268 //err = pthread_create(&id, NULL, &iplThread, NULL);
270 printf("\ncan't create IPL thread :[%s]", strerror(err));
272 printf("\n IPL Thread created successfully\n");
280 //printf("IRQ:0x%06x\n",CheckIrq());
288 if (GET_GPIO(1) == 0 || CheckIrq() == 1){
290 // if (CheckIrq() == 1) srdata |= (1 << 14);
291 if (srdata != srdata2_old){
292 srdata2 = ((srdata >> 13)&0xff);
293 //printf("STATUS: %d\n", srdata2);
294 srdata2_old = srdata;
295 m68k_set_irq(srdata2);
302 srdata2 = ((srdata >> 13)&0xff);
303 srdata2_old = srdata;
304 m68k_set_irq(srdata2);
305 //printf("STATUS: 0\n");
317 void cpu_pulse_reset(void){
325 int cpu_irq_ack(int level)
327 printf("cpu irq ack\n");
333 unsigned int m68k_read_memory_8(unsigned int address){
335 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
336 return readGayleB(address);
339 if(address>FASTBASE){
340 return g_ram[address- FASTBASE];
343 return read8((uint32_t)address);
346 unsigned int m68k_read_memory_16(unsigned int address){
348 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
349 return readGayle(address);
352 if(address>FASTBASE){
353 uint16_t value = *(uint16_t*)&g_ram[address- FASTBASE];
354 value = (value << 8) | (value >> 8);
357 return (unsigned int)read16((uint32_t)address);
360 unsigned int m68k_read_memory_32(unsigned int address){
362 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
363 return readGayleL(address);
366 if(address>FASTBASE){
367 uint32_t value = *(uint32_t*)&g_ram[address- FASTBASE];
368 value = ((value << 8) & 0xFF00FF00 ) | ((value >> 8) & 0xFF00FF );
369 return value << 16 | value >> 16;
372 uint16_t a = read16(address);
373 uint16_t b = read16(address+2);
374 return (a << 16) | b;
377 void m68k_write_memory_8(unsigned int address, unsigned int value){
380 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
381 writeGayleB(address, value);
386 if(address>FASTBASE){
387 g_ram[address- FASTBASE] = value;
391 write8((uint32_t)address,value);
395 void m68k_write_memory_16(unsigned int address, unsigned int value){
396 // if (address==0xdff030) printf("%c", value);
398 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
399 writeGayle(address,value);
404 if(address>FASTBASE){
405 uint16_t* dest = (uint16_t*)&g_ram[address- FASTBASE];
406 value = (value << 8) | (value >> 8);
411 write16((uint32_t)address,value);
415 void m68k_write_memory_32(unsigned int address, unsigned int value){
418 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
419 writeGayleL(address, value);
422 if(address>FASTBASE){
423 uint32_t* dest = (uint32_t*)&g_ram[address- FASTBASE];
424 value = ((value << 8) & 0xFF00FF00 ) | ((value >> 8) & 0xFF00FF );
425 value = value << 16 | value >> 16;
430 write16(address , value >> 16);
431 write16(address+2 , value );
436 void write32(uint32_t address, uint32_t data){
437 write16(address+2 , data);
438 write16(address , data >>16 );
441 uint32_t read32(uint32_t address){
442 uint16_t a = read16(address+2);
443 uint16_t b = read16(address);
448 void write16(uint32_t address, uint32_t data)
450 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
451 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
452 uint32_t addr_l_s = (address >> 16) << 8;
453 uint32_t addr_l_r = (~address >> 16) << 8;
454 uint32_t data_s = (data & 0x0000ffff) << 8;
455 uint32_t data_r = (~data & 0x0000ffff) << 8;
457 // asm volatile ("dmb" ::: "memory");
460 *(gpio + 1) = gpfsel1_o;
461 *(gpio + 2) = gpfsel2_o;
463 *(gpio + 7) = addr_h_s;
464 *(gpio + 10) = addr_h_r;
468 *(gpio + 7) = addr_l_s;
469 *(gpio + 10) = addr_l_r;
474 *(gpio + 7) = data_s;
475 *(gpio + 10) = data_r;
480 *(gpio + 1) = gpfsel1;
481 *(gpio + 2) = gpfsel2;
482 while ((GET_GPIO(0)));
483 // asm volatile ("dmb" ::: "memory");
487 void write8(uint32_t address, uint32_t data)
490 if ((address & 1) == 0)
491 data = data + (data << 8); //EVEN, A0=0,UDS
492 else data = data & 0xff ; //ODD , A0=1,LDS
493 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
494 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
495 uint32_t addr_l_s = (address >> 16) << 8;
496 uint32_t addr_l_r = (~address >> 16) << 8;
497 uint32_t data_s = (data & 0x0000ffff) << 8;
498 uint32_t data_r = (~data & 0x0000ffff) << 8;
501 // asm volatile ("dmb" ::: "memory");
504 *(gpio + 1) = gpfsel1_o;
505 *(gpio + 2) = gpfsel2_o;
507 *(gpio + 7) = addr_h_s;
508 *(gpio + 10) = addr_h_r;
512 *(gpio + 7) = addr_l_s;
513 *(gpio + 10) = addr_l_r;
518 *(gpio + 7) = data_s;
519 *(gpio + 10) = data_r;
524 *(gpio + 1) = gpfsel1;
525 *(gpio + 2) = gpfsel2;
526 while ((GET_GPIO(0)));
527 // asm volatile ("dmb" ::: "memory");
532 uint32_t read16(uint32_t address)
535 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
536 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
537 uint32_t addr_l_s = (address >> 16) << 8;
538 uint32_t addr_l_r = (~address >> 16) << 8;
540 // asm volatile ("dmb" ::: "memory");
544 *(gpio + 1) = gpfsel1_o;
545 *(gpio + 2) = gpfsel2_o;
547 *(gpio + 7) = addr_h_s;
548 *(gpio + 10) = addr_h_r;
552 *(gpio + 7) = addr_l_s;
553 *(gpio + 10) = addr_l_r;
561 *(gpio + 1) = gpfsel1;
562 *(gpio + 2) = gpfsel2;
565 while (!(GET_GPIO(0)));
567 asm volatile ("nop" ::);
568 asm volatile ("nop" ::);
569 asm volatile ("nop" ::);
572 // asm volatile ("dmb" ::: "memory");
573 return (val >>8)&0xffff;
577 uint32_t read8(uint32_t address)
580 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
581 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
582 uint32_t addr_l_s = (address >> 16) << 8;
583 uint32_t addr_l_r = (~address >> 16) << 8;
585 // asm volatile ("dmb" ::: "memory");
588 *(gpio + 1) = gpfsel1_o;
589 *(gpio + 2) = gpfsel2_o;
591 *(gpio + 7) = addr_h_s;
592 *(gpio + 10) = addr_h_r;
596 *(gpio + 7) = addr_l_s;
597 *(gpio + 10) = addr_l_r;
604 *(gpio + 1) = gpfsel1;
605 *(gpio + 2) = gpfsel2;
608 while (!(GET_GPIO(0)));
610 asm volatile ("nop" ::);
611 asm volatile ("nop" ::);
612 asm volatile ("nop" ::);
615 // asm volatile ("dmb" ::: "memory");
617 val = (val >>8)&0xffff;
618 if ((address & 1) == 0)
619 val = (val >> 8) & 0xff ; //EVEN, A0=0,UDS
621 val = val & 0xff ; //ODD , A0=1,LDS
627 /******************************************************/
629 void write_reg(unsigned int value)
631 asm volatile ("dmb" ::: "memory");
633 asm volatile ("nop" ::);
634 asm volatile ("nop" ::);
635 asm volatile ("nop" ::);
636 //Write Status register
642 *(gpio + 1) = gpfsel1_o;
643 *(gpio + 2) = gpfsel2_o;
644 *(gpio + 7) = (value & 0xffff) << 8;
645 *(gpio + 10) = (~value & 0xffff) << 8;
647 GPIO_CLR = 1 << 7; //delay
652 *(gpio + 1) = gpfsel1;
653 *(gpio + 2) = gpfsel2;
654 asm volatile ("dmb" ::: "memory");
658 uint16_t read_reg(void)
662 asm volatile ("dmb" ::: "memory");
664 asm volatile ("nop" ::);
665 asm volatile ("nop" ::);
666 asm volatile ("nop" ::);
669 *(gpio + 1) = gpfsel1;
670 *(gpio + 2) = gpfsel2;
673 GPIO_CLR = 1 << 6; //delay
678 asm volatile ("dmb" ::: "memory");
680 return (uint16_t)(val >> 8);
685 // Set up a memory regions to access GPIO
690 if ((mem_fd = open("/dev/mem", O_RDWR|O_SYNC) ) < 0) {
691 printf("can't open /dev/mem \n");
697 NULL, //Any adddress in our space will do
698 BCM2708_PERI_SIZE, //Map length
699 PROT_READ|PROT_WRITE,// Enable reading & writting to mapped memory
700 MAP_SHARED, //Shared with other processes
701 mem_fd, //File to map
702 BCM2708_PERI_BASE //Offset to GPIO peripheral
705 close(mem_fd); //No need to keep mem_fd open after mmap
707 if (gpio_map == MAP_FAILED) {
708 printf("gpio mmap error %d\n", (int)gpio_map);//errno also set!
712 gpio = ((volatile unsigned *)gpio_map) + GPIO_ADDR/4;
713 gpclk = ((volatile unsigned *)gpio_map) + GPCLK_ADDR/4;