12 #include "../platforms/amiga/Gayle.h"
15 volatile unsigned int *gpio;
16 volatile unsigned int *gpclk;
17 volatile unsigned int gpfsel0;
18 volatile unsigned int gpfsel1;
19 volatile unsigned int gpfsel2;
20 volatile unsigned int gpfsel0_o;
21 volatile unsigned int gpfsel1_o;
22 volatile unsigned int gpfsel2_o;
24 volatile uint16_t srdata;
25 volatile uint32_t srdata2;
26 volatile uint32_t srdata2_old;
28 extern int mem_fd, mouse_fd, keyboard_fd;
29 extern int mem_fd_gpclk;
38 inline void write16(uint32_t address, uint32_t data) {
39 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
40 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
41 uint32_t addr_l_s = (address >> 16) << 8;
42 uint32_t addr_l_r = (~address >> 16) << 8;
43 uint32_t data_s = (data & 0x0000ffff) << 8;
44 uint32_t data_r = (~data & 0x0000ffff) << 8;
46 // asm volatile ("dmb" ::: "memory");
49 *(gpio + 1) = gpfsel1_o;
50 *(gpio + 2) = gpfsel2_o;
52 *(gpio + 7) = addr_h_s;
53 *(gpio + 10) = addr_h_r;
57 *(gpio + 7) = addr_l_s;
58 *(gpio + 10) = addr_l_r;
64 *(gpio + 10) = data_r;
69 *(gpio + 1) = gpfsel1;
70 *(gpio + 2) = gpfsel2;
73 // asm volatile ("dmb" ::: "memory");
76 inline void write8(uint32_t address, uint32_t data) {
77 if ((address & 1) == 0)
78 data = data + (data << 8); // EVEN, A0=0,UDS
80 data = data & 0xff; // ODD , A0=1,LDS
81 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
82 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
83 uint32_t addr_l_s = (address >> 16) << 8;
84 uint32_t addr_l_r = (~address >> 16) << 8;
85 uint32_t data_s = (data & 0x0000ffff) << 8;
86 uint32_t data_r = (~data & 0x0000ffff) << 8;
88 // asm volatile ("dmb" ::: "memory");
91 *(gpio + 1) = gpfsel1_o;
92 *(gpio + 2) = gpfsel2_o;
94 *(gpio + 7) = addr_h_s;
95 *(gpio + 10) = addr_h_r;
99 *(gpio + 7) = addr_l_s;
100 *(gpio + 10) = addr_l_r;
105 *(gpio + 7) = data_s;
106 *(gpio + 10) = data_r;
111 *(gpio + 1) = gpfsel1;
112 *(gpio + 2) = gpfsel2;
113 while ((GET_GPIO(0)))
115 // asm volatile ("dmb" ::: "memory");
118 inline uint32_t read16(uint32_t address) {
120 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
121 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
122 uint32_t addr_l_s = (address >> 16) << 8;
123 uint32_t addr_l_r = (~address >> 16) << 8;
125 // asm volatile ("dmb" ::: "memory");
128 *(gpio + 1) = gpfsel1_o;
129 *(gpio + 2) = gpfsel2_o;
131 *(gpio + 7) = addr_h_s;
132 *(gpio + 10) = addr_h_r;
136 *(gpio + 7) = addr_l_s;
137 *(gpio + 10) = addr_l_r;
143 *(gpio + 1) = gpfsel1;
144 *(gpio + 2) = gpfsel2;
146 while (!(GET_GPIO(0)))
151 // asm volatile ("dmb" ::: "memory");
152 return (val >> 8) & 0xffff;
155 inline uint32_t read8(uint32_t address) {
157 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
158 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
159 uint32_t addr_l_s = (address >> 16) << 8;
160 uint32_t addr_l_r = (~address >> 16) << 8;
162 // asm volatile ("dmb" ::: "memory");
165 *(gpio + 1) = gpfsel1_o;
166 *(gpio + 2) = gpfsel2_o;
168 *(gpio + 7) = addr_h_s;
169 *(gpio + 10) = addr_h_r;
173 *(gpio + 7) = addr_l_s;
174 *(gpio + 10) = addr_l_r;
180 *(gpio + 1) = gpfsel1;
181 *(gpio + 2) = gpfsel2;
184 while (!(GET_GPIO(0)))
189 // asm volatile ("dmb" ::: "memory");
191 val = (val >> 8) & 0xffff;
192 if ((address & 1) == 0)
193 return (val >> 8) & 0xff; // EVEN, A0=0,UDS
195 return val & 0xff; // ODD , A0=1,LDS
198 /******************************************************/
200 void write_reg(unsigned int value) {
203 *(gpio + 1) = gpfsel1_o;
204 *(gpio + 2) = gpfsel2_o;
205 *(gpio + 7) = (value & 0xffff) << 8;
206 *(gpio + 10) = (~value & 0xffff) << 8;
208 GPIO_CLR = 1 << 7; // delay
213 *(gpio + 1) = gpfsel1;
214 *(gpio + 2) = gpfsel2;
217 uint16_t read_reg(void) {
222 *(gpio + 1) = gpfsel1;
223 *(gpio + 2) = gpfsel2;
225 GPIO_CLR = 1 << 6; // delay
230 return (uint16_t)(val >> 8);
234 // Set up a memory regions to access GPIO
238 if ((mem_fd = open("/dev/mem", O_RDWR | O_SYNC)) < 0) {
239 printf("can't open /dev/mem \n");
245 NULL, // Any adddress in our space will do
246 BCM2708_PERI_SIZE, // Map length
247 PROT_READ | PROT_WRITE, // Enable reading & writting to mapped memory
248 MAP_SHARED, // Shared with other processes
249 mem_fd, // File to map
250 BCM2708_PERI_BASE // Offset to GPIO peripheral
253 close(mem_fd); // No need to keep mem_fd open after mmap
255 if (gpio_map == MAP_FAILED) {
256 printf("gpio mmap error %d\n", (int)gpio_map); // errno also set!
260 gpio = ((volatile unsigned *)gpio_map) + GPIO_ADDR / 4;
261 gpclk = ((volatile unsigned *)gpio_map) + GPCLK_ADDR / 4;
265 void gpio_enable_200mhz() {
266 *(gpclk + (CLK_GP0_CTL / 4)) = CLK_PASSWD | (1 << 5);
268 while ((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7))
271 *(gpclk + (CLK_GP0_DIV / 4)) =
272 CLK_PASSWD | (6 << 12); // divider , 6=200MHz on pi3
274 *(gpclk + (CLK_GP0_CTL / 4)) =
275 CLK_PASSWD | 5 | (1 << 4); // pll? 6=plld, 5=pllc
277 while (((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7)) == 0)
281 SET_GPIO_ALT(4, 0); // gpclk0
291 // set gpio0 (aux0) and gpio1 (aux1) to input
295 // Set GPIO pins 6,7 and 8-23 to output
296 for (g = 6; g <= 23; g++) {
300 printf("Precalculate GPIO8-23 as Output\n");
301 gpfsel0_o = *(gpio); // store gpio ddr
302 printf("gpfsel0: %#x\n", gpfsel0_o);
303 gpfsel1_o = *(gpio + 1); // store gpio ddr
304 printf("gpfsel1: %#x\n", gpfsel1_o);
305 gpfsel2_o = *(gpio + 2); // store gpio ddr
306 printf("gpfsel2: %#x\n", gpfsel2_o);
308 // Set GPIO pins 8-23 to input
309 for (g = 8; g <= 23; g++) {
312 printf("Precalculate GPIO8-23 as Input\n");
313 gpfsel0 = *(gpio); // store gpio ddr
314 printf("gpfsel0: %#x\n", gpfsel0);
315 gpfsel1 = *(gpio + 1); // store gpio ddr
316 printf("gpfsel1: %#x\n", gpfsel1);
317 gpfsel2 = *(gpio + 2); // store gpio ddr
318 printf("gpfsel2: %#x\n", gpfsel2);
328 void gpio_handle_irq() {
329 if (GET_GPIO(1) == 0) {
331 m68k_set_irq((srdata >> 13) & 0xff);
333 if (CheckIrq() == 1) {
334 write16(0xdff09c, 0x8008);
342 void *iplThread(void *args) {
343 printf("IPL thread running/n");
347 if (GET_GPIO(1) == 0) {
349 m68k_end_timeslice();
350 //printf("thread!/n");