1 ;******************************************************************************
2 ;* x86-optimized vertical line scaling functions
3 ;* Copyright (c) 2011 Ronald S. Bultje <rsbultje@gmail.com>
4 ;* Kieran Kunhya <kieran@kunhya.com>
5 ;* (c) 2020 Nelson Gomez <nelson.gomez@microsoft.com>
7 ;* This file is part of FFmpeg.
9 ;* FFmpeg is free software; you can redistribute it and/or
10 ;* modify it under the terms of the GNU Lesser General Public
11 ;* License as published by the Free Software Foundation; either
12 ;* version 2.1 of the License, or (at your option) any later version.
14 ;* FFmpeg is distributed in the hope that it will be useful,
15 ;* but WITHOUT ANY WARRANTY; without even the implied warranty of
16 ;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 ;* Lesser General Public License for more details.
19 ;* You should have received a copy of the GNU Lesser General Public
20 ;* License along with FFmpeg; if not, write to the Free Software
21 ;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
22 ;******************************************************************************
24 %include "libavutil/x86/x86util.asm"
28 minshort: times 8 dw 0x8000
29 yuv2yuvX_16_start: times 4 dd 0x4000 - 0x40000000
30 yuv2yuvX_10_start: times 4 dd 0x10000
31 yuv2yuvX_9_start: times 4 dd 0x20000
32 yuv2yuvX_10_upper: times 8 dw 0x3ff
33 yuv2yuvX_9_upper: times 8 dw 0x1ff
35 pd_4min0x40000:times 4 dd 4 - (0x40000)
38 pd_255: times 8 dd 255
39 pw_512: times 8 dw 512
40 pw_1024: times 8 dw 1024
42 yuv2nv12_shuffle_mask: times 2 db 0, 4, 8, 12, \
46 yuv2nv21_shuffle_mask: times 2 db 4, 0, 12, 8, \
50 yuv2nv12_permute_mask: dd 0, 4, 1, 2, 3, 5, 6, 7
54 ;-----------------------------------------------------------------------------
55 ; vertical line scaling
57 ; void yuv2plane1_<output_size>_<opt>(const int16_t *src, uint8_t *dst, int dstW,
58 ; const uint8_t *dither, int offset)
60 ; void yuv2planeX_<output_size>_<opt>(const int16_t *filter, int filterSize,
61 ; const int16_t **src, uint8_t *dst, int dstW,
62 ; const uint8_t *dither, int offset)
64 ; Scale one or $filterSize lines of source data to generate one line of output
65 ; data. The input is 15 bits in int16_t if $output_size is [8,10] and 19 bits in
66 ; int32_t if $output_size is 16. $filter is 12 bits. $filterSize is a multiple
67 ; of 2. $offset is either 0 or 3. $dither holds 8 values.
68 ;-----------------------------------------------------------------------------
69 %macro yuv2planeX_mainloop 2
72 ; the rep here is for the 8-bit output MMX case, where dither covers
73 ; 8 pixels but we can only handle 2 pixels per register, and thus 4
74 ; pixels per iteration. In order to not have to keep track of where
75 ; we are w.r.t. dithering, we unroll the MMX/8-bit loop x2.
77 %assign %%repcnt 16/mmsize
86 mova m2, [rsp+mmsize*(0+%%i)]
87 mova m1, [rsp+mmsize*(1+%%i)]
93 mova m1, [yuv2yuvX_%1_start]
95 %endif ; %1 == 8/9/10/16
96 movsx cntr_reg, fltsizem
97 .filterloop_%2_ %+ %%i:
99 mov r6, [srcq+gprsize*cntr_reg-2*gprsize]
102 mova m5, [r6+r5*4+mmsize]
105 %endif ; %1 == 8/9/10/16
106 mov r6, [srcq+gprsize*cntr_reg-gprsize]
109 mova m6, [r6+r5*4+mmsize]
112 %endif ; %1 == 8/9/10/16
115 movd m0, [filterq+2*cntr_reg-4] ; coeff[0], coeff[1]
117 pshuflw m7, m0, 0 ; coeff[0]
118 pshuflw m0, m0, 0x55 ; coeff[1]
119 pmovsxwd m7, m7 ; word -> dword
120 pmovsxwd m0, m0 ; word -> dword
141 %endif ; %1 == 8/9/10/16
144 jg .filterloop_%2_ %+ %%i
152 %endif ; %1 == 8/9/10/16
158 %else ; %1 == 9/10/16
168 %endif ; mmxext/sse2/sse4/avx
169 pminsw m2, [yuv2yuvX_%1_upper]
170 %endif ; %1 == 9/10/16
171 mov%2 [dstq+r5*2], m2
172 %endif ; %1 == 8/9/10/16
182 %macro yuv2planeX_fn 3
185 %define cntr_reg fltsizeq
192 cglobal yuv2planeX_%1, %3, 8, %2, filter, fltsize, src, dst, w, dither, offset
193 %if %1 == 8 || %1 == 9 || %1 == 10
195 %endif ; %1 == 8/9/10
199 %assign pad 0x2c - (stack_offset & 15)
206 ; create registers holding dither
207 movq m_dith, [ditherq] ; dither
208 test offsetd, offsetd
211 punpcklqdq m_dith, m_dith
212 %endif ; mmsize == 16
213 PALIGNR m_dith, m_dith, 3, m0
218 punpcklwd m8, m_dith, m6
221 punpcklwd m5, m_dith, m6
228 mova [rsp+16], m_dith
231 punpcklbw m5, m_dith, m6
235 punpcklwd m3, m_dith, m6
244 mova [rsp+24], m_dith
245 %endif ; mmsize == 8/16
250 %if mmsize == 8 || %1 == 8
251 yuv2planeX_mainloop %1, a
255 yuv2planeX_mainloop %1, a
258 yuv2planeX_mainloop %1, u
259 %endif ; mmsize == 8/16
268 %else ; %1 == 9/10/16
270 %endif ; %1 == 8/9/10/16
275 yuv2planeX_fn 8, 0, 7
276 yuv2planeX_fn 9, 0, 5
277 yuv2planeX_fn 10, 0, 5
281 yuv2planeX_fn 8, 10, 7
282 yuv2planeX_fn 9, 7, 5
283 yuv2planeX_fn 10, 7, 5
286 yuv2planeX_fn 8, 10, 7
287 yuv2planeX_fn 9, 7, 5
288 yuv2planeX_fn 10, 7, 5
289 yuv2planeX_fn 16, 8, 5
291 %if HAVE_AVX_EXTERNAL
293 yuv2planeX_fn 8, 10, 7
294 yuv2planeX_fn 9, 7, 5
295 yuv2planeX_fn 10, 7, 5
298 ; %1=outout-bpc, %2=alignment (u/a)
299 %macro yuv2plane1_mainloop 2
302 paddsw m0, m2, [srcq+wq*2+mmsize*0]
303 paddsw m1, m3, [srcq+wq*2+mmsize*1]
309 paddd m0, m4, [srcq+wq*4+mmsize*0]
310 paddd m1, m4, [srcq+wq*4+mmsize*1]
311 paddd m2, m4, [srcq+wq*4+mmsize*2]
312 paddd m3, m4, [srcq+wq*4+mmsize*3]
317 %if cpuflag(sse4) ; avx/sse4
325 %endif ; mmx/sse2/sse4/avx
326 mov%2 [dstq+wq*2+mmsize*0], m0
327 mov%2 [dstq+wq*2+mmsize*1], m2
329 paddsw m0, m2, [srcq+wq*2+mmsize*0]
330 paddsw m1, m2, [srcq+wq*2+mmsize*1]
337 mov%2 [dstq+wq*2+mmsize*0], m0
338 mov%2 [dstq+wq*2+mmsize*1], m1
344 %macro yuv2plane1_fn 3
345 cglobal yuv2plane1_%1, %3, %3, %2, src, dst, w, dither, offset
348 and wq, ~(mmsize - 1)
352 lea dstq, [dstq+wq*2]
355 lea srcq, [srcq+wq*4]
357 lea srcq, [srcq+wq*2]
364 ; create registers holding dither
365 movq m3, [ditherq] ; dither
366 test offsetd, offsetd
370 %endif ; mmsize == 16
371 PALIGNR m3, m3, 3, m2
375 punpckhbw m3, m4 ; byte->word
376 punpcklbw m2, m4 ; byte->word
390 %if cpuflag(sse4) ; sse4/avx
393 mova m4, [pd_4min0x40000]
395 %endif ; mmx/sse2/sse4/avx
398 ; actual pixel scaling
400 yuv2plane1_mainloop %1, a
404 yuv2plane1_mainloop %1, a
407 yuv2plane1_mainloop %1, u
408 %endif ; mmsize == 8/16
414 yuv2plane1_fn 8, 0, 5
415 yuv2plane1_fn 16, 0, 3
418 yuv2plane1_fn 9, 0, 3
419 yuv2plane1_fn 10, 0, 3
423 yuv2plane1_fn 8, 5, 5
424 yuv2plane1_fn 9, 5, 3
425 yuv2plane1_fn 10, 5, 3
426 yuv2plane1_fn 16, 6, 3
429 yuv2plane1_fn 16, 5, 3
431 %if HAVE_AVX_EXTERNAL
433 yuv2plane1_fn 8, 5, 5
434 yuv2plane1_fn 9, 5, 3
435 yuv2plane1_fn 10, 5, 3
436 yuv2plane1_fn 16, 5, 3
441 ;-----------------------------------------------------------------------------
442 ; AVX2 yuv2nv12cX implementation
444 ; void ff_yuv2nv12cX_avx2(enum AVPixelFormat format, const uint8_t *dither,
445 ; const int16_t *filter, int filterSize,
446 ; const int16_t **u, const int16_t **v,
447 ; uint8_t *dst, int dstWidth)
449 ; void ff_yuv2nv21cX_avx2(enum AVPixelFormat format, const uint8_t *dither,
450 ; const int16_t *filter, int filterSize,
451 ; const int16_t **u, const int16_t **v,
452 ; uint8_t *dst, int dstWidth)
453 ;-----------------------------------------------------------------------------
456 %macro yuv2nv12cX_fn 1
457 cglobal %1cX, 8, 11, 13, tmp1, dither, filter, filterSize, u, v, dst, dstWidth
459 mov tmp1q, qword [ditherq]
465 pslld m0, m0, 12 ; ditherLo
467 pslld m1, m1, 12 ; ditherHi
469 pxor m9, m9 ; uint8_min dwords
470 mova m10, [pd_255] ; uint8_max dwords
471 mova m11, [%1_shuffle_mask] ; shuffle_mask
472 mova m12, [yuv2nv12_permute_mask] ; permute mask
474 DEFINE_ARGS tmp1, tmp2, filter, filterSize, u, v, dst, dstWidth
479 mova m2, m0 ; resultLo
480 mova m3, m1 ; resultHi
484 movsx r10d, word [filterq + (2 * r9q)]
486 vpbroadcastd m4, xm4 ; filter
488 mov tmp1q, [uq + (gprsize * r9q)]
489 mova xm7, oword [tmp1q + 2 * r8q]
491 mov tmp2q, [vq + (gprsize * r9q)]
492 mova xm8, oword [tmp2q + 2 * r8q]
494 punpcklwd xm5, xm7, xm8
495 pmovsxwd m5, xm5 ; multiplicandsLo
496 punpckhwd xm6, xm7, xm8
497 pmovsxwd m6, xm6 ; multiplicandsHi
499 pmulld m7, m5, m4 ; mulResultLo
500 pmulld m8, m6, m4 ; mulResultHi
501 paddd m2, m2, m7 ; resultLo += mulResultLo
502 paddd m3, m3, m8 ; resultHi += mulResultHi
512 ; Vectorized av_clip_uint8
518 ; At this point we have clamped uint8s arranged in this order:
519 ; m2: u1 0 0 0 v1 0 0 0 [...]
520 ; m3: u5 0 0 0 v5 0 0 0 [...]
522 ; First, we shuffle the bytes to make the bytes semi-contiguous.
523 ; AVX-2 doesn't have cross-lane shuffling, so we'll end up with:
524 ; m2: u1 v1 u2 v2 0 0 0 0 0 0 0 0 u3 v3 u4 v4
525 ; m3: u5 v5 u6 v6 0 0 0 0 0 0 0 0 u7 v7 u8 v8
529 ; To fix the cross-lane shuffling issue, we'll then use cross-lane
530 ; permutation to combine the two segments
534 ; Now we have the final results in the lower 8 bytes of each register
546 %if HAVE_AVX2_EXTERNAL
548 yuv2nv12cX_fn yuv2nv12
549 yuv2nv12cX_fn yuv2nv21