git.sesse.net Git - pistorm/blob - platforms/amiga/piscsi/device_driver_amiga/piscsi-amiga-2.c

   1 #include <exec/resident.h>
   2 #include <exec/errors.h>
   3 #include <exec/memory.h>
   4 #include <exec/lists.h>
   5 #include <exec/alerts.h>
   6 #include <exec/tasks.h>
   7 #include <exec/io.h>
   8 #include <exec/execbase.h>
   9
  10 #include <libraries/expansion.h>
  11
  12 #include <devices/trackdisk.h>
  13 #include <devices/timer.h>
  14 #include <devices/scsidisk.h>
  15
  16 #include <dos/filehandler.h>
  17
  18 #include <proto/exec.h>
  19 #include <proto/disk.h>
  20 #include <proto/expansion.h>
  21
  22 #include "newstyle.h"
  23
  24 #include "../piscsi-enums.h"
  25 #include <stdint.h>
  26
  27 #define STR(s) #s
  28 #define XSTR(s) STR(s)
  29
  30 #define DEVICE_NAME "pi-scsi.device"
  31 #define DEVICE_DATE "(3 Feb 2021)"
  32 #define DEVICE_ID_STRING "PiSCSI " XSTR(DEVICE_VERSION) "." XSTR(DEVICE_REVISION) " " DEVICE_DATE
  33 #define DEVICE_VERSION 43
  34 #define DEVICE_REVISION 20
  35 #define DEVICE_PRIORITY 0
  36
  37 #pragma pack(4)
  38 struct piscsi_base {
  39     struct Device* pi_dev;
  40     struct piscsi_unit {
  41         struct Unit unit;
  42         uint32_t regs_ptr;
  43
  44         uint8_t enabled;
  45         uint8_t present;
  46         uint8_t valid;
  47         uint8_t read_only;
  48         uint8_t motor;
  49         uint8_t unit_num;
  50         uint16_t scsi_num;
  51         uint16_t h, s;
  52         uint32_t c;
  53
  54         uint32_t change_num;
  55     } units[NUM_UNITS];
  56 };
  57
  58 struct ExecBase *SysBase;
  59 uint8_t *saved_seg_list;
  60 uint8_t is_open;
  61
  62 #define WRITESHORT(cmd, val) *(unsigned short *)((unsigned long)(PISCSI_OFFSET+cmd)) = val;
  63 #define WRITELONG(cmd, val) *(unsigned long *)((unsigned long)(PISCSI_OFFSET+cmd)) = val;
  64 #define WRITEBYTE(cmd, val) *(unsigned char *)((unsigned long)(PISCSI_OFFSET+cmd)) = val;
  65
  66 #define READSHORT(cmd, var) var = *(volatile unsigned short *)(PISCSI_OFFSET + cmd);
  67 #define READLONG(cmd, var) var = *(volatile unsigned long *)(PISCSI_OFFSET + cmd);
  68
  69 int __attribute__((no_reorder)) _start()
  70 {
  71     return -1;
  72 }
  73
  74 asm("romtag:                                \n"
  75     "       dc.w    "XSTR(RTC_MATCHWORD)"   \n"
  76     "       dc.l    romtag                  \n"
  77     "       dc.l    endcode                 \n"
  78     "       dc.b    "XSTR(RTF_AUTOINIT)"    \n"
  79     "       dc.b    "XSTR(DEVICE_VERSION)"  \n"
  80     "       dc.b    "XSTR(NT_DEVICE)"       \n"
  81     "       dc.b    "XSTR(DEVICE_PRIORITY)" \n"
  82     "       dc.l    _device_name            \n"
  83     "       dc.l    _device_id_string       \n"
  84     "       dc.l    _auto_init_tables       \n"
  85     "endcode:                               \n");
  86
  87 char device_name[] = DEVICE_NAME;
  88 char device_id_string[] = DEVICE_ID_STRING;
  89
  90 uint8_t piscsi_perform_io(struct piscsi_unit *u, struct IORequest *io);
  91 uint8_t piscsi_rw(struct piscsi_unit *u, struct IORequest *io);
  92 uint8_t piscsi_scsi(struct piscsi_unit *u, struct IORequest *io);
  93
  94 #define debug(...)
  95 #define debugval(...)
  96 //#define debug(c, v) WRITESHORT(c, v)
  97 //#define debugval(c, v) WRITELONG(c, v)
  98
  99 struct piscsi_base *dev_base = NULL;
 100
 101 static struct Library __attribute__((used)) *init_device(uint8_t *seg_list asm("a0"), struct Library *dev asm("d0"))
 102 {
 103     SysBase = *(struct ExecBase **)4L;
 104
 105     debug(PISCSI_DBG_MSG, DBG_INIT);
 106
 107     dev_base = AllocMem(sizeof(struct piscsi_base), MEMF_PUBLIC | MEMF_CLEAR);
 108     dev_base->pi_dev = (struct Device *)dev;
 109
 110     for (int i = 0; i < NUM_UNITS; i++) {
 111         uint16_t r = 0;
 112         WRITESHORT(PISCSI_CMD_DRVNUM, (i * 10));
 113         dev_base->units[i].regs_ptr = PISCSI_OFFSET;
 114         READSHORT(PISCSI_CMD_DRVTYPE, r);
 115         dev_base->units[i].enabled = r;
 116         dev_base->units[i].present = r;
 117         dev_base->units[i].valid = r;
 118         dev_base->units[i].unit_num = i;
 119         dev_base->units[i].scsi_num = i * 10;
 120         if (dev_base->units[i].present) {
 121             READLONG(PISCSI_CMD_CYLS, dev_base->units[i].c);
 122             READSHORT(PISCSI_CMD_HEADS, dev_base->units[i].h);
 123             READSHORT(PISCSI_CMD_SECS, dev_base->units[i].s);
 124
 125             debugval(PISCSI_DBG_VAL1, dev_base->units[i].c);
 126             debugval(PISCSI_DBG_VAL2, dev_base->units[i].h);
 127             debugval(PISCSI_DBG_VAL3, dev_base->units[i].s);
 128             debug(PISCSI_DBG_MSG, DBG_CHS);
 129         }
 130         dev_base->units[i].change_num++;
 131     }
 132
 133     return dev;
 134 }
 135
 136 static uint8_t* __attribute__((used)) expunge(struct Library *dev asm("a6"))
 137 {
 138     debug(PISCSI_DBG_MSG, DBG_CLEANUP);
 139     /*if (dev_base->open_count)
 140         return 0;
 141     FreeMem(dev_base, sizeof(struct piscsi_base));*/
 142     return 0;
 143 }
 144
 145 static void __attribute__((used)) open(struct Library *dev asm("a6"), struct IOExtTD *iotd asm("a1"), uint32_t num asm("d0"), uint32_t flags asm("d1"))
 146 {
 147     //struct Node* node = (struct Node*)iotd;
 148     int io_err = IOERR_OPENFAIL;
 149
 150     //WRITESHORT(PISCSI_CMD_DEBUGME, 1);
 151
 152     int unit_num = 0;
 153     WRITELONG(PISCSI_CMD_DRVNUM, num);
 154     READLONG(PISCSI_CMD_DRVNUM, unit_num);
 155
 156     debugval(PISCSI_DBG_VAL1, unit_num);
 157     debugval(PISCSI_DBG_VAL2, flags);
 158     debugval(PISCSI_DBG_VAL3, num);
 159     debug(PISCSI_DBG_MSG, DBG_OPENDEV);
 160
 161     if (iotd && unit_num < NUM_UNITS) {
 162         if (dev_base->units[unit_num].enabled && dev_base->units[unit_num].present) {
 163             io_err = 0;
 164             iotd->iotd_Req.io_Unit = (struct Unit*)&dev_base->units[unit_num].unit;
 165             iotd->iotd_Req.io_Unit->unit_flags = UNITF_ACTIVE;
 166             iotd->iotd_Req.io_Unit->unit_OpenCnt = 1;
 167         }
 168     }
 169
 170     iotd->iotd_Req.io_Error = io_err;
 171     ((struct Library *)dev_base->pi_dev)->lib_OpenCnt++;
 172 }
 173
 174 static uint8_t* __attribute__((used)) close(struct Library *dev asm("a6"), struct IOExtTD *iotd asm("a1"))
 175 {
 176     ((struct Library *)dev_base->pi_dev)->lib_OpenCnt--;
 177     return 0;
 178 }
 179
 180 static void __attribute__((used)) begin_io(struct Library *dev asm("a6"), struct IORequest *io asm("a1"))
 181 {
 182     if (dev_base == NULL || io == NULL)
 183         return;
 184
 185     struct piscsi_unit *u;
 186     struct Node* node = (struct Node*)io;
 187     u = (struct piscsi_unit *)io->io_Unit;
 188
 189     if (node == NULL || u == NULL)
 190         return;
 191
 192     debugval(PISCSI_DBG_VAL1, io->io_Command);
 193     debugval(PISCSI_DBG_VAL2, io->io_Flags);
 194     debugval(PISCSI_DBG_VAL3, (io->io_Flags & IOF_QUICK));
 195     debug(PISCSI_DBG_MSG, DBG_BEGINIO);
 196     io->io_Error = piscsi_perform_io(u, io);
 197
 198     if (!(io->io_Flags & IOF_QUICK)) {
 199         ReplyMsg(&io->io_Message);
 200     }
 201 }
 202
 203 static uint32_t __attribute__((used)) abort_io(struct Library *dev asm("a6"), struct IORequest *io asm("a1"))
 204 {
 205     debug(PISCSI_DBG_MSG, DBG_ABORTIO);
 206     if (!io) return IOERR_NOCMD;
 207     io->io_Error = IOERR_ABORTED;
 208
 209     return IOERR_ABORTED;
 210 }
 211
 212 uint8_t piscsi_rw(struct piscsi_unit *u, struct IORequest *io) {
 213     struct IOStdReq *iostd = (struct IOStdReq *)io;
 214     struct IOExtTD *iotd = (struct IOExtTD *)io;
 215
 216     uint8_t* data;
 217     uint32_t len;
 218     //uint32_t block, num_blocks;
 219     uint8_t sderr = 0;
 220
 221     data = iotd->iotd_Req.io_Data;
 222     len = iotd->iotd_Req.io_Length;
 223
 224     if (data == 0) {
 225         return IOERR_BADADDRESS;
 226     }
 227     if (len < PISCSI_BLOCK_SIZE) {
 228         iostd->io_Actual = 0;
 229         return IOERR_BADLENGTH;
 230     }
 231
 232     switch (io->io_Command) {
 233         case TD_WRITE64:
 234         case NSCMD_TD_WRITE64:
 235         case TD_FORMAT64:
 236         case NSCMD_TD_FORMAT64:
 237             WRITELONG(PISCSI_CMD_ADDR1, iostd->io_Offset);
 238             WRITELONG(PISCSI_CMD_ADDR2, len);
 239             WRITELONG(PISCSI_CMD_ADDR3, (uint32_t)data);
 240             WRITELONG(PISCSI_CMD_ADDR4, iostd->io_Actual);
 241             WRITESHORT(PISCSI_CMD_WRITE64, u->unit_num);
 242             break;
 243         case TD_READ64:
 244         case NSCMD_TD_READ64:
 245             WRITELONG(PISCSI_CMD_ADDR1, iostd->io_Offset);
 246             WRITELONG(PISCSI_CMD_ADDR2, len);
 247             WRITELONG(PISCSI_CMD_ADDR3, (uint32_t)data);
 248             WRITELONG(PISCSI_CMD_ADDR4, iostd->io_Actual);
 249             WRITESHORT(PISCSI_CMD_READ64, u->unit_num);
 250             break;
 251         case TD_FORMAT:
 252         case CMD_WRITE:
 253             WRITELONG(PISCSI_CMD_ADDR1, (iostd->io_Offset >> 9));
 254             WRITELONG(PISCSI_CMD_ADDR2, len);
 255             WRITELONG(PISCSI_CMD_ADDR3, (uint32_t)data);
 256             WRITESHORT(PISCSI_CMD_WRITE, u->unit_num);
 257             break;
 258         case CMD_READ:
 259             WRITELONG(PISCSI_CMD_ADDR1, (iostd->io_Offset >> 9));
 260             WRITELONG(PISCSI_CMD_ADDR2, len);
 261             WRITELONG(PISCSI_CMD_ADDR3, (uint32_t)data);
 262             WRITESHORT(PISCSI_CMD_READ, u->unit_num);
 263             break;
 264     }
 265
 266     if (sderr) {
 267         iostd->io_Actual = 0;
 268
 269         if (sderr & SCSIERR_TIMEOUT)
 270             return TDERR_DiskChanged;
 271         if (sderr & SCSIERR_PARAM)
 272             return TDERR_SeekError;
 273         if (sderr & SCSIERR_ADDRESS)
 274             return TDERR_SeekError;
 275         if (sderr & (SCSIERR_ERASESEQ | SCSIERR_ERASERES))
 276             return TDERR_BadSecPreamble;
 277         if (sderr & SCSIERR_CRC)
 278             return TDERR_BadSecSum;
 279         if (sderr & SCSIERR_ILLEGAL)
 280             return TDERR_TooFewSecs;
 281         if (sderr & SCSIERR_IDLE)
 282             return TDERR_PostReset;
 283
 284         return TDERR_SeekError;
 285     } else {
 286         iostd->io_Actual = iotd->iotd_Req.io_Length;
 287     }
 288
 289     return 0;
 290 }
 291
 292 #define PISCSI_ID_STRING "PISTORM Fake SCSI Disk  0.1 1111111111111111"
 293
 294 uint8_t piscsi_scsi(struct piscsi_unit *u, struct IORequest *io)
 295 {
 296     struct IOStdReq *iostd = (struct IOStdReq *)io;
 297     struct SCSICmd *scsi = iostd->io_Data;
 298     //uint8_t* registers = sdu->sdu_Registers;
 299     uint8_t *data = (uint8_t *)scsi->scsi_Data;
 300     uint32_t i, block = 0, blocks = 0, maxblocks = 0;
 301     uint8_t err = 0;
 302     uint8_t write = 0;
 303
 304     debugval(PISCSI_DBG_VAL1, iostd->io_Length);
 305     debugval(PISCSI_DBG_VAL2, scsi->scsi_Command[0]);
 306     debugval(PISCSI_DBG_VAL3, scsi->scsi_Command[1]);
 307     debugval(PISCSI_DBG_VAL4, scsi->scsi_Command[2]);
 308     debugval(PISCSI_DBG_VAL5, scsi->scsi_CmdLength);
 309     debug(PISCSI_DBG_MSG, DBG_SCSICMD);
 310
 311     //maxblocks = u->s * u->c * u->h;
 312
 313     if (scsi->scsi_CmdLength < 6) {
 314         return IOERR_BADLENGTH;
 315     }
 316
 317     if (scsi->scsi_Command == NULL) {
 318         return IOERR_BADADDRESS;
 319     }
 320
 321     scsi->scsi_Actual = 0;
 322     //iostd->io_Actual = sizeof(*scsi);
 323
 324     switch (scsi->scsi_Command[0]) {
 325         case SCSICMD_TEST_UNIT_READY:
 326             err = 0;
 327             break;
 328
 329         case SCSICMD_INQUIRY:
 330             for (i = 0; i < scsi->scsi_Length; i++) {
 331                 uint8_t val = 0;
 332
 333                 switch (i) {
 334                     case 0: // SCSI device type: direct-access device
 335                         val = (0 << 5) | 0;
 336                         break;
 337                     case 1: // RMB = 1
 338                         val = (1 << 7);
 339                         break;
 340                     case 2: // VERSION = 0
 341                         val = 0;
 342                         break;
 343                     case 3: // NORMACA=0, HISUP = 0, RESPONSE_DATA_FORMAT = 2
 344                         val = (0 << 5) | (0 << 4) | 2;
 345                         break;
 346                     case 4: // ADDITIONAL_LENGTH = 44 - 4
 347                         val = 44 - 4;
 348                         break;
 349                     default:
 350                         if (i >= 8 && i < 44)
 351                             val = PISCSI_ID_STRING[i - 8];
 352                         else
 353                             val = 0;
 354                         break;
 355                 }
 356                 data[i] = val;
 357             }
 358             scsi->scsi_Actual = i;
 359             err = 0;
 360             break;
 361
 362         case SCSICMD_WRITE_6:
 363             write = 1;
 364         case SCSICMD_READ_6:
 365             //block = *(uint32_t *)(&scsi->scsi_Command[0]) & 0x001FFFFF;
 366             block = scsi->scsi_Command[1] & 0x1f;
 367             block = (block << 8) | scsi->scsi_Command[2];
 368             block = (block << 8) | scsi->scsi_Command[3];
 369             blocks = scsi->scsi_Command[4];
 370             debugval(PISCSI_DBG_VAL1, (uint32_t)scsi->scsi_Command);
 371             debug(PISCSI_DBG_MSG, DBG_SCSICMD_RW6);
 372             goto scsireadwrite;
 373         case SCSICMD_WRITE_10:
 374             write = 1;
 375         case SCSICMD_READ_10:
 376             debugval(PISCSI_DBG_VAL1, (uint32_t)scsi->scsi_Command);
 377             debug(PISCSI_DBG_MSG, DBG_SCSICMD_RW10);
 378             //block = *(uint32_t *)(&scsi->scsi_Command[2]);
 379             block = scsi->scsi_Command[2];
 380             block = (block << 8) | scsi->scsi_Command[3];
 381             block = (block << 8) | scsi->scsi_Command[4];
 382             block = (block << 8) | scsi->scsi_Command[5];
 383
 384             //blocks = *(uint16_t *)(&scsi->scsi_Command[7]);
 385             blocks = scsi->scsi_Command[7];
 386             blocks = (blocks << 8) | scsi->scsi_Command[8];
 387
 388 scsireadwrite:;
 389             WRITESHORT(PISCSI_CMD_DRVNUM, (u->scsi_num));
 390             READLONG(PISCSI_CMD_BLOCKS, maxblocks);
 391             if (block + blocks > maxblocks || blocks == 0) {
 392                 err = IOERR_BADADDRESS;
 393                 break;
 394             }
 395             if (data == NULL) {
 396                 err = IOERR_BADADDRESS;
 397                 break;
 398             }
 399
 400             if (write == 0) {
 401                 WRITELONG(PISCSI_CMD_ADDR1, block);
 402                 WRITELONG(PISCSI_CMD_ADDR2, (blocks << 9));
 403                 WRITELONG(PISCSI_CMD_ADDR3, (uint32_t)data);
 404                 WRITESHORT(PISCSI_CMD_READ, u->unit_num);
 405             }
 406             else {
 407                 WRITELONG(PISCSI_CMD_ADDR1, block);
 408                 WRITELONG(PISCSI_CMD_ADDR2, (blocks << 9));
 409                 WRITELONG(PISCSI_CMD_ADDR3, (uint32_t)data);
 410                 WRITESHORT(PISCSI_CMD_WRITE, u->unit_num);
 411             }
 412
 413             scsi->scsi_Actual = scsi->scsi_Length;
 414             err = 0;
 415             break;
 416
 417         case SCSICMD_READ_CAPACITY_10:
 418             if (scsi->scsi_CmdLength < 10) {
 419                 err = HFERR_BadStatus;
 420                 break;
 421             }
 422
 423             if (scsi->scsi_Length < 8) {
 424                 err = IOERR_BADLENGTH;
 425                 break;
 426             }
 427
 428             WRITESHORT(PISCSI_CMD_DRVNUM, (u->scsi_num));
 429             READLONG(PISCSI_CMD_BLOCKS, blocks);
 430             ((uint32_t*)data)[0] = blocks - 1;
 431             ((uint32_t*)data)[1] = PISCSI_BLOCK_SIZE;
 432
 433             scsi->scsi_Actual = 8;
 434             err = 0;
 435
 436             break;
 437         case SCSICMD_MODE_SENSE_6:
 438             data[0] = 3 + 8 + 0x16;
 439             data[1] = 0; // MEDIUM TYPE
 440             data[2] = 0;
 441             data[3] = 8;
 442
 443             debugval(PISCSI_DBG_VAL1, ((uint32_t)scsi->scsi_Command));
 444             debug(PISCSI_DBG_MSG, DBG_SCSI_DEBUG_MODESENSE_6);
 445
 446             WRITESHORT(PISCSI_CMD_DRVNUM, (u->scsi_num));
 447             READLONG(PISCSI_CMD_BLOCKS, maxblocks);
 448             (blocks = (maxblocks - 1) & 0xFFFFFF);
 449
 450             *((uint32_t *)&data[4]) = blocks;
 451             *((uint32_t *)&data[8]) = PISCSI_BLOCK_SIZE;
 452
 453             switch (((UWORD)scsi->scsi_Command[2] << 8) | scsi->scsi_Command[3]) {
 454                 case 0x0300: { // Format Device Mode
 455                     debug(PISCSI_DBG_MSG, DBG_SCSI_FORMATDEVICE);
 456                     uint8_t *datext = data + 12;
 457                     datext[0] = 0x03;
 458                     datext[1] = 0x16;
 459                     datext[2] = 0x00;
 460                     datext[3] = 0x01;
 461                     *((uint32_t *)&datext[4]) = 0;
 462                     *((uint32_t *)&datext[8]) = 0;
 463                     *((uint16_t *)&datext[10]) = u->s;
 464                     *((uint16_t *)&datext[12]) = PISCSI_BLOCK_SIZE;
 465                     datext[14] = 0x00;
 466                     datext[15] = 0x01;
 467                     *((uint32_t *)&datext[16]) = 0;
 468                     datext[20] = 0x80;
 469
 470                     scsi->scsi_Actual = data[0] + 1;
 471                     err = 0;
 472                     break;
 473                 }
 474                 case 0x0400: // Rigid Drive Geometry
 475                     debug(PISCSI_DBG_MSG, DBG_SCSI_RDG);
 476                     uint8_t *datext = data + 12;
 477                     datext[0] = 0x04;
 478                     *((uint32_t *)&datext[1]) = u->c;
 479                     datext[1] = 0x16;
 480                     datext[5] = u->h;
 481                     datext[6] = 0x00;
 482                     *((uint32_t *)&datext[6]) = 0;
 483                     *((uint32_t *)&datext[10]) = 0;
 484                     *((uint32_t *)&datext[13]) = u->c;
 485                     datext[17] = 0;
 486                     *((uint32_t *)&datext[18]) = 0;
 487                     *((uint16_t *)&datext[20]) = 5400;
 488
 489                     scsi->scsi_Actual = data[0] + 1;
 490                     err = 0;
 491                     break;
 492
 493                 default:
 494                     debugval(PISCSI_DBG_VAL1, (((UWORD)scsi->scsi_Command[2] << 8) | scsi->scsi_Command[3]));
 495                     debug(PISCSI_DBG_MSG, DBG_SCSI_UNKNOWN_MODESENSE);
 496                     err = HFERR_BadStatus;
 497                     break;
 498             }
 499             break;
 500
 501         case SCSICMD_READ_DEFECT_DATA_10:
 502             break;
 503         case SCSICMD_CHANGE_DEFINITION:
 504             break;
 505
 506         default:
 507             debugval(PISCSI_DBG_VAL1, scsi->scsi_Command[0]);
 508             debug(PISCSI_DBG_MSG, DBG_SCSI_UNKNOWN_COMMAND);
 509             err = HFERR_BadStatus;
 510             break;
 511     }
 512
 513     if (err != 0) {
 514         debugval(PISCSI_DBG_VAL1, err);
 515         debug(PISCSI_DBG_MSG, DBG_SCSIERR);
 516         scsi->scsi_Actual = 0;
 517     }
 518
 519     return err;
 520 }
 521
 522 uint16_t ns_support[] = {
 523     NSCMD_DEVICEQUERY,
 524         CMD_RESET,
 525         CMD_READ,
 526         CMD_WRITE,
 527         CMD_UPDATE,
 528         CMD_CLEAR,
 529         CMD_START,
 530         CMD_STOP,
 531         CMD_FLUSH,
 532         TD_MOTOR,
 533         TD_SEEK,
 534         TD_FORMAT,
 535         TD_REMOVE,
 536         TD_CHANGENUM,
 537         TD_CHANGESTATE,
 538         TD_PROTSTATUS,
 539         TD_GETDRIVETYPE,
 540         TD_GETGEOMETRY,
 541         TD_ADDCHANGEINT,
 542         TD_REMCHANGEINT,
 543         HD_SCSICMD,
 544         NSCMD_TD_READ64,
 545         NSCMD_TD_WRITE64,
 546         NSCMD_TD_SEEK64,
 547         NSCMD_TD_FORMAT64,
 548         0,
 549 };
 550
 551 #define DUMMYCMD iostd->io_Actual = 0; break;
 552 uint8_t piscsi_perform_io(struct piscsi_unit *u, struct IORequest *io) {
 553     struct IOStdReq *iostd = (struct IOStdReq *)io;
 554     struct IOExtTD *iotd = (struct IOExtTD *)io;
 555
 556     //uint8_t *data;
 557     //uint32_t len;
 558     //uint32_t offset;
 559     //struct DriveGeometry *geom;
 560     uint8_t err = 0;
 561
 562     if (!u->enabled) {
 563         return IOERR_OPENFAIL;
 564     }
 565
 566     //data = iotd->iotd_Req.io_Data;
 567     //len = iotd->iotd_Req.io_Length;
 568
 569     if (io->io_Error == IOERR_ABORTED) {
 570         return io->io_Error;
 571     }
 572
 573     debugval(PISCSI_DBG_VAL1, io->io_Command);
 574     debugval(PISCSI_DBG_VAL2, io->io_Flags);
 575     debugval(PISCSI_DBG_VAL3, iostd->io_Length);
 576     debug(PISCSI_DBG_MSG, DBG_IOCMD);
 577
 578     switch (io->io_Command) {
 579         case NSCMD_DEVICEQUERY: {
 580             struct NSDeviceQueryResult *res = (struct NSDeviceQueryResult *)iotd->iotd_Req.io_Data;
 581             res->DevQueryFormat = 0;
 582             res->SizeAvailable = 16;;
 583             res->DeviceType = NSDEVTYPE_TRACKDISK;
 584             res->DeviceSubType = 0;
 585             res->SupportedCommands = ns_support;
 586
 587             iostd->io_Actual = 16;
 588             return 0;
 589             break;
 590         }
 591         case CMD_CLEAR:
 592             /* Invalidate read buffer */
 593             DUMMYCMD;
 594         case CMD_UPDATE:
 595             /* Flush write buffer */
 596             DUMMYCMD;
 597         case TD_PROTSTATUS:
 598             DUMMYCMD;
 599         case TD_CHANGENUM:
 600             iostd->io_Actual = u->change_num;
 601             break;
 602         case TD_REMOVE:
 603             DUMMYCMD;
 604         case TD_CHANGESTATE:
 605             DUMMYCMD;
 606         case TD_GETDRIVETYPE:
 607             iostd->io_Actual = DG_DIRECT_ACCESS;
 608             break;
 609         case TD_MOTOR:
 610             iostd->io_Actual = u->motor;
 611             u->motor = iostd->io_Length ? 1 : 0;
 612             break;
 613
 614         case TD_FORMAT:
 615         case TD_FORMAT64:
 616         case NSCMD_TD_FORMAT64:
 617         case TD_READ64:
 618         case NSCMD_TD_READ64:
 619         case TD_WRITE64:
 620         case NSCMD_TD_WRITE64:
 621         case CMD_WRITE:
 622         case CMD_READ:
 623             err = piscsi_rw(u, io);
 624             break;
 625         case HD_SCSICMD:
 626             //err = 0;
 627             err = piscsi_scsi(u, io);
 628             break;
 629         default: {
 630             //int cmd = io->io_Command;
 631             debug(PISCSI_DBG_MSG, DBG_IOCMD_UNHANDLED);
 632             err = IOERR_NOCMD;
 633             break;
 634         }
 635     }
 636
 637     return err;
 638 }
 639 #undef DUMMYCMD
 640
 641 static uint32_t device_vectors[] = {
 642     (uint32_t)open,
 643     (uint32_t)close,
 644     (uint32_t)expunge,
 645     0, //extFunc not used here
 646     (uint32_t)begin_io,
 647     (uint32_t)abort_io,
 648     -1
 649 };
 650
 651 const uint32_t auto_init_tables[4] = {
 652     sizeof(struct Library),
 653     (uint32_t)device_vectors,
 654     0,
 655     (uint32_t)init_device
 656 };