+ case 0x06: // FLOGNP1
+ case 0x07: // FLOGNP1
+ {
+ REG_FP[dst] = floatx80_lognp1 (source, &status);
+ SET_CONDITION_CODES(state, REG_FP[dst]);
+ USE_CYCLES(594); // for MC68881
+ break;
+ }
+ case 0x08: // FETOXM1
+ {
+ REG_FP[dst] = floatx80_etoxm1(source, &status);
+ SET_CONDITION_CODES(state, REG_FP[dst]);
+ USE_CYCLES(6);
+ break;
+ }
+ case 0x09: // FTANH
+ {
+ REG_FP[dst] = floatx80_tanh(source, &status);
+ SET_CONDITION_CODES(state, REG_FP[dst]);
+ USE_CYCLES(75);
+ break;
+ }
+ case 0x0a: // FATAN
+ case 0x0b: // FATAN
+ {
+ REG_FP[dst] = floatx80_atan(source, &status);
+ SET_CONDITION_CODES(state, REG_FP[dst]);
+ USE_CYCLES(75);
+ break;
+ }
+ case 0x0c: // FASIN
+ {
+ REG_FP[dst] = floatx80_asin(source, &status);
+ SET_CONDITION_CODES(state, REG_FP[dst]);
+ USE_CYCLES(75);
+ break;
+ }
+ case 0x0d: // FATANH
+ {
+ REG_FP[dst] = floatx80_atanh(source, &status);
+ SET_CONDITION_CODES(state, REG_FP[dst]);
+ USE_CYCLES(75);
+ break;
+ }
+ case 0x0e: // FSIN
+ {
+ REG_FP[dst] = floatx80_sin(source, &status);
+ SET_CONDITION_CODES(state, REG_FP[dst]);
+ USE_CYCLES(75);
+ break;
+ }
+ case 0x0f: // FTAN
+ {
+ REG_FP[dst] = floatx80_tan(source, &status);
+ SET_CONDITION_CODES(state, REG_FP[dst]);
+ USE_CYCLES(75);
+ break;
+ }
+ case 0x10: // FETOX
+ {
+ REG_FP[dst] = floatx80_etox(source, &status);
+ SET_CONDITION_CODES(state, REG_FP[dst]);
+ USE_CYCLES(75);
+ break;
+ }
+ case 0x11: // FTWOTOX
+ {
+ REG_FP[dst] = floatx80_twotox(source, &status);
+ SET_CONDITION_CODES(state, REG_FP[dst]);
+ USE_CYCLES(75);
+ break;
+ }
+ case 0x12: // FTENTOX
+ case 0x13: // FTENTOX
+ {
+ REG_FP[dst] = floatx80_tentox(source, &status);
+ SET_CONDITION_CODES(state, REG_FP[dst]);
+ USE_CYCLES(75);
+ break;
+ }
+ case 0x14: // FLOGN
+ {
+ REG_FP[dst] = floatx80_logn(source, &status);
+ SET_CONDITION_CODES(state, REG_FP[dst]);
+ USE_CYCLES(548); // for MC68881
+ break;
+ }
+ case 0x15: // FLOG10
+ {
+ REG_FP[dst] = floatx80_log10(source, &status);
+ SET_CONDITION_CODES(state, REG_FP[dst]);
+ USE_CYCLES(604); // for MC68881
+ break;
+ }
+ case 0x16: // FLOG2
+ case 0x17: // FLOG2
+ {
+ REG_FP[dst] = floatx80_log2(source, &status);
+ SET_CONDITION_CODES(state, REG_FP[dst]);
+ USE_CYCLES(604); // for MC68881
+ break;
+ }
+ case 0x5C: // FDABS
+ case 0x58: // FSABS