/*****************************************************************************
* Preamble
*****************************************************************************/
-#include <string.h> /* strerror() */
-#include <stdlib.h> /* malloc(), free() */
#include <vlc/vlc.h>
#include <vlc_vout.h>
#if defined (MODULE_NAME_IS_i420_yuy2_mmx)
/* re-enable FPU registers */
- __asm__ __volatile__ ( "emms" );
+ MMX_END;
#endif
#if defined (MODULE_NAME_IS_i420_yuy2_altivec)
#else // defined(MODULE_NAME_IS_i420_yuy2_sse2)
/*
- ** SSE2 128 bits fetch/store instructions are faster
+ ** SSE2 128 bits fetch/store instructions are faster
** if memory access is 16 bytes aligned
*/
if( 0 == (15 & (p_source->p[Y_PLANE].i_pitch|p_dest->p->i_pitch|
- ((int)p_line2|(int)p_y2))) )
+ ((intptr_t)p_line2|(intptr_t)p_y2))) )
{
/* use faster SSE2 aligned fetch and store */
for( i_y = p_vout->render.i_height / 2 ; i_y-- ; )
p_line1 += i_dest_margin;
p_line2 += i_dest_margin;
}
- /* make sure all SSE2 stores are visible thereafter */
- __asm__ __volatile__ ( "sfence" );
}
else
{
p_line2 += i_dest_margin;
}
}
+ /* make sure all SSE2 stores are visible thereafter */
+ SSE2_END;
#endif // defined(MODULE_NAME_IS_i420_yuy2_sse2)
}
#if defined (MODULE_NAME_IS_i420_yuy2_mmx)
/* re-enable FPU registers */
- __asm__ __volatile__ ( "emms" );
+ MMX_END;
#endif
#if defined (MODULE_NAME_IS_i420_yuy2_altivec)
#else // defined(MODULE_NAME_IS_i420_yuy2_sse2)
/*
- ** SSE2 128 bits fetch/store instructions are faster
+ ** SSE2 128 bits fetch/store instructions are faster
** if memory access is 16 bytes aligned
*/
if( 0 == (15 & (p_source->p[Y_PLANE].i_pitch|p_dest->p->i_pitch|
- ((int)p_line2|(int)p_y2))) )
+ ((intptr_t)p_line2|(intptr_t)p_y2))) )
{
/* use faster SSE2 aligned fetch and store */
for( i_y = p_vout->render.i_height / 2 ; i_y-- ; )
p_line1 += i_dest_margin;
p_line2 += i_dest_margin;
}
- /* make sure all SSE2 stores are visible thereafter */
- __asm__ __volatile__ ( "sfence" );
}
else
{
p_line2 += i_dest_margin;
}
}
+ /* make sure all SSE2 stores are visible thereafter */
+ SSE2_END;
#endif // defined(MODULE_NAME_IS_i420_yuy2_sse2)
}
#if defined (MODULE_NAME_IS_i420_yuy2_mmx)
/* re-enable FPU registers */
- __asm__ __volatile__ ( "emms" );
+ MMX_END;
#endif
#if defined (MODULE_NAME_IS_i420_yuy2_altivec)
#else // defined(MODULE_NAME_IS_i420_yuy2_sse2)
/*
- ** SSE2 128 bits fetch/store instructions are faster
+ ** SSE2 128 bits fetch/store instructions are faster
** if memory access is 16 bytes aligned
*/
if( 0 == (15 & (p_source->p[Y_PLANE].i_pitch|p_dest->p->i_pitch|
- ((int)p_line2|(int)p_y2))) )
+ ((intptr_t)p_line2|(intptr_t)p_y2))) )
{
/* use faster SSE2 aligned fetch and store */
for( i_y = p_vout->render.i_height / 2 ; i_y-- ; )
p_line1 += i_dest_margin;
p_line2 += i_dest_margin;
}
- /* make sure all SSE2 stores are visible thereafter */
- __asm__ __volatile__ ( "sfence" );
}
else
{
p_line2 += i_dest_margin;
}
}
+ /* make sure all SSE2 stores are visible thereafter */
+ SSE2_END;
#endif // defined(MODULE_NAME_IS_i420_yuy2_sse2)
}
#if defined (MODULE_NAME_IS_i420_yuy2_mmx)
/* re-enable FPU registers */
- __asm__ __volatile__ ( "emms" );
+ MMX_END;
#endif
#else // defined(MODULE_NAME_IS_i420_yuy2_sse2)
/*
- ** SSE2 128 bits fetch/store instructions are faster
+ ** SSE2 128 bits fetch/store instructions are faster
** if memory access is 16 bytes aligned
*/
if( 0 == (15 & (p_source->p[Y_PLANE].i_pitch|p_dest->p->i_pitch|
- ((int)p_line2|(int)p_y2))) )
+ ((intptr_t)p_line2|(intptr_t)p_y2))) )
{
/* use faster SSE2 aligned fetch and store */
for( i_y = p_vout->render.i_height / 2 ; i_y-- ; )
p_line1 += i_dest_margin;
p_line2 += i_dest_margin;
}
- /* make sure all SSE2 stores are visible thereafter */
- __asm__ __volatile__ ( "sfence" );
}
else
{
p_line2 += i_dest_margin;
}
}
+ /* make sure all SSE2 stores are visible thereafter */
+ SSE2_END;
#endif // defined(MODULE_NAME_IS_i420_yuy2_sse2)
}
#endif // !defined (MODULE_NAME_IS_i420_yuy2_altivec)