}
extern struct emulator_config *cfg;
+extern void stop_cpu_emulation(uint8_t disasm_cur);
void handle_piscsi_write(uint32_t addr, uint32_t val, uint8_t type) {
int32_t r;
piscsi_cur_drive = val;
printf("[PISCSI] (%s) Drive number set to %d (%d)\n", op_type_names[type], piscsi_cur_drive, val);
break;
+ case PISCSI_CMD_DEBUGME:
+ printf("[PISCSI] DebugMe triggered.\n");
+ stop_cpu_emulation(1);
+ break;
+ case PISCSI_CMD_DRIVER: {
+ printf("[PISCSI] Driver copy/patch called, destination address %.8X.\n", val);
+ int r = get_mapped_item_by_address(cfg, val);
+ if (r != -1) {
+ uint32_t addr = val - cfg->map_offset[r];
+ uint32_t rt_offs = 0;
+ uint8_t *dst_data = cfg->map_data[r];
+ memcpy(dst_data + addr, piscsi_rom_ptr + 0x400, 0x3C00);
+
+ uint32_t base_offs = be32toh(*((uint32_t *)&dst_data[addr + 0x170])) + 2;
+ rt_offs = val + 0x16E;
+ printf ("Offset 1: %.8X -> %.8X\n", base_offs, rt_offs);
+ *((uint32_t *)&dst_data[addr + 0x170]) = htobe32(rt_offs);
+
+ uint32_t offs = be32toh(*((uint32_t *)&dst_data[addr + 0x174]));
+ printf ("Offset 2: %.8X -> %.8X\n", offs, (offs - base_offs) + rt_offs);
+ *((uint32_t *)&dst_data[addr + 0x174]) = htobe32((offs - base_offs) + rt_offs);
+
+ dst_data[addr + 0x178] |= 0x07;
+
+ offs = be32toh(*((uint32_t *)&dst_data[addr + 0x17C]));
+ printf ("Offset 3: %.8X -> %.8X\n", offs, (offs - base_offs) + rt_offs);
+ *((uint32_t *)&dst_data[addr + 0x17C]) = htobe32((offs - base_offs) + rt_offs);
+
+ offs = be32toh(*((uint32_t *)&dst_data[addr + 0x180]));
+ printf ("Offset 4: %.8X -> %.8X\n", offs, (offs - base_offs) + rt_offs);
+ *((uint32_t *)&dst_data[addr + 0x180]) = htobe32((offs - base_offs) + rt_offs);
+
+ offs = be32toh(*((uint32_t *)&dst_data[addr + 0x184]));
+ printf ("Offset 5: %.8X -> %.8X\n", offs, (offs - base_offs) + rt_offs);
+ *((uint32_t *)&dst_data[addr + 0x184]) = htobe32((offs - base_offs) + rt_offs);
+
+ }
+ else {
+ for (int i = 0; i < 0x3C00; i++) {
+ uint8_t src = piscsi_rom_ptr[0x400 + i];
+ write8(addr + i, src);
+ }
+ }
+ break;
+ }
default:
printf("[PISCSI] Unhandled %s register write to %.8X: %d\n", op_type_names[type], addr, val);
break;
if ((addr & 0xFFFF) >= PISCSI_CMD_ROM) {
uint32_t romoffs = (addr & 0xFFFF) - PISCSI_CMD_ROM;
- if (romoffs < 14 && !piscsi_diag_read) {
+ /*if (romoffs < 14 && !piscsi_diag_read) {
printf("[PISCSI] %s read from DiagArea @$%.4X: ", op_type_names[type], romoffs);
uint32_t v = 0;
switch (type) {
if (romoffs == 0x0D)
piscsi_diag_read = 1;
return v;
- }
+ }*/
if (romoffs < (piscsi_rom_size + PIB)) {
printf("[PISCSI] %s read from Boot ROM @$%.4X (%.8X): ", op_type_names[type], romoffs, addr);
uint32_t v = 0;