2.0. Updated tbb library.

[casparcg] / tbb / include / tbb / machine / linux_ia32.h

diff --git a/tbb/include/tbb/machine/linux_ia32.h b/tbb/include/tbb/machine/linux_ia32.h
index 547bf50432be4dc3e9ad60a58cc086e7233b21bc..03ddef5b0cae9cb66c1cbb7f76dee785d03a2108 100644 (file)
--- a/tbb/include/tbb/machine/linux_ia32.h
+++ b/tbb/include/tbb/machine/linux_ia32.h
@@ -26,18 +26,23 @@
     the GNU General Public License.
 */
 
-#ifndef __TBB_machine_H
+#if !defined(__TBB_machine_H) || defined(__TBB_machine_linux_ia32_H)
 #error Do not include this file directly; include tbb_machine.h instead
 #endif
 
+#define __TBB_machine_linux_ia32_H
+
 #include <stdint.h>
 #include <unistd.h>
 
 #define __TBB_WORDSIZE 4
 #define __TBB_BIG_ENDIAN 0
 
-#define __TBB_release_consistency_helper() __asm__ __volatile__("": : :"memory")
-#define __TBB_full_memory_fence() __asm__ __volatile__("mfence": : :"memory")
+#define __TBB_compiler_fence() __asm__ __volatile__("": : :"memory")
+#define __TBB_control_consistency_helper() __TBB_compiler_fence()
+#define __TBB_acquire_consistency_helper() __TBB_compiler_fence()
+#define __TBB_release_consistency_helper() __TBB_compiler_fence()
+#define __TBB_full_memory_fence()          __asm__ __volatile__("mfence": : :"memory")
 
 #if __TBB_ICC_ASM_VOLATILE_BROKEN
 #define __TBB_VOLATILE
@@ -45,7 +50,7 @@
 #define __TBB_VOLATILE volatile
 #endif
 
-#define __MACHINE_DECL_ATOMICS(S,T,X,R) \
+#define __TBB_MACHINE_DEFINE_ATOMICS(S,T,X,R)                                        \
 static inline T __TBB_machine_cmpswp##S (volatile void *ptr, T value, T comparand )  \
 {                                                                                    \
     T result;                                                                        \
@@ -61,7 +66,7 @@ static inline T __TBB_machine_fetchadd##S(volatile void *ptr, T addend)
 {                                                                                    \
     T result;                                                                        \
     __asm__ __volatile__("lock\nxadd" X " %0,%1"                                     \
-                          : R (result), "=m"(*(__TBB_VOLATILE T*)ptr)            \
+                          : R (result), "=m"(*(__TBB_VOLATILE T*)ptr)                \
                           : "0"(addend), "m"(*(__TBB_VOLATILE T*)ptr)                \
                           : "memory");                                               \
     return result;                                                                   \
@@ -71,15 +76,21 @@ static inline  T __TBB_machine_fetchstore##S(volatile void *ptr, T value)
 {                                                                                    \
     T result;                                                                        \
     __asm__ __volatile__("lock\nxchg" X " %0,%1"                                     \
-                          : R (result), "=m"(*(__TBB_VOLATILE T*)ptr)            \
+                          : R (result), "=m"(*(__TBB_VOLATILE T*)ptr)                \
                           : "0"(value), "m"(*(__TBB_VOLATILE T*)ptr)                 \
                           : "memory");                                               \
     return result;                                                                   \
 }                                                                                    \
                                                                                      
-__MACHINE_DECL_ATOMICS(1,int8_t,"","=q")
-__MACHINE_DECL_ATOMICS(2,int16_t,"","=r")
-__MACHINE_DECL_ATOMICS(4,int32_t,"l","=r")
+__TBB_MACHINE_DEFINE_ATOMICS(1,int8_t,"","=q")
+__TBB_MACHINE_DEFINE_ATOMICS(2,int16_t,"","=r")
+__TBB_MACHINE_DEFINE_ATOMICS(4,int32_t,"l","=r")
+
+#if __INTEL_COMPILER
+#pragma warning( push )
+// reference to EBX in a function requiring stack alignment
+#pragma warning( disable: 998 )
+#endif
 
 static inline int64_t __TBB_machine_cmpswp8 (volatile void *ptr, int64_t value, int64_t comparand )
 {
@@ -130,6 +141,10 @@ static inline int64_t __TBB_machine_cmpswp8 (volatile void *ptr, int64_t value,
     return result;
 }
 
+#if __INTEL_COMPILER
+#pragma warning( pop )
+#endif // warning 998 is back
+
 static inline int32_t __TBB_machine_lg( uint32_t x ) {
     int32_t j;
     __asm__ ("bsr %1,%0" : "=r"(j) : "r"(x));
@@ -184,46 +199,18 @@ static inline void __TBB_machine_store8(volatile void *ptr, int64_t value) {
 }
  
 // Machine specific atomic operations
-
-#define __TBB_CompareAndSwap1(P,V,C) __TBB_machine_cmpswp1(P,V,C)
-#define __TBB_CompareAndSwap2(P,V,C) __TBB_machine_cmpswp2(P,V,C)
-#define __TBB_CompareAndSwap4(P,V,C) __TBB_machine_cmpswp4(P,V,C)
-#define __TBB_CompareAndSwap8(P,V,C) __TBB_machine_cmpswp8(P,V,C)
-#define __TBB_CompareAndSwapW(P,V,C) __TBB_machine_cmpswp4(P,V,C)
-
-#define __TBB_FetchAndAdd1(P,V) __TBB_machine_fetchadd1(P,V)
-#define __TBB_FetchAndAdd2(P,V) __TBB_machine_fetchadd2(P,V)
-#define __TBB_FetchAndAdd4(P,V) __TBB_machine_fetchadd4(P,V)
-#define __TBB_FetchAndAddW(P,V) __TBB_machine_fetchadd4(P,V)
-
-#define __TBB_FetchAndStore1(P,V) __TBB_machine_fetchstore1(P,V)
-#define __TBB_FetchAndStore2(P,V) __TBB_machine_fetchstore2(P,V)
-#define __TBB_FetchAndStore4(P,V) __TBB_machine_fetchstore4(P,V)
-#define __TBB_FetchAndStoreW(P,V) __TBB_machine_fetchstore4(P,V)
-
-#define __TBB_Store8(P,V) __TBB_machine_store8(P,V)
-#define __TBB_Load8(P)    __TBB_machine_load8(P)
-
 #define __TBB_AtomicOR(P,V) __TBB_machine_or(P,V)
 #define __TBB_AtomicAND(P,V) __TBB_machine_and(P,V)
 
-
-// Those we chose not to implement (they will be implemented generically using CMPSWP8)
-#undef __TBB_FetchAndAdd8
-#undef __TBB_FetchAndStore8
-
 // Definition of other functions
 #define __TBB_Pause(V) __TBB_machine_pause(V)
 #define __TBB_Log2(V)  __TBB_machine_lg(V)
 
-// Special atomic functions
-#define __TBB_FetchAndAddWrelease(P,V) __TBB_FetchAndAddW(P,V)
-#define __TBB_FetchAndIncrementWacquire(P) __TBB_FetchAndAddW(P,1)
-#define __TBB_FetchAndDecrementWrelease(P) __TBB_FetchAndAddW(P,-1)
-
-// Use generic definitions from tbb_machine.h
-#undef __TBB_TryLockByte
-#undef __TBB_LockByte
+#define __TBB_USE_GENERIC_DWORD_FETCH_ADD           1
+#define __TBB_USE_GENERIC_DWORD_FETCH_STORE         1
+#define __TBB_USE_FETCHSTORE_AS_FULL_FENCED_STORE   1
+#define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE    1
+#define __TBB_USE_GENERIC_RELAXED_LOAD_STORE        1
 
 // API to retrieve/update FPU control setting
 #define __TBB_CPU_CTL_ENV_PRESENT 1
@@ -247,4 +234,3 @@ inline void __TBB_set_cpu_ctl_env ( const __TBB_cpu_ctl_env_t* ctl ) {
             : : "m"(ctl->mxcsr), "m"(ctl->x87cw)
     );
 }
-