1 /* Combined Purdue/PurduePlus patches, level 2.1, 1/24/89 */
2 /***********************************************************
3 Copyright 1987 by Digital Equipment Corporation, Maynard, Massachusetts.
7 Permission to use, copy, modify, and distribute this software and its
8 documentation for any purpose and without fee is hereby granted,
9 provided that the above copyright notice appear in all copies and that
10 both that copyright notice and this permission notice appear in
11 supporting documentation, and that the name of Digital not be
12 used in advertising or publicity pertaining to distribution of the
13 software without specific, written prior permission.
15 DIGITAL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING
16 ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL
17 DIGITAL BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR
18 ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
19 WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
20 ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
23 ******************************************************************/
24 /* $XConsortium: maskbits.h,v 1.33 94/04/17 20:28:13 dpw Exp $ */
25 /* $XFree86: xc/programs/Xserver/mfb/maskbits.h,v 3.3 1996/12/09 11:56:33 dawes Exp $ */
31 /* the following notes use the following conventions:
32 SCREEN LEFT SCREEN RIGHT
33 in this file and maskbits.c, left and right refer to screen coordinates,
34 NOT bit numbering in registers.
37 bits[0,n-1] = 0 bits[n,PLST] = 1
39 bits[0,n-1] = 1 bits[n,PLST] = 0
41 startpartial[], endpartial[]
42 these are used as accelerators for doing putbits and masking out
43 bits that are all contained between longword boudaries. the extra
44 256 bytes of data seems a small price to pay -- code is smaller,
45 and narrow things (e.g. window borders) go faster.
47 the names may seem misleading; they are derived not from which end
48 of the word the bits are turned on, but at which end of a scanline
49 the table tends to be used.
51 look at the tables and macros to understand boundary conditions.
52 (careful readers will note that starttab[n] = ~endtab[n] for n != 0)
54 -----------------------------------------------------------------------
55 these two macros depend on the screen's bit ordering.
56 in both of them x is a screen position. they are used to
57 combine bits collected from multiple longwords into a
58 single destination longword, and to unpack a single
59 source longword into multiple destinations.
62 takes dst[x, PPW] and moves them to dst[0, PPW-x]
63 the contents of the rest of dst are 0.
64 this is a right shift on LSBFirst (forward-thinking)
65 machines like the VAX, and left shift on MSBFirst
66 (backwards) machines like the 680x0 and pc/rt.
69 takes dst[0,x] and moves them to dst[PPW-x, PPW]
70 the contents of the rest of dst are 0.
71 this is a left shift on LSBFirst, right shift
75 the remaining macros are cpu-independent; all bit order dependencies
76 are built into the tables and the two macros above.
78 maskbits(x, w, startmask, endmask, nlw)
79 for a span of width w starting at position x, returns
80 a mask for ragged bits at start, mask for ragged bits at end,
81 and the number of whole longwords between the ends.
83 maskpartialbits(x, w, mask)
84 works like maskbits(), except all the bits are in the
85 same longword (i.e. (x&PIM + w) <= PPW)
87 maskPPWbits(x, w, startmask, endmask, nlw)
88 as maskbits, but does not calculate nlw. it is used by
89 mfbGlyphBlt to put down glyphs <= PPW bits wide.
91 -------------------------------------------------------------------
94 any pointers passed to the following 4 macros are
95 guranteed to be PPW-bit aligned.
96 The only non-PPW-bit-aligned references ever made are
97 to font glyphs, and those are made with getleftbits()
98 and getshiftedleftbits (qq.v.)
100 For 64-bit server, it is assumed that we will never have font padding
101 of more than 4 bytes. The code uses int's to access the fonts
104 getbits(psrc, x, w, dst)
105 starting at position x in psrc (x < PPW), collect w
106 bits and put them in the screen left portion of dst.
107 psrc is a longword pointer. this may span longword boundaries.
108 it special-cases fetching all w bits from one longword.
110 +--------+--------+ +--------+
111 | | m |n| | ==> | m |n| |
112 +--------+--------+ +--------+
119 get m bits, move to screen-left of dst, zeroing rest of dst;
120 get n bits from next word, move screen-right by m, zeroing
121 lower m bits of word.
122 OR the two things together.
124 putbits(src, x, w, pdst)
125 starting at position x in pdst, put down the screen-leftmost
126 w bits of src. pdst is a longword pointer. this may
127 span longword boundaries.
128 it special-cases putting all w bits into the same longword.
130 +--------+ +--------+--------+
131 | m |n| | ==> | | m |n| |
132 +--------+ +--------+--------+
139 get m bits, shift screen-right by x, zero screen-leftmost x
140 bits; zero rightmost m bits of *pdst and OR in stuff
141 from before the semicolon.
142 shift src screen-left by m, zero bits n-PPW;
143 zero leftmost n bits of *(pdst+1) and OR in the
144 stuff from before the semicolon.
146 putbitsrop(src, x, w, pdst, ROP)
147 like putbits but calls DoRop with the rasterop ROP (see mfb.h for
150 putbitsrrop(src, x, w, pdst, ROP)
151 like putbits but calls DoRRop with the reduced rasterop ROP
152 (see mfb.h for DoRRop)
154 -----------------------------------------------------------------------
155 The two macros below are used only for getting bits from glyphs
156 in fonts, and glyphs in fonts are gotten only with the following two
158 You should tune these macros toyour font format and cpu
162 getleftbits(psrc, w, dst)
163 get the leftmost w (w<=32) bits from *psrc and put them
164 in dst. this is used by the mfbGlyphBlt code for glyphs
166 psrc is declared (unsigned char *)
168 psrc is NOT guaranteed to be PPW-bit aligned. on many
169 machines this will cause problems, so there are several
170 versions of this macro.
172 this macro is called ONLY for getting bits from font glyphs,
173 and depends on the server-natural font padding.
175 for blazing text performance, you want this macro
176 to touch memory as infrequently as possible (e.g.
177 fetch longwords) and as efficiently as possible
178 (e.g. don't fetch misaligned longwords)
180 getshiftedleftbits(psrc, offset, w, dst)
181 used by the font code; like getleftbits, but shifts the
182 bits SCRLEFT by offset.
183 this is implemented portably, calling getleftbits()
185 psrc is declared (unsigned char *).
188 /* to match CFB and allow algorithm sharing ...
189 * name mfb32 mfb64 explanation
190 * ---- ------ ----- -----------
191 * PGSZ 32 64 pixel group size (in bits; same as PPW for mfb)
192 * PGSZB 4 8 pixel group size (in bytes)
193 * PPW 32 64 pixels per word (pixels per pixel group)
194 * PLST 31 63 index of last pixel in a word (should be PPW-1)
195 * PIM 0x1f 0x3f pixel index mask (index within a pixel group)
196 * PWSH 5 6 pixel-to-word shift (should be log2(PPW))
198 * The MFB_ versions are here so that cfb can include maskbits.h to get
199 * the bitmap constants without conflicting with its own P* constants.
202 /* warning: PixelType definition duplicated in mfb.h */
204 #define PixelType unsigned long
205 #endif /* PixelType */
212 #define MFB_PPW (MFB_PGSZB<<3) /* assuming 8 bits per byte */
213 #define MFB_PGSZ MFB_PPW
214 #define MFB_PLST (MFB_PPW-1)
215 #define MFB_PIM MFB_PLST
217 /* set PWSH = log2(PPW) using brute force */
224 #endif /* MFB_PPW == 64 */
225 #endif /* MFB_PPW == 32 */
227 extern PixelType starttab[];
228 extern PixelType endtab[];
229 extern PixelType partmasks[MFB_PPW][MFB_PPW];
230 extern PixelType rmask[];
231 extern PixelType mask[];
233 #ifndef MFB_CONSTS_ONLY
235 #define PGSZB MFB_PGSZB
237 #define PGSZ MFB_PGSZ
238 #define PLST MFB_PLST
240 #define PWSH MFB_PWSH
242 #define BitLeft(b,s) SCRLEFT(b,s)
243 #define BitRight(b,s) SCRRIGHT(b,s)
245 #if (BITMAP_BIT_ORDER == IMAGE_BYTE_ORDER)
246 #define LONG2CHARS(x) ((unsigned long)(x))
249 * the unsigned case below is for compilers like
250 * the Danbury C and i386cc
253 #define LONG2CHARS( x ) ( ( ( ( x ) & (unsigned long)0x000000FF ) << 0x18 ) \
254 | ( ( ( x ) & (unsigned long)0x0000FF00 ) << 0x08 ) \
255 | ( ( ( x ) & (unsigned long)0x00FF0000 ) >> 0x08 ) \
256 | ( ( ( x ) & (unsigned long)0xFF000000 ) >> 0x18 ) )
257 #else /* PPW == 64 */
258 #if defined( __alpha__)
259 #define LONG2CHARS( x ) \
260 ( ( ( ( x ) & 0x000000FFUL) << 0x38 ) \
261 | ( ( ( x ) & 0x0000FF00UL) << 0x28 ) \
262 | ( ( ( x ) & 0x00FF0000UL) << 0x18 ) \
263 | ( ( ( x ) & 0xFF000000UL) << 0x08 ) \
264 | ( ( ( x ) & 0x000000FF00000000UL) >> 0x08 ) \
265 | ( ( ( x ) & 0x0000FF0000000000UL) >> 0x18 ) \
266 | ( ( ( x ) & 0x00FF000000000000UL) >> 0x28 ) \
267 | ( ( ( x ) & 0xFF00000000000000UL) >> 0x38 ) )
268 #else /* __alpha__ */
269 #define LONG2CHARS( x ) ( ( ( ( x ) & 0x000000FF000000FFUL) << 0x18 ) \
270 | ( ( ( x ) & 0x0000FF000000FF00UL) << 0x08 ) \
271 | ( ( ( x ) & 0x00FF000000FF0000UL) >> 0x08 ) \
272 | ( ( ( x ) & 0xFF000000FF000000UL) >> 0x18 ) )
273 #endif /* __alpha__ */
275 #endif /* BITMAP_BIT_ORDER */
277 #ifdef STRICT_ANSI_SHIFT
278 #define SHL(x,y) ((y) >= PPW ? 0 : LONG2CHARS(LONG2CHARS(x) << (y)))
279 #define SHR(x,y) ((y) >= PPW ? 0 : LONG2CHARS(LONG2CHARS(x) >> (y)))
281 #define SHL(x,y) LONG2CHARS(LONG2CHARS(x) << (y))
282 #define SHR(x,y) LONG2CHARS(LONG2CHARS(x) >> (y))
285 #if (BITMAP_BIT_ORDER == MSBFirst) /* pc/rt, 680x0 */
286 #define SCRLEFT(lw, n) SHL((PixelType)(lw),(n))
287 #define SCRRIGHT(lw, n) SHR((PixelType)(lw),(n))
288 #else /* vax, intel */
289 #define SCRLEFT(lw, n) SHR((PixelType)(lw),(n))
290 #define SCRRIGHT(lw, n) SHL((PixelType)(lw),(n))
293 #define DoRRop(alu, src, dst) \
294 (((alu) == RROP_BLACK) ? ((dst) & ~(src)) : \
295 ((alu) == RROP_WHITE) ? ((dst) | (src)) : \
296 ((alu) == RROP_INVERT) ? ((dst) ^ (src)) : \
300 /* A generalized form of a x4 Duff's Device */
301 #define Duff(counter, block) { \
302 while (counter >= 4) {\
309 switch (counter & 3) { \
317 #else /* PPW == 64 */
318 /* A generalized form of a x8 Duff's Device */
319 #define Duff(counter, block) { \
320 while (counter >= 8) {\
331 switch (counter & 7) { \
346 #define maskbits(x, w, startmask, endmask, nlw) \
347 startmask = starttab[(x) & PIM]; \
348 endmask = endtab[((x)+(w)) & PIM]; \
350 nlw = (((w) - (PPW - ((x) & PIM))) >> PWSH); \
354 #define maskpartialbits(x, w, mask) \
355 mask = partmasks[(x) & PIM][(w) & PIM];
357 #define maskPPWbits(x, w, startmask, endmask) \
358 startmask = starttab[(x) & PIM]; \
359 endmask = endtab[((x)+(w)) & PIM];
361 #ifdef __GNUC__ /* XXX don't want for Alpha? */
363 #define FASTGETBITS(psrc,x,w,dst) \
364 __asm ("extzv %1,%2,%3,%0" \
366 : "g" (x), "g" (w), "m" (*(char *)(psrc)))
367 #define getbits(psrc,x,w,dst) FASTGETBITS(psrc,x,w,dst)
369 #define FASTPUTBITS(src, x, w, pdst) \
370 __asm ("insv %3,%1,%2,%0" \
371 : "=m" (*(char *)(pdst)) \
372 : "g" (x), "g" (w), "g" (src))
373 #define putbits(src, x, w, pdst) FASTPUTBITS(src, x, w, pdst)
376 #define FASTGETBITS(psrc, x, w, dst) \
377 __asm ("bfextu %3{%1:%2},%0" \
378 : "=d" (dst) : "di" (x), "di" (w), "o" (*(char *)(psrc)))
380 #define getbits(psrc,x,w,dst) \
382 FASTGETBITS(psrc, x, w, dst);\
383 dst = SHL(dst,(32-(w))); \
386 #define FASTPUTBITS(src, x, w, pdst) \
387 __asm ("bfins %3,%0{%1:%2}" \
388 : "=o" (*(char *)(pdst)) \
389 : "di" (x), "di" (w), "d" (src), "0" (*(char *) (pdst)))
391 #define putbits(src, x, w, pdst) FASTPUTBITS(SHR((src),32-(w)), x, w, pdst)
394 #endif /* __GNUC__ */
396 /* The following flag is used to override a bugfix for sun 3/60+CG4 machines,
399 /* We don't need to be careful about this unless we're dealing with sun3's
400 * We will default its usage for those who do not know anything, but will
401 * override its effect if the machine doesn't look like a sun3
403 #if !defined(mc68020) || !defined(sun)
407 /* This is gross. We want to #define u_putbits as something which can be used
408 * in the case of the 3/60+CG4, but if we use /bin/cc or are on another
409 * machine type, we want nothing to do with u_putbits. What a hastle. Here
410 * I used slo_putbits as something which either u_putbits or putbits could be
413 * putbits gets it iff it is not already defined with FASTPUTBITS above.
414 * u_putbits gets it if we have FASTPUTBITS (putbits) from above and have not
415 * overridden the NO_3_60_CG4 flag.
418 #define slo_putbits(src, x, w, pdst) \
420 register int n = (x)+(w)-PPW; \
424 register PixelType tmpmask; \
425 maskpartialbits((x), (w), tmpmask); \
426 *(pdst) = (*(pdst) & ~tmpmask) | \
427 (SCRRIGHT(src, x) & tmpmask); \
431 *(pdst) = (*(pdst) & endtab[x]) | (SCRRIGHT((src), x)); \
432 (pdst)[1] = ((pdst)[1] & starttab[n]) | \
433 (SCRLEFT(src, PPW-(x)) & endtab[n]); \
437 #if defined(putbits) && !defined(NO_3_60_CG4)
438 #define u_putbits(src, x, w, pdst) slo_putbits(src, x, w, pdst)
440 #define u_putbits(src, x, w, pdst) putbits(src, x, w, pdst)
443 #if !defined(putbits)
444 #define putbits(src, x, w, pdst) slo_putbits(src, x, w, pdst)
447 /* Now if we have not gotten any really good bitfield macros, try some
448 * moderately fast macros. Alas, I don't know how to do asm instructions
453 #define getbits(psrc, x, w, dst) \
455 dst = SCRLEFT(*(psrc), (x)); \
456 if ( ((x) + (w)) > PPW) \
457 dst |= (SCRRIGHT(*((psrc)+1), PPW-(x))); \
461 /* We have to special-case putbitsrop because of 3/60+CG4 combos
464 #define u_putbitsrop(src, x, w, pdst, rop) \
466 register PixelType t1, t2; \
467 register int n = (x)+(w)-PPW; \
469 t1 = SCRRIGHT((src), (x)); \
470 DoRop(t2, rop, t1, *(pdst)); \
474 register PixelType tmpmask; \
476 maskpartialbits((x), (w), tmpmask); \
477 *(pdst) = (*(pdst) & ~tmpmask) | (t2 & tmpmask); \
482 *(pdst) = (*(pdst) & endtab[x]) | (t2 & starttab[x]); \
483 t1 = SCRLEFT((src), m); \
484 DoRop(t2, rop, t1, (pdst)[1]); \
485 (pdst)[1] = ((pdst)[1] & starttab[n]) | (t2 & endtab[n]); \
489 /* If our getbits and putbits are FAST enough,
490 * do this brute force, it's faster
493 #if defined(FASTPUTBITS) && defined(FASTGETBITS) && defined(NO_3_60_CG4)
494 #if (BITMAP_BIT_ORDER == MSBFirst)
495 #define putbitsrop(src, x, w, pdst, rop) \
497 register PixelType _tmp, _tmp2; \
498 FASTGETBITS(pdst, x, w, _tmp); \
499 _tmp2 = SCRRIGHT(src, PPW-(w)); \
500 DoRop(_tmp, rop, _tmp2, _tmp) \
501 FASTPUTBITS(_tmp, x, w, pdst); \
503 #define putbitsrrop(src, x, w, pdst, rop) \
505 register PixelType _tmp, _tmp2; \
507 FASTGETBITS(pdst, x, w, _tmp); \
508 _tmp2 = SCRRIGHT(src, PPW-(w)); \
509 _tmp= DoRRop(rop, _tmp2, _tmp); \
510 FASTPUTBITS(_tmp, x, w, pdst); \
514 #define putbitsrop(src, x, w, pdst, rop) \
516 register PixelType _tmp; \
517 FASTGETBITS(pdst, x, w, _tmp); \
518 DoRop(_tmp, rop, src, _tmp) \
519 FASTPUTBITS(_tmp, x, w, pdst); \
521 #define putbitsrrop(src, x, w, pdst, rop) \
523 register PixelType _tmp; \
525 FASTGETBITS(pdst, x, w, _tmp); \
526 _tmp= DoRRop(rop, src, _tmp); \
527 FASTPUTBITS(_tmp, x, w, pdst); \
534 #define putbitsrop(src, x, w, pdst, rop) u_putbitsrop(src, x, w, pdst, rop)
538 #define putbitsrrop(src, x, w, pdst, rop) \
540 register PixelType t1, t2; \
541 register int n = (x)+(w)-PPW; \
543 t1 = SCRRIGHT((src), (x)); \
544 t2 = DoRRop(rop, t1, *(pdst)); \
548 register PixelType tmpmask; \
550 maskpartialbits((x), (w), tmpmask); \
551 *(pdst) = (*(pdst) & ~tmpmask) | (t2 & tmpmask); \
556 *(pdst) = (*(pdst) & endtab[x]) | (t2 & starttab[x]); \
557 t1 = SCRLEFT((src), m); \
558 t2 = DoRRop(rop, t1, (pdst)[1]); \
559 (pdst)[1] = ((pdst)[1] & starttab[n]) | (t2 & endtab[n]); \
564 #if GETLEFTBITS_ALIGNMENT == 1
565 #define getleftbits(psrc, w, dst) dst = *((CARD32 *) psrc)
566 #endif /* GETLEFTBITS_ALIGNMENT == 1 */
568 #if GETLEFTBITS_ALIGNMENT == 2
569 #define getleftbits(psrc, w, dst) \
571 if ( ((int)(psrc)) & 0x01 ) \
572 getbits( ((CARD32 *)(((char *)(psrc))-1)), 8, (w), (dst) ); \
574 getbits(psrc, 0, w, dst); \
576 #endif /* GETLEFTBITS_ALIGNMENT == 2 */
578 #if GETLEFTBITS_ALIGNMENT == 4
579 #define getleftbits(psrc, w, dst) \
582 off_b = (off = ( ((int)(psrc)) & 0x03)) << 3; \
584 (CARD32 *)( ((char *)(psrc)) - off), \
585 (off_b), (w), (dst) \
588 #endif /* GETLEFTBITS_ALIGNMENT == 4 */
591 #define getshiftedleftbits(psrc, offset, w, dst) \
592 getleftbits((psrc), (w), (dst)); \
593 dst = SCRLEFT((dst), (offset));
595 /* FASTGETBITS and FASTPUTBITS are not necessarily correct implementations of
596 * getbits and putbits, but they work if used together.
598 * On a MSBFirst machine, a cpu bitfield extract instruction (like bfextu)
599 * could normally assign its result to a long word register in the screen
600 * right position. This saves canceling register shifts by not fighting the
601 * natural cpu byte order.
603 * Unfortunately, these fail on a 3/60+CG4 and cannot be used unmodified. Sigh.
605 #if defined(FASTGETBITS) && defined(FASTPUTBITS)
607 #define u_FASTPUT(aa, bb, cc, dd) FASTPUTBITS(aa, bb, cc, dd)
609 #define u_FASTPUT(aa, bb, cc, dd) u_putbits(SCRLEFT(aa, PPW-(cc)), bb, cc, dd)
612 #define getandputbits(psrc, srcbit, dstbit, width, pdst) \
614 register PixelType _tmpbits; \
615 FASTGETBITS(psrc, srcbit, width, _tmpbits); \
616 u_FASTPUT(_tmpbits, dstbit, width, pdst); \
619 #define getandputrop(psrc, srcbit, dstbit, width, pdst, rop) \
621 register PixelType _tmpsrc, _tmpdst; \
622 FASTGETBITS(pdst, dstbit, width, _tmpdst); \
623 FASTGETBITS(psrc, srcbit, width, _tmpsrc); \
624 DoRop(_tmpdst, rop, _tmpsrc, _tmpdst); \
625 u_FASTPUT(_tmpdst, dstbit, width, pdst); \
628 #define getandputrrop(psrc, srcbit, dstbit, width, pdst, rop) \
630 register PixelType _tmpsrc, _tmpdst; \
631 FASTGETBITS(pdst, dstbit, width, _tmpdst); \
632 FASTGETBITS(psrc, srcbit, width, _tmpsrc); \
633 _tmpdst = DoRRop(rop, _tmpsrc, _tmpdst); \
634 u_FASTPUT(_tmpdst, dstbit, width, pdst); \
637 #define getandputbits0(psrc, srcbit, width, pdst) \
638 getandputbits(psrc, srcbit, 0, width, pdst)
640 #define getandputrop0(psrc, srcbit, width, pdst, rop) \
641 getandputrop(psrc, srcbit, 0, width, pdst, rop)
643 #define getandputrrop0(psrc, srcbit, width, pdst, rop) \
644 getandputrrop(psrc, srcbit, 0, width, pdst, rop)
647 #else /* Slow poke */
649 /* pairs of getbits/putbits happen frequently. Some of the code can
650 * be shared or avoided in a few specific instances. It gets us a
651 * small advantage, so we do it. The getandput...0 macros are the only ones
652 * which speed things here. The others are here for compatibility w/the above
656 #define getandputbits(psrc, srcbit, dstbit, width, pdst) \
658 register PixelType _tmpbits; \
659 getbits(psrc, srcbit, width, _tmpbits); \
660 putbits(_tmpbits, dstbit, width, pdst); \
663 #define getandputrop(psrc, srcbit, dstbit, width, pdst, rop) \
665 register PixelType _tmpbits; \
666 getbits(psrc, srcbit, width, _tmpbits) \
667 putbitsrop(_tmpbits, dstbit, width, pdst, rop) \
670 #define getandputrrop(psrc, srcbit, dstbit, width, pdst, rop) \
672 register PixelType _tmpbits; \
673 getbits(psrc, srcbit, width, _tmpbits) \
674 putbitsrrop(_tmpbits, dstbit, width, pdst, rop) \
678 #define getandputbits0(psrc, sbindex, width, pdst) \
679 { /* unroll the whole damn thing to see how it * behaves */ \
680 register int _flag = PPW - (sbindex); \
681 register PixelType _src; \
683 _src = SCRLEFT (*(psrc), (sbindex)); \
684 if ((width) > _flag) \
685 _src |= SCRRIGHT (*((psrc) + 1), _flag); \
687 *(pdst) = (*(pdst) & starttab[(width)]) | (_src & endtab[(width)]); \
691 #define getandputrop0(psrc, sbindex, width, pdst, rop) \
693 register int _flag = PPW - (sbindex); \
694 register PixelType _src; \
696 _src = SCRLEFT (*(psrc), (sbindex)); \
697 if ((width) > _flag) \
698 _src |= SCRRIGHT (*((psrc) + 1), _flag); \
699 DoRop(_src, rop, _src, *(pdst)); \
701 *(pdst) = (*(pdst) & starttab[(width)]) | (_src & endtab[(width)]); \
704 #define getandputrrop0(psrc, sbindex, width, pdst, rop) \
706 int _flag = PPW - (sbindex); \
707 register PixelType _src; \
709 _src = SCRLEFT (*(psrc), (sbindex)); \
710 if ((width) > _flag) \
711 _src |= SCRRIGHT (*((psrc) + 1), _flag); \
712 _src = DoRRop(rop, _src, *(pdst)); \
714 *(pdst) = (*(pdst) & starttab[(width)]) | (_src & endtab[(width)]); \
717 #endif /* FASTGETBITS && FASTPUTBITS */
719 #endif /* MFB_CONSTS_ONLY */