1 /*****************************************************************************
2 * cpu-a.S: h264 encoder library
3 *****************************************************************************
4 * Copyright (C) 2009 x264 project
6 * Authors: David Conrad <lessen42@gmail.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111, USA.
21 *****************************************************************************/
28 // done in gas because .fpu neon overrides the refusal to assemble
29 // instructions the selected -march/-mcpu doesn't support
30 function x264_cpu_neon_test
35 // return: 0 on success
36 // 1 if counters were already enabled
37 // 9 if lo-res counters were already enabled
38 function x264_cpu_enable_armv7_counter
39 mrc p15, 0, r2, c9, c12, 0 // read PMNC
43 orr r2, r2, #1 // enable counters
44 bic r2, r2, #8 // full resolution
45 mcreq p15, 0, r2, c9, c12, 0 // write PMNC
46 mov r2, #1 << 31 // enable cycle counter
47 mcr p15, 0, r2, c9, c12, 1 // write CNTENS
51 function x264_cpu_disable_armv7_counter
52 mrc p15, 0, r0, c9, c12, 0 // read PMNC
53 bic r0, r0, #1 // disable counters
54 mcr p15, 0, r0, c9, c12, 0 // write PMNC
60 mrc p15, 0, \r, c9, c13, 0
63 // return: 0 if transfers neon -> arm transfers take more than 10 cycles
65 function x264_cpu_fast_neon_mrc_test
66 // check for user access to performance counters
67 mrc p15, 0, r0, c9, c14, 0
72 bl x264_cpu_enable_armv7_counter
93 cmpgt r2, #30 << 3 // assume context switch if it took over 30 cycles
98 // disable counters if we enabled them
100 bleq x264_cpu_disable_armv7_counter