1 /*****************************************************************************
3 *****************************************************************************
4 * Copyright (C) 2003-2011 x264 project
6 * Authors: Loren Merritt <lorenm@u.washington.edu>
7 * Laurent Aimar <fenrir@via.ecp.fr>
8 * Fiona Glaser <fiona@x264.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111, USA.
24 * This program is also available under a commercial proprietary license.
25 * For more information, contact us at licensing@x264.com.
26 *****************************************************************************/
28 #define _GNU_SOURCE // for sched_getaffinity
32 #if HAVE_PTHREAD && SYS_LINUX
36 #include <kernel/OS.h>
38 #if SYS_MACOSX || SYS_FREEBSD
39 #include <sys/types.h>
40 #include <sys/sysctl.h>
43 #include <sys/param.h>
44 #include <sys/sysctl.h>
45 #include <machine/cpu.h>
48 const x264_cpu_name_t x264_cpu_names[] = {
49 {"Altivec", X264_CPU_ALTIVEC},
50 // {"MMX", X264_CPU_MMX}, // we don't support asm on mmx1 cpus anymore
51 {"MMX2", X264_CPU_MMX|X264_CPU_MMXEXT},
52 {"MMXEXT", X264_CPU_MMX|X264_CPU_MMXEXT},
53 // {"SSE", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE}, // there are no sse1 functions in x264
54 {"SSE2Slow",X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE2_IS_SLOW},
55 {"SSE2", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2},
56 {"SSE2Fast",X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE2_IS_FAST},
57 {"SSE3", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3},
58 {"SSSE3", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3|X264_CPU_SSSE3},
59 {"FastShuffle", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SHUFFLE_IS_FAST},
60 {"SSE4.1", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3|X264_CPU_SSSE3|X264_CPU_SSE4},
61 {"SSE4.2", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3|X264_CPU_SSSE3|X264_CPU_SSE4|X264_CPU_SSE42},
62 {"Cache32", X264_CPU_CACHELINE_32},
63 {"Cache64", X264_CPU_CACHELINE_64},
64 {"SSEMisalign", X264_CPU_SSE_MISALIGN},
65 {"LZCNT", X264_CPU_LZCNT},
66 {"Slow_mod4_stack", X264_CPU_STACK_MOD4},
67 {"ARMv6", X264_CPU_ARMV6},
68 {"NEON", X264_CPU_NEON},
69 {"Fast_NEON_MRC", X264_CPU_FAST_NEON_MRC},
70 {"SlowCTZ", X264_CPU_SLOW_CTZ},
71 {"SlowAtom", X264_CPU_SLOW_ATOM},
75 #if (ARCH_PPC && SYS_LINUX) || (ARCH_ARM && !HAVE_NEON)
78 static sigjmp_buf jmpbuf;
79 static volatile sig_atomic_t canjump = 0;
81 static void sigill_handler( int sig )
85 signal( sig, SIG_DFL );
90 siglongjmp( jmpbuf, 1 );
95 int x264_cpu_cpuid_test( void );
96 uint32_t x264_cpu_cpuid( uint32_t op, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx );
98 uint32_t x264_cpu_detect( void )
101 uint32_t eax, ebx, ecx, edx;
102 uint32_t vendor[4] = {0};
103 int max_extended_cap;
107 if( !x264_cpu_cpuid_test() )
111 x264_cpu_cpuid( 0, &eax, vendor+0, vendor+2, vendor+1 );
115 x264_cpu_cpuid( 1, &eax, &ebx, &ecx, &edx );
121 cpu |= X264_CPU_MMXEXT|X264_CPU_SSE;
123 cpu |= X264_CPU_SSE2;
125 cpu |= X264_CPU_SSE3;
127 cpu |= X264_CPU_SSSE3;
129 cpu |= X264_CPU_SSE4;
131 cpu |= X264_CPU_SSE42;
133 if( cpu & X264_CPU_SSSE3 )
134 cpu |= X264_CPU_SSE2_IS_FAST;
135 if( cpu & X264_CPU_SSE4 )
136 cpu |= X264_CPU_SHUFFLE_IS_FAST;
138 x264_cpu_cpuid( 0x80000000, &eax, &ebx, &ecx, &edx );
139 max_extended_cap = eax;
141 if( !strcmp((char*)vendor, "AuthenticAMD") && max_extended_cap >= 0x80000001 )
143 cpu |= X264_CPU_SLOW_CTZ;
144 x264_cpu_cpuid( 0x80000001, &eax, &ebx, &ecx, &edx );
146 cpu |= X264_CPU_MMXEXT;
147 if( cpu & X264_CPU_SSE2 )
149 if( ecx&0x00000040 ) /* SSE4a */
151 cpu |= X264_CPU_SSE2_IS_FAST;
152 cpu |= X264_CPU_LZCNT;
153 cpu |= X264_CPU_SHUFFLE_IS_FAST;
154 cpu &= ~X264_CPU_SLOW_CTZ;
157 cpu |= X264_CPU_SSE2_IS_SLOW;
159 if( ecx&0x00000080 ) /* Misalign SSE */
161 cpu |= X264_CPU_SSE_MISALIGN;
162 x264_cpu_mask_misalign_sse();
167 if( !strcmp((char*)vendor, "GenuineIntel") )
169 x264_cpu_cpuid( 1, &eax, &ebx, &ecx, &edx );
170 int family = ((eax>>8)&0xf) + ((eax>>20)&0xff);
171 int model = ((eax>>4)&0xf) + ((eax>>12)&0xf0);
172 /* 6/9 (pentium-m "banias"), 6/13 (pentium-m "dothan"), and 6/14 (core1 "yonah")
173 * theoretically support sse2, but it's significantly slower than mmx for
174 * almost all of x264's functions, so let's just pretend they don't. */
175 if( family == 6 && (model == 9 || model == 13 || model == 14) )
177 cpu &= ~(X264_CPU_SSE2|X264_CPU_SSE3);
178 assert(!(cpu&(X264_CPU_SSSE3|X264_CPU_SSE4)));
180 /* Detect Atom CPU */
181 if( family == 6 && model == 28 )
183 cpu |= X264_CPU_SLOW_ATOM;
184 cpu |= X264_CPU_SLOW_CTZ;
188 if( (!strcmp((char*)vendor, "GenuineIntel") || !strcmp((char*)vendor, "CyrixInstead")) && !(cpu&X264_CPU_SSE42))
190 /* cacheline size is specified in 3 places, any of which may be missing */
191 x264_cpu_cpuid( 1, &eax, &ebx, &ecx, &edx );
192 cache = (ebx&0xff00)>>5; // cflush size
193 if( !cache && max_extended_cap >= 0x80000006 )
195 x264_cpu_cpuid( 0x80000006, &eax, &ebx, &ecx, &edx );
196 cache = ecx&0xff; // cacheline size
200 // Cache and TLB Information
201 static const char cache32_ids[] = { 0x0a, 0x0c, 0x41, 0x42, 0x43, 0x44, 0x45, 0x82, 0x83, 0x84, 0x85, 0 };
202 static const char cache64_ids[] = { 0x22, 0x23, 0x25, 0x29, 0x2c, 0x46, 0x47, 0x49, 0x60, 0x66, 0x67,
203 0x68, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7c, 0x7f, 0x86, 0x87, 0 };
207 x264_cpu_cpuid( 2, buf+0, buf+1, buf+2, buf+3 );
210 for( int j = 0; j < 4; j++ )
214 if( strchr( cache32_ids, buf[j]&0xff ) )
216 if( strchr( cache64_ids, buf[j]&0xff ) )
220 } while( ++i < max );
224 cpu |= X264_CPU_CACHELINE_32;
225 else if( cache == 64 )
226 cpu |= X264_CPU_CACHELINE_64;
228 x264_log( NULL, X264_LOG_WARNING, "unable to determine cacheline size\n" );
231 #if BROKEN_STACK_ALIGNMENT
232 cpu |= X264_CPU_STACK_MOD4;
240 #if SYS_MACOSX || SYS_OPENBSD
241 #include <sys/sysctl.h>
242 uint32_t x264_cpu_detect( void )
247 int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
249 int selectors[2] = { CTL_HW, HW_VECTORUNIT };
252 size_t length = sizeof( has_altivec );
253 int error = sysctl( selectors, 2, &has_altivec, &length, NULL, 0 );
255 if( error == 0 && has_altivec != 0 )
256 cpu |= X264_CPU_ALTIVEC;
263 uint32_t x264_cpu_detect( void )
265 static void (*oldsig)( int );
267 oldsig = signal( SIGILL, sigill_handler );
268 if( sigsetjmp( jmpbuf, 1 ) )
270 signal( SIGILL, oldsig );
275 asm volatile( "mtspr 256, %0\n\t"
281 signal( SIGILL, oldsig );
283 return X264_CPU_ALTIVEC;
289 void x264_cpu_neon_test( void );
290 int x264_cpu_fast_neon_mrc_test( void );
292 uint32_t x264_cpu_detect( void )
296 flags |= X264_CPU_ARMV6;
298 // don't do this hack if compiled with -mfpu=neon
300 static void (* oldsig)( int );
301 oldsig = signal( SIGILL, sigill_handler );
302 if( sigsetjmp( jmpbuf, 1 ) )
304 signal( SIGILL, oldsig );
309 x264_cpu_neon_test();
311 signal( SIGILL, oldsig );
314 flags |= X264_CPU_NEON;
316 // fast neon -> arm (Cortex-A9) detection relies on user access to the
317 // cycle counter; this assumes ARMv7 performance counters.
318 // NEON requires at least ARMv7, ARMv8 may require changes here, but
319 // hopefully this hacky detection method will have been replaced by then.
320 // Note that there is potential for a race condition if another program or
321 // x264 instance disables or reinits the counters while x264 is using them,
322 // which may result in incorrect detection and the counters stuck enabled.
323 flags |= x264_cpu_fast_neon_mrc_test() ? X264_CPU_FAST_NEON_MRC : 0;
324 // TODO: write dual issue test? currently it's A8 (dual issue) vs. A9 (fast mrc)
331 uint32_t x264_cpu_detect( void )
338 int x264_cpu_num_processors( void )
343 #elif defined(_WIN32)
344 return x264_pthread_num_processors_np();
350 memset( &p_aff, 0, sizeof(p_aff) );
351 sched_getaffinity( 0, sizeof(p_aff), &p_aff );
352 for( np = 0, bit = 0; bit < sizeof(p_aff); bit++ )
353 np += (((uint8_t *)&p_aff)[bit / 8] >> (bit % 8)) & 1;
358 get_system_info( &info );
359 return info.cpu_count;
361 #elif SYS_MACOSX || SYS_FREEBSD || SYS_OPENBSD
363 size_t length = sizeof( ncpu );
365 int mib[2] = { CTL_HW, HW_NCPU };
366 if( sysctl(mib, 2, &ncpu, &length, NULL, 0) )
368 if( sysctlbyname("hw.ncpu", &ncpu, &length, NULL, 0) )