1 /*****************************************************************************
2 * cpu.c: h264 encoder library
3 *****************************************************************************
4 * Copyright (C) 2003-2008 x264 project
6 * Authors: Loren Merritt <lorenm@u.washington.edu>
7 * Laurent Aimar <fenrir@via.ecp.fr>
8 * Fiona Glaser <fiona@x264.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111, USA.
23 *****************************************************************************/
25 #define _GNU_SOURCE // for sched_getaffinity
29 #if defined(HAVE_PTHREAD) && defined(SYS_LINUX)
33 #include <kernel/OS.h>
35 #if defined(SYS_MACOSX) || defined(SYS_FREEBSD)
36 #include <sys/types.h>
37 #include <sys/sysctl.h>
40 #include <sys/param.h>
41 #include <sys/sysctl.h>
42 #include <machine/cpu.h>
45 const x264_cpu_name_t x264_cpu_names[] = {
46 {"Altivec", X264_CPU_ALTIVEC},
47 // {"MMX", X264_CPU_MMX}, // we don't support asm on mmx1 cpus anymore
48 {"MMX2", X264_CPU_MMX|X264_CPU_MMXEXT},
49 {"MMXEXT", X264_CPU_MMX|X264_CPU_MMXEXT},
50 // {"SSE", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE}, // there are no sse1 functions in x264
51 {"SSE2Slow",X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE2_IS_SLOW},
52 {"SSE2", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2},
53 {"SSE2Fast",X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE2_IS_FAST},
54 {"SSE3", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3},
55 {"SSSE3", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3|X264_CPU_SSSE3},
56 {"FastShuffle", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SHUFFLE_IS_FAST},
57 {"SSE4.1", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3|X264_CPU_SSSE3|X264_CPU_SSE4},
58 {"SSE4.2", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3|X264_CPU_SSSE3|X264_CPU_SSE4|X264_CPU_SSE42},
59 {"Cache32", X264_CPU_CACHELINE_32},
60 {"Cache64", X264_CPU_CACHELINE_64},
61 {"SSEMisalign", X264_CPU_SSE_MISALIGN},
62 {"LZCNT", X264_CPU_LZCNT},
63 {"Slow_mod4_stack", X264_CPU_STACK_MOD4},
64 {"ARMv6", X264_CPU_ARMV6},
65 {"NEON", X264_CPU_NEON},
66 {"Fast_NEON_MRC", X264_CPU_FAST_NEON_MRC},
70 #if (defined(ARCH_PPC) && defined(SYS_LINUX)) || (defined(ARCH_ARM) && !defined(HAVE_NEON))
73 static sigjmp_buf jmpbuf;
74 static volatile sig_atomic_t canjump = 0;
76 static void sigill_handler( int sig )
80 signal( sig, SIG_DFL );
85 siglongjmp( jmpbuf, 1 );
90 int x264_cpu_cpuid_test( void );
91 uint32_t x264_cpu_cpuid( uint32_t op, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx );
93 uint32_t x264_cpu_detect( void )
96 uint32_t eax, ebx, ecx, edx;
97 uint32_t vendor[4] = {0};
102 if( !x264_cpu_cpuid_test() )
106 x264_cpu_cpuid( 0, &eax, vendor+0, vendor+2, vendor+1 );
110 x264_cpu_cpuid( 1, &eax, &ebx, &ecx, &edx );
116 cpu |= X264_CPU_MMXEXT|X264_CPU_SSE;
118 cpu |= X264_CPU_SSE2;
120 cpu |= X264_CPU_SSE3;
122 cpu |= X264_CPU_SSSE3;
124 cpu |= X264_CPU_SSE4;
126 cpu |= X264_CPU_SSE42;
128 if( cpu & X264_CPU_SSSE3 )
129 cpu |= X264_CPU_SSE2_IS_FAST;
130 if( cpu & X264_CPU_SSE4 )
131 cpu |= X264_CPU_SHUFFLE_IS_FAST;
133 x264_cpu_cpuid( 0x80000000, &eax, &ebx, &ecx, &edx );
134 max_extended_cap = eax;
136 if( !strcmp((char*)vendor, "AuthenticAMD") && max_extended_cap >= 0x80000001 )
138 x264_cpu_cpuid( 0x80000001, &eax, &ebx, &ecx, &edx );
140 cpu |= X264_CPU_MMXEXT;
141 if( cpu & X264_CPU_SSE2 )
143 if( ecx&0x00000040 ) /* SSE4a */
145 cpu |= X264_CPU_SSE2_IS_FAST;
146 cpu |= X264_CPU_LZCNT;
147 cpu |= X264_CPU_SHUFFLE_IS_FAST;
150 cpu |= X264_CPU_SSE2_IS_SLOW;
152 if( ecx&0x00000080 ) /* Misalign SSE */
154 cpu |= X264_CPU_SSE_MISALIGN;
155 x264_cpu_mask_misalign_sse();
160 if( !strcmp((char*)vendor, "GenuineIntel") )
162 int family, model, stepping;
163 x264_cpu_cpuid( 1, &eax, &ebx, &ecx, &edx );
164 family = ((eax>>8)&0xf) + ((eax>>20)&0xff);
165 model = ((eax>>4)&0xf) + ((eax>>12)&0xf0);
167 /* 6/9 (pentium-m "banias"), 6/13 (pentium-m "dothan"), and 6/14 (core1 "yonah")
168 * theoretically support sse2, but it's significantly slower than mmx for
169 * almost all of x264's functions, so let's just pretend they don't. */
170 if( family == 6 && (model == 9 || model == 13 || model == 14) )
172 cpu &= ~(X264_CPU_SSE2|X264_CPU_SSE3);
173 assert(!(cpu&(X264_CPU_SSSE3|X264_CPU_SSE4)));
177 if( (!strcmp((char*)vendor, "GenuineIntel") || !strcmp((char*)vendor, "CyrixInstead")) && !(cpu&X264_CPU_SSE42))
179 /* cacheline size is specified in 3 places, any of which may be missing */
180 x264_cpu_cpuid( 1, &eax, &ebx, &ecx, &edx );
181 cache = (ebx&0xff00)>>5; // cflush size
182 if( !cache && max_extended_cap >= 0x80000006 )
184 x264_cpu_cpuid( 0x80000006, &eax, &ebx, &ecx, &edx );
185 cache = ecx&0xff; // cacheline size
189 // Cache and TLB Information
190 static const char cache32_ids[] = { 0x0a, 0x0c, 0x41, 0x42, 0x43, 0x44, 0x45, 0x82, 0x83, 0x84, 0x85, 0 };
191 static const char cache64_ids[] = { 0x22, 0x23, 0x25, 0x29, 0x2c, 0x46, 0x47, 0x49, 0x60, 0x66, 0x67,
192 0x68, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7c, 0x7f, 0x86, 0x87, 0 };
196 x264_cpu_cpuid( 2, buf+0, buf+1, buf+2, buf+3 );
199 for( int j = 0; j < 4; j++ )
203 if( strchr( cache32_ids, buf[j]&0xff ) )
205 if( strchr( cache64_ids, buf[j]&0xff ) )
209 } while( ++i < max );
213 cpu |= X264_CPU_CACHELINE_32;
214 else if( cache == 64 )
215 cpu |= X264_CPU_CACHELINE_64;
217 x264_log( NULL, X264_LOG_WARNING, "unable to determine cacheline size\n" );
220 #ifdef BROKEN_STACK_ALIGNMENT
221 cpu |= X264_CPU_STACK_MOD4;
227 #elif defined( ARCH_PPC )
229 #if defined(SYS_MACOSX) || defined(SYS_OPENBSD)
230 #include <sys/sysctl.h>
231 uint32_t x264_cpu_detect( void )
236 int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
238 int selectors[2] = { CTL_HW, HW_VECTORUNIT };
241 size_t length = sizeof( has_altivec );
242 int error = sysctl( selectors, 2, &has_altivec, &length, NULL, 0 );
244 if( error == 0 && has_altivec != 0 )
245 cpu |= X264_CPU_ALTIVEC;
250 #elif defined( SYS_LINUX )
252 uint32_t x264_cpu_detect( void )
254 static void (*oldsig)( int );
256 oldsig = signal( SIGILL, sigill_handler );
257 if( sigsetjmp( jmpbuf, 1 ) )
259 signal( SIGILL, oldsig );
264 asm volatile( "mtspr 256, %0\n\t"
270 signal( SIGILL, oldsig );
272 return X264_CPU_ALTIVEC;
276 #elif defined( ARCH_ARM )
278 void x264_cpu_neon_test();
279 int x264_cpu_fast_neon_mrc_test();
281 uint32_t x264_cpu_detect( void )
285 flags |= X264_CPU_ARMV6;
287 // don't do this hack if compiled with -mfpu=neon
289 static void (* oldsig)( int );
290 oldsig = signal( SIGILL, sigill_handler );
291 if( sigsetjmp( jmpbuf, 1 ) )
293 signal( SIGILL, oldsig );
298 x264_cpu_neon_test();
300 signal( SIGILL, oldsig );
303 flags |= X264_CPU_NEON;
305 // fast neon -> arm (Cortex-A9) detection relies on user access to the
306 // cycle counter; this assumes ARMv7 performance counters.
307 // NEON requires at least ARMv7, ARMv8 may require changes here, but
308 // hopefully this hacky detection method will have been replaced by then.
309 // Note that there is potential for a race condition if another program or
310 // x264 instance disables or reinits the counters while x264 is using them,
311 // which may result in incorrect detection and the counters stuck enabled.
312 flags |= x264_cpu_fast_neon_mrc_test() ? X264_CPU_FAST_NEON_MRC : 0;
313 // TODO: write dual issue test? currently it's A8 (dual issue) vs. A9 (fast mrc)
320 uint32_t x264_cpu_detect( void )
327 int x264_cpu_num_processors( void )
329 #if !defined(HAVE_PTHREAD)
332 #elif defined(_WIN32)
333 return pthread_num_processors_np();
335 #elif defined(SYS_LINUX)
339 memset( &p_aff, 0, sizeof(p_aff) );
340 sched_getaffinity( 0, sizeof(p_aff), &p_aff );
341 for( np = 0, bit = 0; bit < sizeof(p_aff); bit++ )
342 np += (((uint8_t *)&p_aff)[bit / 8] >> (bit % 8)) & 1;
345 #elif defined(SYS_BEOS)
347 get_system_info( &info );
348 return info.cpu_count;
350 #elif defined(SYS_MACOSX) || defined(SYS_FREEBSD) || defined(SYS_OPENBSD)
352 size_t length = sizeof( numberOfCPUs );
354 int mib[2] = { CTL_HW, HW_NCPU };
355 if( sysctl(mib, 2, &numberOfCPUs, &length, NULL, 0) )
357 if( sysctlbyname("hw.ncpu", &numberOfCPUs, &length, NULL, 0) )