1 /*****************************************************************************
2 * cpu.c: h264 encoder library
3 *****************************************************************************
4 * Copyright (C) 2003-2008 x264 project
6 * Authors: Loren Merritt <lorenm@u.washington.edu>
7 * Laurent Aimar <fenrir@via.ecp.fr>
8 * Fiona Glaser <fiona@x264.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111, USA.
23 *****************************************************************************/
25 #if defined(HAVE_PTHREAD) && defined(SYS_LINUX)
30 #include <kernel/OS.h>
32 #if defined(SYS_MACOSX) || defined(SYS_FREEBSD)
33 #include <sys/types.h>
34 #include <sys/sysctl.h>
37 #include <sys/param.h>
38 #include <sys/sysctl.h>
39 #include <machine/cpu.h>
45 const x264_cpu_name_t x264_cpu_names[] = {
46 {"Altivec", X264_CPU_ALTIVEC},
47 // {"MMX", X264_CPU_MMX}, // we don't support asm on mmx1 cpus anymore
48 {"MMX2", X264_CPU_MMX|X264_CPU_MMXEXT},
49 {"MMXEXT", X264_CPU_MMX|X264_CPU_MMXEXT},
50 // {"SSE", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE}, // there are no sse1 functions in x264
51 {"SSE2Slow",X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE2_IS_SLOW},
52 {"SSE2", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2},
53 {"SSE2Fast",X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE2_IS_FAST},
54 {"SSE3", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3},
55 {"SSSE3", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3|X264_CPU_SSSE3},
56 {"FastShuffle", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SHUFFLE_IS_FAST},
57 {"SSE4.1", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3|X264_CPU_SSSE3|X264_CPU_SSE4},
58 {"SSE4.2", X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3|X264_CPU_SSSE3|X264_CPU_SSE4|X264_CPU_SSE42},
59 {"Cache32", X264_CPU_CACHELINE_32},
60 {"Cache64", X264_CPU_CACHELINE_64},
61 {"SSEMisalign", X264_CPU_SSE_MISALIGN},
62 {"LZCNT", X264_CPU_LZCNT},
63 {"Slow_mod4_stack", X264_CPU_STACK_MOD4},
69 extern int x264_cpu_cpuid_test( void );
70 extern uint32_t x264_cpu_cpuid( uint32_t op, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx );
72 uint32_t x264_cpu_detect( void )
75 uint32_t eax, ebx, ecx, edx;
76 uint32_t vendor[4] = {0};
81 if( !x264_cpu_cpuid_test() )
85 x264_cpu_cpuid( 0, &eax, vendor+0, vendor+2, vendor+1 );
89 x264_cpu_cpuid( 1, &eax, &ebx, &ecx, &edx );
95 cpu |= X264_CPU_MMXEXT|X264_CPU_SSE;
101 cpu |= X264_CPU_SSSE3;
103 cpu |= X264_CPU_SSE4;
105 cpu |= X264_CPU_SSE42;
107 if( cpu & X264_CPU_SSSE3 )
108 cpu |= X264_CPU_SSE2_IS_FAST;
109 if( cpu & X264_CPU_SSE4 )
110 cpu |= X264_CPU_SHUFFLE_IS_FAST;
112 x264_cpu_cpuid( 0x80000000, &eax, &ebx, &ecx, &edx );
113 max_extended_cap = eax;
115 if( !strcmp((char*)vendor, "AuthenticAMD") && max_extended_cap >= 0x80000001 )
117 x264_cpu_cpuid( 0x80000001, &eax, &ebx, &ecx, &edx );
119 cpu |= X264_CPU_MMXEXT;
120 if( cpu & X264_CPU_SSE2 )
122 if( ecx&0x00000040 ) /* SSE4a */
124 cpu |= X264_CPU_SSE2_IS_FAST;
125 cpu |= X264_CPU_SSE_MISALIGN;
126 cpu |= X264_CPU_LZCNT;
127 cpu |= X264_CPU_SHUFFLE_IS_FAST;
128 x264_cpu_mask_misalign_sse();
131 cpu |= X264_CPU_SSE2_IS_SLOW;
135 if( !strcmp((char*)vendor, "GenuineIntel") )
137 int family, model, stepping;
138 x264_cpu_cpuid( 1, &eax, &ebx, &ecx, &edx );
139 family = ((eax>>8)&0xf) + ((eax>>20)&0xff);
140 model = ((eax>>4)&0xf) + ((eax>>12)&0xf0);
142 /* 6/9 (pentium-m "banias"), 6/13 (pentium-m "dothan"), and 6/14 (core1 "yonah")
143 * theoretically support sse2, but it's significantly slower than mmx for
144 * almost all of x264's functions, so let's just pretend they don't. */
145 if( family==6 && (model==9 || model==13 || model==14) )
147 cpu &= ~(X264_CPU_SSE2|X264_CPU_SSE3);
148 assert(!(cpu&(X264_CPU_SSSE3|X264_CPU_SSE4)));
152 if( (!strcmp((char*)vendor, "GenuineIntel") || !strcmp((char*)vendor, "CyrixInstead")) && !(cpu&X264_CPU_SSE42))
154 /* cacheline size is specified in 3 places, any of which may be missing */
155 x264_cpu_cpuid( 1, &eax, &ebx, &ecx, &edx );
156 cache = (ebx&0xff00)>>5; // cflush size
157 if( !cache && max_extended_cap >= 0x80000006 )
159 x264_cpu_cpuid( 0x80000006, &eax, &ebx, &ecx, &edx );
160 cache = ecx&0xff; // cacheline size
164 // Cache and TLB Information
165 static const char cache32_ids[] = { 0x0a, 0x0c, 0x41, 0x42, 0x43, 0x44, 0x45, 0x82, 0x83, 0x84, 0x85, 0 };
166 static const char cache64_ids[] = { 0x22, 0x23, 0x25, 0x29, 0x2c, 0x46, 0x47, 0x49, 0x60, 0x66, 0x67, 0x68, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7c, 0x7f, 0x86, 0x87, 0 };
170 x264_cpu_cpuid( 2, buf+0, buf+1, buf+2, buf+3 );
177 if( strchr( cache32_ids, buf[j]&0xff ) )
179 if( strchr( cache64_ids, buf[j]&0xff ) )
183 } while( ++i < max );
187 cpu |= X264_CPU_CACHELINE_32;
188 else if( cache == 64 )
189 cpu |= X264_CPU_CACHELINE_64;
191 fprintf( stderr, "x264 [warning]: unable to determine cacheline size\n" );
194 #ifdef BROKEN_STACK_ALIGNMENT
195 cpu |= X264_CPU_STACK_MOD4;
201 #elif defined( ARCH_PPC )
203 #if defined(SYS_MACOSX) || defined(SYS_OPENBSD)
204 #include <sys/sysctl.h>
205 uint32_t x264_cpu_detect( void )
210 int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
212 int selectors[2] = { CTL_HW, HW_VECTORUNIT };
215 size_t length = sizeof( has_altivec );
216 int error = sysctl( selectors, 2, &has_altivec, &length, NULL, 0 );
218 if( error == 0 && has_altivec != 0 )
220 cpu |= X264_CPU_ALTIVEC;
226 #elif defined( SYS_LINUX )
229 static sigjmp_buf jmpbuf;
230 static volatile sig_atomic_t canjump = 0;
232 static void sigill_handler( int sig )
236 signal( sig, SIG_DFL );
241 siglongjmp( jmpbuf, 1 );
244 uint32_t x264_cpu_detect( void )
246 static void (* oldsig)( int );
248 oldsig = signal( SIGILL, sigill_handler );
249 if( sigsetjmp( jmpbuf, 1 ) )
251 signal( SIGILL, oldsig );
256 asm volatile( "mtspr 256, %0\n\t"
262 signal( SIGILL, oldsig );
264 return X264_CPU_ALTIVEC;
270 uint32_t x264_cpu_detect( void )
278 void x264_emms( void )
284 int x264_cpu_num_processors( void )
286 #if !defined(HAVE_PTHREAD)
289 #elif defined(_WIN32)
290 return pthread_num_processors_np();
292 #elif defined(SYS_LINUX)
296 memset( &p_aff, 0, sizeof(p_aff) );
297 sched_getaffinity( 0, sizeof(p_aff), &p_aff );
298 for( np = 0, bit = 0; bit < sizeof(p_aff); bit++ )
299 np += (((uint8_t *)&p_aff)[bit / 8] >> (bit % 8)) & 1;
302 #elif defined(SYS_BEOS)
304 get_system_info( &info );
305 return info.cpu_count;
307 #elif defined(SYS_MACOSX) || defined(SYS_FREEBSD) || defined(SYS_OPENBSD)
309 size_t length = sizeof( numberOfCPUs );
311 int mib[2] = { CTL_HW, HW_NCPU };
312 if( sysctl(mib, 2, &numberOfCPUs, &length, NULL, 0) )
314 if( sysctlbyname("hw.ncpu", &numberOfCPUs, &length, NULL, 0) )