1 ;*****************************************************************************
2 ;* x86inc.asm: x264asm abstraction layer
3 ;*****************************************************************************
4 ;* Copyright (C) 2005-2012 x264 project
6 ;* Authors: Loren Merritt <lorenm@u.washington.edu>
7 ;* Anton Mitrofanov <BugMaster@narod.ru>
8 ;* Fiona Glaser <fiona@x264.com>
9 ;* Henrik Gramner <hengar-6@student.ltu.se>
11 ;* Permission to use, copy, modify, and/or distribute this software for any
12 ;* purpose with or without fee is hereby granted, provided that the above
13 ;* copyright notice and this permission notice appear in all copies.
15 ;* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
16 ;* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
17 ;* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
18 ;* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
19 ;* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
20 ;* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
21 ;* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 ;*****************************************************************************
24 ; This is a header file for the x264ASM assembly language, which uses
25 ; NASM/YASM syntax combined with a large number of macros to provide easy
26 ; abstraction between different calling conventions (x86_32, win64, linux64).
27 ; It also has various other useful features to simplify writing the kind of
28 ; DSP functions that are most often used in x264.
30 ; Unlike the rest of x264, this file is available under an ISC license, as it
31 ; has significant usefulness outside of x264 and we want it to be available
32 ; to the largest audience possible. Of course, if you modify it for your own
33 ; purposes to add a new feature, we strongly encourage contributing a patch
34 ; as this feature might be useful for others as well. Send patches or ideas
35 ; to x264-devel@videolan.org .
38 %define program_name x264
44 %ifidn __OUTPUT_FORMAT__,win32
46 %elifidn __OUTPUT_FORMAT__,win64
54 %define mangle(x) _ %+ x
59 ; Name of the .rodata section.
60 ; Kludge: Something on OS X fails to align .rodata even given an align attribute,
61 ; so use a different read-only section.
62 %macro SECTION_RODATA 0-1 16
63 %ifidn __OUTPUT_FORMAT__,macho64
64 SECTION .text align=%1
65 %elifidn __OUTPUT_FORMAT__,macho
66 SECTION .text align=%1
68 %elifidn __OUTPUT_FORMAT__,aout
71 SECTION .rodata align=%1
75 ; aout does not support align=
76 %macro SECTION_TEXT 0-1 16
77 %ifidn __OUTPUT_FORMAT__,aout
80 SECTION .text align=%1
86 %elif ARCH_X86_64 == 0
87 ; x86_32 doesn't require PIC.
88 ; Some distros prefer shared objects to be PIC, but nothing breaks if
89 ; the code contains a few textrels, so we'll skip that complexity.
96 ; Always use long nops (reduces 0x90 spam in disassembly on x86_32)
99 ; Macros to eliminate most code duplication between x86_32 and x86_64:
100 ; Currently this works only for leaf functions which load all their arguments
101 ; into registers at the start, and make no other use of the stack. Luckily that
102 ; covers most of x264's asm.
105 ; %1 = number of arguments. loads them from stack if needed.
106 ; %2 = number of registers used. pushes callee-saved regs if needed.
107 ; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed.
108 ; %4 = (optional) stack size to be allocated. If not aligned (x86-32 ICC 10.x,
109 ; MSVC or YMM), the stack will be manually aligned (to 16 or 32 bytes),
110 ; and an extra register will be allocated to hold the original stack
111 ; pointer (to not invalidate r0m etc.). To prevent the use of an extra
112 ; register as stack pointer, request a negative stack size.
113 ; %4+/%5+ = list of names to define to registers
114 ; PROLOGUE can also be invoked by adding the same options to cglobal
117 ; cglobal foo, 2,3,0, dst, src, tmp
118 ; declares a function (foo), taking two args (dst and src) and one local variable (tmp)
120 ; TODO Some functions can use some args directly from the stack. If they're the
121 ; last args then you can just not declare them, but if they're in the middle
122 ; we need more flexible macro.
125 ; Pops anything that was pushed by PROLOGUE, and returns.
128 ; Same, but if it doesn't pop anything it becomes a 2-byte ret, for athlons
129 ; which are slow when a normal ret follows a branch.
132 ; rN and rNq are the native-size register holding function argument N
133 ; rNd, rNw, rNb are dword, word, and byte size
134 ; rNh is the high 8 bits of the word size
135 ; rNm is the original location of arg N (a register or on the stack), dword
136 ; rNmp is native size
138 %macro DECLARE_REG 2-3
147 %elif ARCH_X86_64 ; memory
148 %define r%1m [rstk + stack_offset + %3]
149 %define r%1mp qword r %+ %1 %+ m
151 %define r%1m [rstk + stack_offset + %3]
152 %define r%1mp dword r %+ %1 %+ m
157 %macro DECLARE_REG_SIZE 3
173 DECLARE_REG_SIZE ax, al, ah
174 DECLARE_REG_SIZE bx, bl, bh
175 DECLARE_REG_SIZE cx, cl, ch
176 DECLARE_REG_SIZE dx, dl, dh
177 DECLARE_REG_SIZE si, sil, null
178 DECLARE_REG_SIZE di, dil, null
179 DECLARE_REG_SIZE bp, bpl, null
181 ; t# defines for when per-arch register allocation is more complex than just function arguments
183 %macro DECLARE_REG_TMP 1-*
186 CAT_XDEFINE t, %%i, r%1
192 %macro DECLARE_REG_TMP_SIZE 0-*
194 %define t%1q t%1 %+ q
195 %define t%1d t%1 %+ d
196 %define t%1w t%1 %+ w
197 %define t%1h t%1 %+ h
198 %define t%1b t%1 %+ b
203 DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14
214 %assign stack_offset stack_offset+gprsize
221 %assign stack_offset stack_offset-gprsize
225 %macro PUSH_IF_USED 1-*
234 %macro POP_IF_USED 1-*
243 %macro LOAD_IF_USED 1-*
246 mov r%1, r %+ %1 %+ mp
255 %assign stack_offset stack_offset+(%2)
262 %assign stack_offset stack_offset-(%2)
272 %macro movsxdifnidn 2
284 %macro DEFINE_ARGS 0-*
288 CAT_UNDEF arg_name %+ %%i, q
289 CAT_UNDEF arg_name %+ %%i, d
290 CAT_UNDEF arg_name %+ %%i, w
291 CAT_UNDEF arg_name %+ %%i, h
292 CAT_UNDEF arg_name %+ %%i, b
293 CAT_UNDEF arg_name %+ %%i, m
294 CAT_UNDEF arg_name %+ %%i, mp
295 CAT_UNDEF arg_name, %%i
300 %xdefine %%stack_offset stack_offset
301 %undef stack_offset ; so that the current value of stack_offset doesn't get baked in by xdefine
304 %xdefine %1q r %+ %%i %+ q
305 %xdefine %1d r %+ %%i %+ d
306 %xdefine %1w r %+ %%i %+ w
307 %xdefine %1h r %+ %%i %+ h
308 %xdefine %1b r %+ %%i %+ b
309 %xdefine %1m r %+ %%i %+ m
310 %xdefine %1mp r %+ %%i %+ mp
311 CAT_XDEFINE arg_name, %%i, %1
315 %xdefine stack_offset %%stack_offset
316 %assign n_arg_names %0
319 %macro ALLOC_STACK 1-2 0 ; stack_size, n_xmm_regs (for win64 only)
322 %assign %%stack_alignment ((mmsize + 15) & ~15)
323 %assign stack_size %1
325 %assign stack_size -stack_size
328 %assign xmm_regs_used %2
330 %if mmsize <= 16 && HAVE_ALIGNED_STACK
331 %assign stack_size_padded stack_size + %%stack_alignment - gprsize - (stack_offset & (%%stack_alignment - 1))
332 %if xmm_regs_used > 6
333 %assign stack_size_padded stack_size_padded + (xmm_regs_used - 6) * 16
335 SUB rsp, stack_size_padded
337 %assign %%reg_num (regs_used - 1)
338 %xdefine rstk r %+ %%reg_num
339 ; align stack, and save original stack location directly above
340 ; it, i.e. in [rsp+stack_size_padded], so we can restore the
341 ; stack in a single instruction (i.e. mov rsp, rstk or mov
342 ; rsp, [rsp+stack_size_padded])
344 %assign stack_size_padded stack_size
345 %if xmm_regs_used > 6
346 %assign stack_size_padded stack_size_padded + (xmm_regs_used - 6) * 16
347 %if mmsize == 32 && xmm_regs_used & 1
348 ; re-align to 32 bytes
349 %assign stack_size_padded (stack_size_padded + 16)
352 %if %1 < 0 ; need to store rsp on stack
353 sub rsp, gprsize+stack_size_padded
354 and rsp, ~(%%stack_alignment-1)
355 %xdefine rstkm [rsp+stack_size_padded]
357 %else ; can keep rsp in rstk during whole function
358 sub rsp, stack_size_padded
359 and rsp, ~(%%stack_alignment-1)
363 %if xmm_regs_used > 6
370 %macro SETUP_STACK_POINTER 1
372 %if %1 != 0 && (HAVE_ALIGNED_STACK == 0 || mmsize == 32)
374 %assign regs_used (regs_used + 1)
375 %elif ARCH_X86_64 && regs_used == num_args && num_args <= 4 + UNIX64 * 2
376 %warning "Stack pointer will overwrite register argument"
382 %macro DEFINE_ARGS_INTERNAL 3+
392 %if WIN64 ; Windows x64 ;=================================================
398 DECLARE_REG 4, R10, 40
399 DECLARE_REG 5, R11, 48
400 DECLARE_REG 6, rax, 56
401 DECLARE_REG 7, rdi, 64
402 DECLARE_REG 8, rsi, 72
403 DECLARE_REG 9, rbx, 80
404 DECLARE_REG 10, rbp, 88
405 DECLARE_REG 11, R12, 96
406 DECLARE_REG 12, R13, 104
407 DECLARE_REG 13, R14, 112
408 DECLARE_REG 14, R15, 120
410 %macro PROLOGUE 2-5+ 0 ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
413 ASSERT regs_used >= num_args
414 SETUP_STACK_POINTER %4
415 ASSERT regs_used <= 15
416 PUSH_IF_USED 7, 8, 9, 10, 11, 12, 13, 14
418 %if mmsize != 8 && stack_size == 0
421 LOAD_IF_USED 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
422 DEFINE_ARGS_INTERNAL %0, %4, %5
425 %macro WIN64_PUSH_XMM 0
426 %assign %%i xmm_regs_used
427 %rep (xmm_regs_used-6)
429 movdqa [rsp + (%%i-6)*16 + stack_size + (~stack_offset&8)], xmm %+ %%i
433 %macro WIN64_SPILL_XMM 1
434 %assign xmm_regs_used %1
435 ASSERT xmm_regs_used <= 16
436 %if xmm_regs_used > 6
437 SUB rsp, (xmm_regs_used-6)*16+16
442 %macro WIN64_RESTORE_XMM_INTERNAL 1
443 %if xmm_regs_used > 6
444 %assign %%i xmm_regs_used
445 %rep (xmm_regs_used-6)
447 movdqa xmm %+ %%i, [%1 + (%%i-6)*16+stack_size+(~stack_offset&8)]
449 %if stack_size_padded == 0
450 add %1, (xmm_regs_used-6)*16+16
453 %if stack_size_padded > 0
454 %if stack_size > 0 && (mmsize == 32 || HAVE_ALIGNED_STACK == 0)
457 add %1, stack_size_padded
462 %macro WIN64_RESTORE_XMM 1
463 WIN64_RESTORE_XMM_INTERNAL %1
464 %assign stack_offset (stack_offset-stack_size_padded)
465 %assign xmm_regs_used 0
468 %define has_epilogue regs_used > 7 || xmm_regs_used > 6 || mmsize == 32 || stack_size > 0
471 WIN64_RESTORE_XMM_INTERNAL rsp
472 POP_IF_USED 14, 13, 12, 11, 10, 9, 8, 7
479 %elif ARCH_X86_64 ; *nix x64 ;=============================================
487 DECLARE_REG 6, rax, 8
488 DECLARE_REG 7, R10, 16
489 DECLARE_REG 8, R11, 24
490 DECLARE_REG 9, rbx, 32
491 DECLARE_REG 10, rbp, 40
492 DECLARE_REG 11, R12, 48
493 DECLARE_REG 12, R13, 56
494 DECLARE_REG 13, R14, 64
495 DECLARE_REG 14, R15, 72
497 %macro PROLOGUE 2-5+ ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
500 ASSERT regs_used >= num_args
501 SETUP_STACK_POINTER %4
502 ASSERT regs_used <= 15
503 PUSH_IF_USED 9, 10, 11, 12, 13, 14
505 LOAD_IF_USED 6, 7, 8, 9, 10, 11, 12, 13, 14
506 DEFINE_ARGS_INTERNAL %0, %4, %5
509 %define has_epilogue regs_used > 9 || mmsize == 32 || stack_size > 0
512 %if stack_size_padded > 0
513 %if mmsize == 32 || HAVE_ALIGNED_STACK == 0
516 add rsp, stack_size_padded
519 POP_IF_USED 14, 13, 12, 11, 10, 9
526 %else ; X86_32 ;==============================================================
528 DECLARE_REG 0, eax, 4
529 DECLARE_REG 1, ecx, 8
530 DECLARE_REG 2, edx, 12
531 DECLARE_REG 3, ebx, 16
532 DECLARE_REG 4, esi, 20
533 DECLARE_REG 5, edi, 24
534 DECLARE_REG 6, ebp, 28
537 %macro DECLARE_ARG 1-*
539 %define r%1m [rstk + stack_offset + 4*%1 + 4]
540 %define r%1mp dword r%1m
545 DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
547 %macro PROLOGUE 2-5+ ; #args, #regs, #xmm_regs, [stack_size,] arg_names...
550 ASSERT regs_used >= num_args
557 SETUP_STACK_POINTER %4
558 ASSERT regs_used <= 7
559 PUSH_IF_USED 3, 4, 5, 6
561 LOAD_IF_USED 0, 1, 2, 3, 4, 5, 6
562 DEFINE_ARGS_INTERNAL %0, %4, %5
565 %define has_epilogue regs_used > 3 || mmsize == 32 || stack_size > 0
568 %if stack_size_padded > 0
569 %if mmsize == 32 || HAVE_ALIGNED_STACK == 0
572 add rsp, stack_size_padded
575 POP_IF_USED 6, 5, 4, 3
582 %endif ;======================================================================
585 %macro WIN64_SPILL_XMM 1
587 %macro WIN64_RESTORE_XMM 1
589 %macro WIN64_PUSH_XMM 0
601 %macro TAIL_CALL 2 ; callee, is_nonadjacent
610 ;=============================================================================
611 ; arch-independent part
612 ;=============================================================================
614 %assign function_align 16
617 ; Applies any symbol mangling needed for C linkage, and sets up a define such that
618 ; subsequent uses of the function name automatically refer to the mangled version.
619 ; Appends cpuflags to the function name if cpuflags has been specified.
620 %macro cglobal 1-2+ "" ; name, [PROLOGUE args]
621 ; the "" is a workaround for nasm, which fails if SUFFIX is empty
622 ; and we call cglobal_internal with just %1 %+ SUFFIX (without %2)
623 cglobal_internal %1 %+ SUFFIX, %2
625 %macro cglobal_internal 1-2+
627 %xdefine %1 mangle(program_name %+ _ %+ %1)
628 %xdefine %1.skip_prologue %1 %+ .skip_prologue
629 CAT_XDEFINE cglobaled_, %1, 1
631 %xdefine current_function %1
632 %ifidn __OUTPUT_FORMAT__,elf
633 global %1:function hidden
639 RESET_MM_PERMUTATION ; not really needed, but makes disassembly somewhat nicer
641 %assign stack_offset 0
643 %assign stack_size_padded 0
644 %assign xmm_regs_used 0
651 %xdefine %1 mangle(program_name %+ _ %+ %1)
652 CAT_XDEFINE cglobaled_, %1, 1
656 ; like cextern, but without the prefix
657 %macro cextern_naked 1
658 %xdefine %1 mangle(%1)
659 CAT_XDEFINE cglobaled_, %1, 1
664 %xdefine %1 mangle(program_name %+ _ %+ %1)
669 ; This is needed for ELF, otherwise the GNU linker assumes the stack is
670 ; executable by default.
671 %ifidn __OUTPUT_FORMAT__,elf
672 SECTION .note.GNU-stack noalloc noexec nowrite progbits
677 %assign cpuflags_mmx (1<<0)
678 %assign cpuflags_mmx2 (1<<1) | cpuflags_mmx
679 %assign cpuflags_3dnow (1<<2) | cpuflags_mmx
680 %assign cpuflags_3dnowext (1<<3) | cpuflags_3dnow
681 %assign cpuflags_sse (1<<4) | cpuflags_mmx2
682 %assign cpuflags_sse2 (1<<5) | cpuflags_sse
683 %assign cpuflags_sse2slow (1<<6) | cpuflags_sse2
684 %assign cpuflags_sse3 (1<<7) | cpuflags_sse2
685 %assign cpuflags_ssse3 (1<<8) | cpuflags_sse3
686 %assign cpuflags_sse4 (1<<9) | cpuflags_ssse3
687 %assign cpuflags_sse42 (1<<10)| cpuflags_sse4
688 %assign cpuflags_avx (1<<11)| cpuflags_sse42
689 %assign cpuflags_xop (1<<12)| cpuflags_avx
690 %assign cpuflags_fma4 (1<<13)| cpuflags_avx
691 %assign cpuflags_avx2 (1<<14)| cpuflags_avx
692 %assign cpuflags_fma3 (1<<15)| cpuflags_avx
694 %assign cpuflags_cache32 (1<<16)
695 %assign cpuflags_cache64 (1<<17)
696 %assign cpuflags_slowctz (1<<18)
697 %assign cpuflags_lzcnt (1<<19)
698 %assign cpuflags_misalign (1<<20)
699 %assign cpuflags_aligned (1<<21) ; not a cpu feature, but a function variant
700 %assign cpuflags_atom (1<<22)
701 %assign cpuflags_bmi1 (1<<23)
702 %assign cpuflags_bmi2 (1<<24)|cpuflags_bmi1
703 %assign cpuflags_tbm (1<<25)|cpuflags_bmi1
705 %define cpuflag(x) ((cpuflags & (cpuflags_ %+ x)) == (cpuflags_ %+ x))
706 %define notcpuflag(x) ((cpuflags & (cpuflags_ %+ x)) != (cpuflags_ %+ x))
708 ; Takes up to 2 cpuflags from the above list.
709 ; All subsequent functions (up to the next INIT_CPUFLAGS) is built for the specified cpu.
710 ; You shouldn't need to invoke this macro directly, it's a subroutine for INIT_MMX &co.
711 %macro INIT_CPUFLAGS 0-2
714 %assign cpuflags cpuflags_%1
716 %xdefine cpuname %1_%2
717 %assign cpuflags cpuflags | cpuflags_%2
719 %xdefine SUFFIX _ %+ cpuname
721 %assign avx_enabled 1
723 %if mmsize == 16 && notcpuflag(sse2)
726 %define movnta movntps
751 %assign avx_enabled 0
752 %define RESET_MM_PERMUTATION INIT_MMX %1
758 %define movnta movntq
761 CAT_XDEFINE m, %%i, mm %+ %%i
762 CAT_XDEFINE nmm, %%i, %%i
774 %assign avx_enabled 0
775 %define RESET_MM_PERMUTATION INIT_XMM %1
779 %define num_mmregs 16
784 %define movnta movntdq
787 CAT_XDEFINE m, %%i, xmm %+ %%i
788 CAT_XDEFINE nxmm, %%i, %%i
795 %assign avx_enabled 1
796 %define RESET_MM_PERMUTATION INIT_YMM %1
800 %define num_mmregs 16
805 %define movnta vmovntps
808 CAT_XDEFINE m, %%i, ymm %+ %%i
809 CAT_XDEFINE nymm, %%i, %%i
817 ; I often want to use macros that permute their arguments. e.g. there's no
818 ; efficient way to implement butterfly or transpose or dct without swapping some
821 ; I would like to not have to manually keep track of the permutations:
822 ; If I insert a permutation in the middle of a function, it should automatically
823 ; change everything that follows. For more complex macros I may also have multiple
824 ; implementations, e.g. the SSE2 and SSSE3 versions may have different permutations.
826 ; Hence these macros. Insert a PERMUTE or some SWAPs at the end of a macro that
827 ; permutes its arguments. It's equivalent to exchanging the contents of the
828 ; registers, except that this way you exchange the register names instead, so it
829 ; doesn't cost any cycles.
831 %macro PERMUTE 2-* ; takes a list of pairs to swap
846 %macro SWAP 2-* ; swaps a single chain (sometimes more concise than pairs)
852 CAT_XDEFINE n, m%1, %1
853 CAT_XDEFINE n, m%2, %2
855 ; If we were called as "SWAP m0,m1" rather than "SWAP 0,1" infer the original numbers here.
856 ; Be careful using this mode in nested macros though, as in some cases there may be
857 ; other copies of m# that have already been dereferenced and don't get updated correctly.
858 %xdefine %%n1 n %+ %1
859 %xdefine %%n2 n %+ %2
860 %xdefine tmp m %+ %%n1
861 CAT_XDEFINE m, %%n1, m %+ %%n2
862 CAT_XDEFINE m, %%n2, tmp
863 CAT_XDEFINE n, m %+ %%n1, %%n1
864 CAT_XDEFINE n, m %+ %%n2, %%n2
871 ; If SAVE_MM_PERMUTATION is placed at the end of a function, then any later
872 ; calls to that function will automatically load the permutation, so values can
873 ; be returned in mmregs.
874 %macro SAVE_MM_PERMUTATION 0-1
878 %xdefine %%f current_function %+ _m
882 CAT_XDEFINE %%f, %%i, m %+ %%i
887 %macro LOAD_MM_PERMUTATION 1 ; name to load from
891 CAT_XDEFINE m, %%i, %1_m %+ %%i
892 CAT_XDEFINE n, m %+ %%i, %%i
898 ; Append cpuflags to the callee's name iff the appended name is known and the plain name isn't
900 call_internal %1, %1 %+ SUFFIX
902 %macro call_internal 2
910 LOAD_MM_PERMUTATION %%i
913 ; Substitutions that reduce instruction size but are functionally equivalent
938 ;=============================================================================
939 ; AVX abstraction layer
940 ;=============================================================================
945 CAT_XDEFINE sizeofmm, i, 8
947 CAT_XDEFINE sizeofxmm, i, 16
948 CAT_XDEFINE sizeofymm, i, 32
953 %macro CHECK_AVX_INSTR_EMU 3-*
958 %error non-avx emulation of ``%%opcode'' is not supported
965 ;%2 == 1 if float, 0 if int
966 ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 2- or 3-operand (xmm, xmm, xmm)
967 ;%4 == number of operands given
969 %macro RUN_AVX_INSTR 6-7+
971 %define %%sizeofreg sizeof%6
973 %define %%sizeofreg sizeof%5
975 %define %%sizeofreg mmsize
985 %define %%regmov movq
987 %define %%regmov movaps
989 %define %%regmov movdqa
994 %if avx_enabled && %%sizeofreg==16
997 CHECK_AVX_INSTR_EMU {%1 %5, %6, %7}, %5, %7
1012 ; 3arg AVX ops with a memory arg can only have it in src2,
1013 ; whereas SSE emulation of 3arg prefers to have it in src1 (i.e. the mov).
1014 ; So, if the op is symmetric and the wrong one is memory, swap them.
1015 %macro RUN_AVX_INSTR1 8
1026 %if %%swap && %3 == 0 && %8 == 1
1027 RUN_AVX_INSTR %1, %2, %3, %4, %5, %7, %6
1029 RUN_AVX_INSTR %1, %2, %3, %4, %5, %6, %7
1034 ;%2 == 1 if float, 0 if int
1035 ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 2- or 3-operand (xmm, xmm, xmm)
1036 ;%4 == 1 if symmetric (i.e. doesn't matter which src arg is which), 0 if not
1038 %macro %1 2-9 fnord, fnord, fnord, %1, %2, %3, %4
1040 RUN_AVX_INSTR %6, %7, %8, 2, %1, %2
1042 RUN_AVX_INSTR1 %6, %7, %8, 3, %1, %2, %3, %9
1044 RUN_AVX_INSTR %6, %7, %8, 4, %1, %2, %3, %4
1046 RUN_AVX_INSTR %6, %7, %8, 5, %1, %2, %3, %4, %5
1051 AVX_INSTR addpd, 1, 0, 1
1052 AVX_INSTR addps, 1, 0, 1
1053 AVX_INSTR addsd, 1, 0, 1
1054 AVX_INSTR addss, 1, 0, 1
1055 AVX_INSTR addsubpd, 1, 0, 0
1056 AVX_INSTR addsubps, 1, 0, 0
1057 AVX_INSTR andpd, 1, 0, 1
1058 AVX_INSTR andps, 1, 0, 1
1059 AVX_INSTR andnpd, 1, 0, 0
1060 AVX_INSTR andnps, 1, 0, 0
1061 AVX_INSTR blendpd, 1, 0, 0
1062 AVX_INSTR blendps, 1, 0, 0
1063 AVX_INSTR blendvpd, 1, 0, 0
1064 AVX_INSTR blendvps, 1, 0, 0
1065 AVX_INSTR cmppd, 1, 0, 0
1066 AVX_INSTR cmpps, 1, 0, 0
1067 AVX_INSTR cmpsd, 1, 0, 0
1068 AVX_INSTR cmpss, 1, 0, 0
1069 AVX_INSTR cvtdq2ps, 1, 0, 0
1070 AVX_INSTR cvtps2dq, 1, 0, 0
1071 AVX_INSTR divpd, 1, 0, 0
1072 AVX_INSTR divps, 1, 0, 0
1073 AVX_INSTR divsd, 1, 0, 0
1074 AVX_INSTR divss, 1, 0, 0
1075 AVX_INSTR dppd, 1, 1, 0
1076 AVX_INSTR dpps, 1, 1, 0
1077 AVX_INSTR haddpd, 1, 0, 0
1078 AVX_INSTR haddps, 1, 0, 0
1079 AVX_INSTR hsubpd, 1, 0, 0
1080 AVX_INSTR hsubps, 1, 0, 0
1081 AVX_INSTR maxpd, 1, 0, 1
1082 AVX_INSTR maxps, 1, 0, 1
1083 AVX_INSTR maxsd, 1, 0, 1
1084 AVX_INSTR maxss, 1, 0, 1
1085 AVX_INSTR minpd, 1, 0, 1
1086 AVX_INSTR minps, 1, 0, 1
1087 AVX_INSTR minsd, 1, 0, 1
1088 AVX_INSTR minss, 1, 0, 1
1089 AVX_INSTR movhlps, 1, 0, 0
1090 AVX_INSTR movlhps, 1, 0, 0
1091 AVX_INSTR movsd, 1, 0, 0
1092 AVX_INSTR movss, 1, 0, 0
1093 AVX_INSTR mpsadbw, 0, 1, 0
1094 AVX_INSTR mulpd, 1, 0, 1
1095 AVX_INSTR mulps, 1, 0, 1
1096 AVX_INSTR mulsd, 1, 0, 1
1097 AVX_INSTR mulss, 1, 0, 1
1098 AVX_INSTR orpd, 1, 0, 1
1099 AVX_INSTR orps, 1, 0, 1
1100 AVX_INSTR pabsb, 0, 0, 0
1101 AVX_INSTR pabsw, 0, 0, 0
1102 AVX_INSTR pabsd, 0, 0, 0
1103 AVX_INSTR packsswb, 0, 0, 0
1104 AVX_INSTR packssdw, 0, 0, 0
1105 AVX_INSTR packuswb, 0, 0, 0
1106 AVX_INSTR packusdw, 0, 0, 0
1107 AVX_INSTR paddb, 0, 0, 1
1108 AVX_INSTR paddw, 0, 0, 1
1109 AVX_INSTR paddd, 0, 0, 1
1110 AVX_INSTR paddq, 0, 0, 1
1111 AVX_INSTR paddsb, 0, 0, 1
1112 AVX_INSTR paddsw, 0, 0, 1
1113 AVX_INSTR paddusb, 0, 0, 1
1114 AVX_INSTR paddusw, 0, 0, 1
1115 AVX_INSTR palignr, 0, 1, 0
1116 AVX_INSTR pand, 0, 0, 1
1117 AVX_INSTR pandn, 0, 0, 0
1118 AVX_INSTR pavgb, 0, 0, 1
1119 AVX_INSTR pavgw, 0, 0, 1
1120 AVX_INSTR pblendvb, 0, 0, 0
1121 AVX_INSTR pblendw, 0, 1, 0
1122 AVX_INSTR pcmpestri, 0, 0, 0
1123 AVX_INSTR pcmpestrm, 0, 0, 0
1124 AVX_INSTR pcmpistri, 0, 0, 0
1125 AVX_INSTR pcmpistrm, 0, 0, 0
1126 AVX_INSTR pcmpeqb, 0, 0, 1
1127 AVX_INSTR pcmpeqw, 0, 0, 1
1128 AVX_INSTR pcmpeqd, 0, 0, 1
1129 AVX_INSTR pcmpeqq, 0, 0, 1
1130 AVX_INSTR pcmpgtb, 0, 0, 0
1131 AVX_INSTR pcmpgtw, 0, 0, 0
1132 AVX_INSTR pcmpgtd, 0, 0, 0
1133 AVX_INSTR pcmpgtq, 0, 0, 0
1134 AVX_INSTR phaddw, 0, 0, 0
1135 AVX_INSTR phaddd, 0, 0, 0
1136 AVX_INSTR phaddsw, 0, 0, 0
1137 AVX_INSTR phsubw, 0, 0, 0
1138 AVX_INSTR phsubd, 0, 0, 0
1139 AVX_INSTR phsubsw, 0, 0, 0
1140 AVX_INSTR pmaddwd, 0, 0, 1
1141 AVX_INSTR pmaddubsw, 0, 0, 0
1142 AVX_INSTR pmaxsb, 0, 0, 1
1143 AVX_INSTR pmaxsw, 0, 0, 1
1144 AVX_INSTR pmaxsd, 0, 0, 1
1145 AVX_INSTR pmaxub, 0, 0, 1
1146 AVX_INSTR pmaxuw, 0, 0, 1
1147 AVX_INSTR pmaxud, 0, 0, 1
1148 AVX_INSTR pminsb, 0, 0, 1
1149 AVX_INSTR pminsw, 0, 0, 1
1150 AVX_INSTR pminsd, 0, 0, 1
1151 AVX_INSTR pminub, 0, 0, 1
1152 AVX_INSTR pminuw, 0, 0, 1
1153 AVX_INSTR pminud, 0, 0, 1
1154 AVX_INSTR pmovmskb, 0, 0, 0
1155 AVX_INSTR pmulhuw, 0, 0, 1
1156 AVX_INSTR pmulhrsw, 0, 0, 1
1157 AVX_INSTR pmulhw, 0, 0, 1
1158 AVX_INSTR pmullw, 0, 0, 1
1159 AVX_INSTR pmulld, 0, 0, 1
1160 AVX_INSTR pmuludq, 0, 0, 1
1161 AVX_INSTR pmuldq, 0, 0, 1
1162 AVX_INSTR por, 0, 0, 1
1163 AVX_INSTR psadbw, 0, 0, 1
1164 AVX_INSTR pshufb, 0, 0, 0
1165 AVX_INSTR pshufd, 0, 1, 0
1166 AVX_INSTR pshufhw, 0, 1, 0
1167 AVX_INSTR pshuflw, 0, 1, 0
1168 AVX_INSTR psignb, 0, 0, 0
1169 AVX_INSTR psignw, 0, 0, 0
1170 AVX_INSTR psignd, 0, 0, 0
1171 AVX_INSTR psllw, 0, 0, 0
1172 AVX_INSTR pslld, 0, 0, 0
1173 AVX_INSTR psllq, 0, 0, 0
1174 AVX_INSTR pslldq, 0, 0, 0
1175 AVX_INSTR psraw, 0, 0, 0
1176 AVX_INSTR psrad, 0, 0, 0
1177 AVX_INSTR psrlw, 0, 0, 0
1178 AVX_INSTR psrld, 0, 0, 0
1179 AVX_INSTR psrlq, 0, 0, 0
1180 AVX_INSTR psrldq, 0, 0, 0
1181 AVX_INSTR psubb, 0, 0, 0
1182 AVX_INSTR psubw, 0, 0, 0
1183 AVX_INSTR psubd, 0, 0, 0
1184 AVX_INSTR psubq, 0, 0, 0
1185 AVX_INSTR psubsb, 0, 0, 0
1186 AVX_INSTR psubsw, 0, 0, 0
1187 AVX_INSTR psubusb, 0, 0, 0
1188 AVX_INSTR psubusw, 0, 0, 0
1189 AVX_INSTR ptest, 0, 0, 0
1190 AVX_INSTR punpckhbw, 0, 0, 0
1191 AVX_INSTR punpckhwd, 0, 0, 0
1192 AVX_INSTR punpckhdq, 0, 0, 0
1193 AVX_INSTR punpckhqdq, 0, 0, 0
1194 AVX_INSTR punpcklbw, 0, 0, 0
1195 AVX_INSTR punpcklwd, 0, 0, 0
1196 AVX_INSTR punpckldq, 0, 0, 0
1197 AVX_INSTR punpcklqdq, 0, 0, 0
1198 AVX_INSTR pxor, 0, 0, 1
1199 AVX_INSTR shufps, 1, 1, 0
1200 AVX_INSTR subpd, 1, 0, 0
1201 AVX_INSTR subps, 1, 0, 0
1202 AVX_INSTR subsd, 1, 0, 0
1203 AVX_INSTR subss, 1, 0, 0
1204 AVX_INSTR unpckhpd, 1, 0, 0
1205 AVX_INSTR unpckhps, 1, 0, 0
1206 AVX_INSTR unpcklpd, 1, 0, 0
1207 AVX_INSTR unpcklps, 1, 0, 0
1208 AVX_INSTR xorpd, 1, 0, 1
1209 AVX_INSTR xorps, 1, 0, 1
1211 ; 3DNow instructions, for sharing code between AVX, SSE and 3DN
1212 AVX_INSTR pfadd, 1, 0, 1
1213 AVX_INSTR pfsub, 1, 0, 0
1214 AVX_INSTR pfmul, 1, 0, 1
1216 ; base-4 constants for shuffles
1219 %assign j ((i>>6)&3)*1000 + ((i>>4)&3)*100 + ((i>>2)&3)*10 + (i&3)
1221 CAT_XDEFINE q000, j, i
1223 CAT_XDEFINE q00, j, i
1225 CAT_XDEFINE q0, j, i
1235 %macro %1 4-7 %1, %2, %3
1245 FMA_INSTR pmacsdd, pmulld, paddd
1246 FMA_INSTR pmacsww, pmullw, paddw
1247 FMA_INSTR pmadcswd, pmaddwd, paddd
1249 ; tzcnt is equivalent to "rep bsf" and is backwards-compatible with bsf.
1250 ; This lets us use tzcnt without bumping the yasm version requirement yet.
1251 %define tzcnt rep bsf