14 #include <sys/types.h>
16 #include <sys/ioctl.h>
21 #include "platforms/platforms.h"
22 #include "input/input.h"
24 //#define BCM2708_PERI_BASE 0x20000000 //pi0-1
25 //#define BCM2708_PERI_BASE 0xFE000000 //pi4
26 #define BCM2708_PERI_BASE 0x3F000000 // pi3
27 #define BCM2708_PERI_SIZE 0x01000000
28 #define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO controller */
29 #define GPCLK_BASE (BCM2708_PERI_BASE + 0x101000)
30 #define GPIO_ADDR 0x200000 /* GPIO controller */
31 #define GPCLK_ADDR 0x101000
32 #define CLK_PASSWD 0x5a000000
33 #define CLK_GP0_CTL 0x070
34 #define CLK_GP0_DIV 0x074
40 #define STATUSREGADDR \
41 GPIO_CLR = 1 << SA0; \
42 GPIO_CLR = 1 << SA1; \
45 GPIO_CLR = 1 << SA0; \
46 GPIO_CLR = 1 << SA1; \
49 GPIO_SET = 1 << SA0; \
50 GPIO_CLR = 1 << SA1; \
53 GPIO_CLR = 1 << SA0; \
54 GPIO_SET = 1 << SA1; \
57 GPIO_SET = 1 << SA0; \
58 GPIO_SET = 1 << SA1; \
61 #define PAGE_SIZE (4 * 1024)
62 #define BLOCK_SIZE (4 * 1024)
64 #define GPIOSET(no, ishigh) \
69 reset |= (1 << (no)); \
72 #define FASTBASE 0x07FFFFFF
73 #define FASTSIZE 0xFFFFFFF
74 #define GAYLEBASE 0xD80000 // D7FFFF
75 #define GAYLESIZE 0x6FFFF
77 #define JOY0DAT 0xDFF00A
78 #define JOY1DAT 0xDFF00C
79 #define CIAAPRA 0xBFE001
80 #define POTGOR 0xDFF016
82 int kb_hook_enabled = 0;
83 int mouse_hook_enabled = 0;
84 int cpu_emulation_running = 1;
86 char mouse_dx = 0, mouse_dy = 0;
87 char mouse_buttons = 0;
89 #define KICKBASE 0xF80000
90 #define KICKSIZE 0x7FFFF
92 int mem_fd, mouse_fd = -1, keyboard_fd = -1;
94 int gayle_emulation_enabled = 1;
98 // Configurable emulator options
99 unsigned int cpu_type = M68K_CPU_TYPE_68000;
100 unsigned int loop_cycles = 300;
101 struct emulator_config *cfg = NULL;
102 char keyboard_file[256] = "/dev/input/event0";
105 volatile unsigned int *gpio;
106 volatile unsigned int *gpclk;
107 volatile unsigned int gpfsel0;
108 volatile unsigned int gpfsel1;
109 volatile unsigned int gpfsel2;
110 volatile unsigned int gpfsel0_o;
111 volatile unsigned int gpfsel1_o;
112 volatile unsigned int gpfsel2_o;
114 // GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x) or
116 #define INP_GPIO(g) *(gpio + ((g) / 10)) &= ~(7 << (((g) % 10) * 3))
117 #define OUT_GPIO(g) *(gpio + ((g) / 10)) |= (1 << (((g) % 10) * 3))
118 #define SET_GPIO_ALT(g, a) \
119 *(gpio + (((g) / 10))) |= \
120 (((a) <= 3 ? (a) + 4 : (a) == 4 ? 3 : 2) << (((g) % 10) * 3))
123 *(gpio + 7) // sets bits which are 1 ignores bits which are 0
125 *(gpio + 10) // clears bits which are 1 ignores bits which are 0
127 #define GET_GPIO(g) (*(gpio + 13) & (1 << g)) // 0 if LOW, (1<<g) if HIGH
129 #define GPIO_PULL *(gpio + 37) // Pull up/pull down
130 #define GPIO_PULLCLK0 *(gpio + 38) // Pull up/pull down clock
134 uint32_t read8(uint32_t address);
135 void write8(uint32_t address, uint32_t data);
137 uint32_t read16(uint32_t address);
138 void write16(uint32_t address, uint32_t data);
140 void write32(uint32_t address, uint32_t data);
141 uint32_t read32(uint32_t address);
143 uint16_t read_reg(void);
144 void write_reg(unsigned int value);
146 volatile uint16_t srdata;
147 volatile uint32_t srdata2;
148 volatile uint32_t srdata2_old;
150 //unsigned char g_kick[524288];
151 //unsigned char g_ram[FASTSIZE + 1]; /* RAM */
152 unsigned char toggle;
153 static volatile unsigned char ovl;
154 static volatile unsigned char maprom;
156 void sigint_handler(int sig_num) {
158 //cpu_emulation_running = 0;
161 printf("Received sigint %d, exiting.\n", sig_num);
170 void *iplThread(void *args) {
171 printf("IPL thread running/n");
175 if (GET_GPIO(1) == 0) {
177 m68k_end_timeslice();
178 //printf("thread!/n");
187 int main(int argc, char *argv[]) {
189 const struct sched_param priority = {99};
191 // Some command line switch stuffles
192 for (g = 1; g < argc; g++) {
193 if (strcmp(argv[g], "--disable-gayle") == 0) {
194 gayle_emulation_enabled = 0;
196 else if (strcmp(argv[g], "--cpu_type") == 0 || strcmp(argv[g], "--cpu") == 0) {
198 printf("%s switch found, but no CPU type specified.\n", argv[g]);
201 cpu_type = get_m68k_cpu_type(argv[g]);
204 else if (strcmp(argv[g], "--config-file") == 0 || strcmp(argv[g], "--config") == 0) {
206 printf("%s switch found, but no config filename specified.\n", argv[g]);
209 cfg = load_config_file(argv[g]);
212 else if (strcmp(argv[g], "--keyboard-file") == 0 || strcmp(argv[g], "--kbfile") == 0) {
214 printf("%s switch found, but no keyboard device path specified.\n", argv[g]);
217 strcpy(keyboard_file, argv[g]);
223 printf("No config file specified. Trying to load default.cfg...\n");
224 cfg = load_config_file("default.cfg");
226 printf("Couldn't load default.cfg, empty emulator config will be used.\n");
227 cfg = (struct emulator_config *)calloc(1, sizeof(struct emulator_config));
229 printf("Failed to allocate memory for emulator config!\n");
232 memset(cfg, 0x00, sizeof(struct emulator_config));
237 if (cfg->cpu_type) cpu_type = cfg->cpu_type;
238 if (cfg->loop_cycles) loop_cycles = cfg->loop_cycles;
241 cfg->platform = make_platform_config("none", "generic");
242 cfg->platform->platform_initial_setup(cfg);
245 if (cfg->mouse_enabled) {
246 mouse_fd = open(cfg->mouse_file, O_RDONLY | O_NONBLOCK);
247 if (mouse_fd == -1) {
248 printf("Failed to open %s, can't enable mouse hook.\n", cfg->mouse_file);
249 cfg->mouse_enabled = 0;
253 keyboard_fd = open(keyboard_file, O_RDONLY | O_NONBLOCK);
254 if (keyboard_fd == -1) {
255 printf("Failed to open keyboard event source.\n");
258 sched_setscheduler(0, SCHED_FIFO, &priority);
259 mlockall(MCL_CURRENT); // lock in memory to keep us from paging out
263 signal(SIGINT, sigint_handler);
266 //goto skip_everything;
268 // Enable 200MHz CLK output on GPIO4, adjust divider and pll source depending
270 printf("Enable 200MHz GPCLK0 on GPIO4\n");
272 *(gpclk + (CLK_GP0_CTL / 4)) = CLK_PASSWD | (1 << 5);
274 while ((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7))
277 *(gpclk + (CLK_GP0_DIV / 4)) =
278 CLK_PASSWD | (6 << 12); // divider , 6=200MHz on pi3
280 *(gpclk + (CLK_GP0_CTL / 4)) =
281 CLK_PASSWD | 5 | (1 << 4); // pll? 6=plld, 5=pllc
283 while (((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7)) == 0)
287 SET_GPIO_ALT(4, 0); // gpclk0
297 // set gpio0 (aux0) and gpio1 (aux1) to input
301 // Set GPIO pins 6,7 and 8-23 to output
302 for (g = 6; g <= 23; g++) {
306 printf("Precalculate GPIO8-23 as Output\n");
307 gpfsel0_o = *(gpio); // store gpio ddr
308 printf("gpfsel0: %#x\n", gpfsel0_o);
309 gpfsel1_o = *(gpio + 1); // store gpio ddr
310 printf("gpfsel1: %#x\n", gpfsel1_o);
311 gpfsel2_o = *(gpio + 2); // store gpio ddr
312 printf("gpfsel2: %#x\n", gpfsel2_o);
314 // Set GPIO pins 8-23 to input
315 for (g = 8; g <= 23; g++) {
318 printf("Precalculate GPIO8-23 as Input\n");
319 gpfsel0 = *(gpio); // store gpio ddr
320 printf("gpfsel0: %#x\n", gpfsel0);
321 gpfsel1 = *(gpio + 1); // store gpio ddr
322 printf("gpfsel1: %#x\n", gpfsel1);
323 gpfsel2 = *(gpio + 2); // store gpio ddr
324 printf("gpfsel2: %#x\n", gpfsel2);
333 // reset cpld statemachine first
341 // reset amiga and statemachine
345 m68k_write_memory_8(0xbfe201, 0x0001); // AMIGA OVL
346 m68k_write_memory_8(0xbfe001, 0x0001); // AMIGA OVL high (ROM@0x0)
351 printf("Setting CPU type to %d.\n", cpu_type);
352 m68k_set_cpu_type(cpu_type);
356 m68k_set_reg(M68K_REG_PC, 0xF80002);
358 m68k_set_reg(M68K_REG_PC, 0x0);
364 err = pthread_create(&id, NULL, &iplThread, NULL);
366 printf("\ncan't create IPL thread :[%s]", strerror(err));
368 printf("\n IPL Thread created successfully\n");
374 if (mouse_hook_enabled) {
375 if (get_mouse_status(&mouse_dx, &mouse_dy, &mouse_buttons)) {
376 //printf("Maus: %d (%.2X), %d (%.2X), B:%.2X\n", mouse_dx, mouse_dx, mouse_dy, mouse_dy, mouse_buttons);
380 if (cpu_emulation_running)
381 m68k_execute(loop_cycles);
383 // FIXME: Rework this to use keyboard events instead.
384 while (get_key_char(&c)) {
385 if (c == cfg->keyboard_toggle_key && !kb_hook_enabled) {
387 printf("Keyboard hook enabled.\n");
389 else if (c == 0x1B && kb_hook_enabled) {
391 printf("Keyboard hook disabled.\n");
393 if (!kb_hook_enabled) {
394 if (c == cfg->mouse_toggle_key) {
395 mouse_hook_enabled ^= 1;
396 printf("Mouse hook %s.\n", mouse_hook_enabled ? "enabled" : "disabled");
397 mouse_dx = mouse_dy = mouse_buttons = 0;
400 cpu_emulation_running ^= 1;
401 printf("CPU emulation is now %s\n", cpu_emulation_running ? "running" : "stopped");
406 printf("CPU emulation reset.\n");
409 printf("Quitting and exiting emulator.\n");
410 goto stop_cpu_emulation;
417 m68k_set_irq((srdata >> 13) & 0xff);
425 if (GET_GPIO(1) == 0) {
427 m68k_set_irq((srdata >> 13) & 0xff);
429 if (CheckIrq() == 1) {
430 write16(0xdff09c, 0x8008);
449 void cpu_pulse_reset(void) {
451 // printf("Status Reg%x\n",read_reg());
454 // printf("Status Reg%x\n",read_reg());
457 int cpu_irq_ack(int level) {
458 printf("cpu irq ack\n");
462 static unsigned int target = 0;
464 unsigned int m68k_read_memory_8(unsigned int address) {
465 if (cfg->platform->custom_read && cfg->platform->custom_read(cfg, address, &target, OP_TYPE_BYTE) != -1) {
470 int ret = handle_mapped_read(cfg, address, &target, OP_TYPE_BYTE, ovl);
476 // if (address < 0xffffff) {
477 return read8((uint32_t)address);
483 unsigned int m68k_read_memory_16(unsigned int address) {
484 if (cfg->platform->custom_read && cfg->platform->custom_read(cfg, address, &target, OP_TYPE_WORD) != -1) {
489 int ret = handle_mapped_read(cfg, address, &target, OP_TYPE_WORD, ovl);
494 if (mouse_hook_enabled) {
495 if (address == JOY0DAT) {
496 // Forward mouse valueses to Amyga.
497 unsigned short result = (mouse_dy << 8) | (mouse_dx);
498 mouse_dx = mouse_dy = 0;
499 return (unsigned int)result;
501 if (address == CIAAPRA) {
502 unsigned short result = (unsigned int)read16((uint32_t)address);
503 if (mouse_buttons & 0x01) {
505 return (unsigned int)(result | 0x40);
508 return (unsigned int)result;
510 if (address == POTGOR) {
511 unsigned short result = (unsigned int)read16((uint32_t)address);
512 if (mouse_buttons & 0x02) {
514 return (unsigned int)(result | 0x2);
517 return (unsigned int)result;
521 // if (address < 0xffffff) {
523 return (unsigned int)read16((uint32_t)address);
529 unsigned int m68k_read_memory_32(unsigned int address) {
530 if (cfg->platform->custom_read && cfg->platform->custom_read(cfg, address, &target, OP_TYPE_LONGWORD) != -1) {
535 int ret = handle_mapped_read(cfg, address, &target, OP_TYPE_LONGWORD, ovl);
540 // if (address < 0xffffff) {
542 uint16_t a = read16(address);
543 uint16_t b = read16(address + 2);
544 return (a << 16) | b;
550 void m68k_write_memory_8(unsigned int address, unsigned int value) {
551 if (cfg->platform->custom_write && cfg->platform->custom_write(cfg, address, value, OP_TYPE_BYTE) != -1) {
556 int ret = handle_mapped_write(cfg, address, value, OP_TYPE_BYTE, ovl);
561 if (address == 0xbfe001) {
562 ovl = (value & (1 << 0));
563 printf("OVL:%x\n", ovl);
566 // if (address < 0xffffff) {
568 write8((uint32_t)address, value);
575 void m68k_write_memory_16(unsigned int address, unsigned int value) {
576 if (cfg->platform->custom_write && cfg->platform->custom_write(cfg, address, value, OP_TYPE_WORD) != -1) {
581 int ret = handle_mapped_write(cfg, address, value, OP_TYPE_WORD, ovl);
586 // if (address < 0xffffff) {
588 write16((uint32_t)address, value);
594 void m68k_write_memory_32(unsigned int address, unsigned int value) {
595 if (cfg->platform->custom_write && cfg->platform->custom_write(cfg, address, value, OP_TYPE_LONGWORD) != -1) {
600 int ret = handle_mapped_write(cfg, address, value, OP_TYPE_LONGWORD, ovl);
605 // if (address < 0xffffff) {
607 write16(address, value >> 16);
608 write16(address + 2, value);
615 void write16(uint32_t address, uint32_t data) {
616 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
617 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
618 uint32_t addr_l_s = (address >> 16) << 8;
619 uint32_t addr_l_r = (~address >> 16) << 8;
620 uint32_t data_s = (data & 0x0000ffff) << 8;
621 uint32_t data_r = (~data & 0x0000ffff) << 8;
623 // asm volatile ("dmb" ::: "memory");
626 *(gpio + 1) = gpfsel1_o;
627 *(gpio + 2) = gpfsel2_o;
629 *(gpio + 7) = addr_h_s;
630 *(gpio + 10) = addr_h_r;
634 *(gpio + 7) = addr_l_s;
635 *(gpio + 10) = addr_l_r;
640 *(gpio + 7) = data_s;
641 *(gpio + 10) = data_r;
646 *(gpio + 1) = gpfsel1;
647 *(gpio + 2) = gpfsel2;
648 while ((GET_GPIO(0)))
650 // asm volatile ("dmb" ::: "memory");
653 void write8(uint32_t address, uint32_t data) {
654 if ((address & 1) == 0)
655 data = data + (data << 8); // EVEN, A0=0,UDS
657 data = data & 0xff; // ODD , A0=1,LDS
658 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
659 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
660 uint32_t addr_l_s = (address >> 16) << 8;
661 uint32_t addr_l_r = (~address >> 16) << 8;
662 uint32_t data_s = (data & 0x0000ffff) << 8;
663 uint32_t data_r = (~data & 0x0000ffff) << 8;
665 // asm volatile ("dmb" ::: "memory");
668 *(gpio + 1) = gpfsel1_o;
669 *(gpio + 2) = gpfsel2_o;
671 *(gpio + 7) = addr_h_s;
672 *(gpio + 10) = addr_h_r;
676 *(gpio + 7) = addr_l_s;
677 *(gpio + 10) = addr_l_r;
682 *(gpio + 7) = data_s;
683 *(gpio + 10) = data_r;
688 *(gpio + 1) = gpfsel1;
689 *(gpio + 2) = gpfsel2;
690 while ((GET_GPIO(0)))
692 // asm volatile ("dmb" ::: "memory");
695 uint32_t read16(uint32_t address) {
697 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
698 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
699 uint32_t addr_l_s = (address >> 16) << 8;
700 uint32_t addr_l_r = (~address >> 16) << 8;
702 // asm volatile ("dmb" ::: "memory");
705 *(gpio + 1) = gpfsel1_o;
706 *(gpio + 2) = gpfsel2_o;
708 *(gpio + 7) = addr_h_s;
709 *(gpio + 10) = addr_h_r;
713 *(gpio + 7) = addr_l_s;
714 *(gpio + 10) = addr_l_r;
720 *(gpio + 1) = gpfsel1;
721 *(gpio + 2) = gpfsel2;
723 while (!(GET_GPIO(0)))
728 // asm volatile ("dmb" ::: "memory");
729 return (val >> 8) & 0xffff;
732 uint32_t read8(uint32_t address) {
734 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
735 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
736 uint32_t addr_l_s = (address >> 16) << 8;
737 uint32_t addr_l_r = (~address >> 16) << 8;
739 // asm volatile ("dmb" ::: "memory");
742 *(gpio + 1) = gpfsel1_o;
743 *(gpio + 2) = gpfsel2_o;
745 *(gpio + 7) = addr_h_s;
746 *(gpio + 10) = addr_h_r;
750 *(gpio + 7) = addr_l_s;
751 *(gpio + 10) = addr_l_r;
757 *(gpio + 1) = gpfsel1;
758 *(gpio + 2) = gpfsel2;
761 while (!(GET_GPIO(0)))
766 // asm volatile ("dmb" ::: "memory");
768 val = (val >> 8) & 0xffff;
769 if ((address & 1) == 0)
770 return (val >> 8) & 0xff; // EVEN, A0=0,UDS
772 return val & 0xff; // ODD , A0=1,LDS
775 /******************************************************/
777 void write_reg(unsigned int value) {
780 *(gpio + 1) = gpfsel1_o;
781 *(gpio + 2) = gpfsel2_o;
782 *(gpio + 7) = (value & 0xffff) << 8;
783 *(gpio + 10) = (~value & 0xffff) << 8;
785 GPIO_CLR = 1 << 7; // delay
790 *(gpio + 1) = gpfsel1;
791 *(gpio + 2) = gpfsel2;
794 uint16_t read_reg(void) {
799 *(gpio + 1) = gpfsel1;
800 *(gpio + 2) = gpfsel2;
802 GPIO_CLR = 1 << 6; // delay
807 return (uint16_t)(val >> 8);
811 // Set up a memory regions to access GPIO
815 if ((mem_fd = open("/dev/mem", O_RDWR | O_SYNC)) < 0) {
816 printf("can't open /dev/mem \n");
822 NULL, // Any adddress in our space will do
823 BCM2708_PERI_SIZE, // Map length
824 PROT_READ | PROT_WRITE, // Enable reading & writting to mapped memory
825 MAP_SHARED, // Shared with other processes
826 mem_fd, // File to map
827 BCM2708_PERI_BASE // Offset to GPIO peripheral
830 close(mem_fd); // No need to keep mem_fd open after mmap
832 if (gpio_map == MAP_FAILED) {
833 printf("gpio mmap error %d\n", (int)gpio_map); // errno also set!
837 gpio = ((volatile unsigned *)gpio_map) + GPIO_ADDR / 4;
838 gpclk = ((volatile unsigned *)gpio_map) + GPCLK_ADDR / 4;