14 #include <sys/types.h>
16 #include <sys/ioctl.h>
21 #include "config_file/config_file.h"
22 #include "input/input.h"
24 //#define BCM2708_PERI_BASE 0x20000000 //pi0-1
25 //#define BCM2708_PERI_BASE 0xFE000000 //pi4
26 #define BCM2708_PERI_BASE 0x3F000000 // pi3
27 #define BCM2708_PERI_SIZE 0x01000000
28 #define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO controller */
29 #define GPCLK_BASE (BCM2708_PERI_BASE + 0x101000)
30 #define GPIO_ADDR 0x200000 /* GPIO controller */
31 #define GPCLK_ADDR 0x101000
32 #define CLK_PASSWD 0x5a000000
33 #define CLK_GP0_CTL 0x070
34 #define CLK_GP0_DIV 0x074
40 #define STATUSREGADDR \
41 GPIO_CLR = 1 << SA0; \
42 GPIO_CLR = 1 << SA1; \
45 GPIO_CLR = 1 << SA0; \
46 GPIO_CLR = 1 << SA1; \
49 GPIO_SET = 1 << SA0; \
50 GPIO_CLR = 1 << SA1; \
53 GPIO_CLR = 1 << SA0; \
54 GPIO_SET = 1 << SA1; \
57 GPIO_SET = 1 << SA0; \
58 GPIO_SET = 1 << SA1; \
61 #define PAGE_SIZE (4 * 1024)
62 #define BLOCK_SIZE (4 * 1024)
64 #define GPIOSET(no, ishigh) \
69 reset |= (1 << (no)); \
72 #define FASTBASE 0x07FFFFFF
73 #define FASTSIZE 0xFFFFFFF
74 #define GAYLEBASE 0xD80000 // D7FFFF
75 #define GAYLESIZE 0x6FFFF
77 #define JOY0DAT 0xDFF00A
78 #define JOY1DAT 0xDFF00C
79 #define CIAAPRA 0xBFE001
80 #define POTGOR 0xDFF016
82 int kb_hook_enabled = 0;
83 int mouse_hook_enabled = 0;
84 int cpu_emulation_running = 1;
86 char mouse_dx = 0, mouse_dy = 0;
87 char mouse_buttons = 0;
89 #define KICKBASE 0xF80000
90 #define KICKSIZE 0x7FFFF
92 int mem_fd, mouse_fd = -1;
94 int gayle_emulation_enabled = 1;
98 // Configurable emulator options
99 unsigned int cpu_type = M68K_CPU_TYPE_68000;
100 unsigned int loop_cycles = 300;
101 struct emulator_config *cfg = NULL;
104 volatile unsigned int *gpio;
105 volatile unsigned int *gpclk;
106 volatile unsigned int gpfsel0;
107 volatile unsigned int gpfsel1;
108 volatile unsigned int gpfsel2;
109 volatile unsigned int gpfsel0_o;
110 volatile unsigned int gpfsel1_o;
111 volatile unsigned int gpfsel2_o;
113 // GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x) or
115 #define INP_GPIO(g) *(gpio + ((g) / 10)) &= ~(7 << (((g) % 10) * 3))
116 #define OUT_GPIO(g) *(gpio + ((g) / 10)) |= (1 << (((g) % 10) * 3))
117 #define SET_GPIO_ALT(g, a) \
118 *(gpio + (((g) / 10))) |= \
119 (((a) <= 3 ? (a) + 4 : (a) == 4 ? 3 : 2) << (((g) % 10) * 3))
122 *(gpio + 7) // sets bits which are 1 ignores bits which are 0
124 *(gpio + 10) // clears bits which are 1 ignores bits which are 0
126 #define GET_GPIO(g) (*(gpio + 13) & (1 << g)) // 0 if LOW, (1<<g) if HIGH
128 #define GPIO_PULL *(gpio + 37) // Pull up/pull down
129 #define GPIO_PULLCLK0 *(gpio + 38) // Pull up/pull down clock
133 uint32_t read8(uint32_t address);
134 void write8(uint32_t address, uint32_t data);
136 uint32_t read16(uint32_t address);
137 void write16(uint32_t address, uint32_t data);
139 void write32(uint32_t address, uint32_t data);
140 uint32_t read32(uint32_t address);
142 uint16_t read_reg(void);
143 void write_reg(unsigned int value);
145 volatile uint16_t srdata;
146 volatile uint32_t srdata2;
147 volatile uint32_t srdata2_old;
149 //unsigned char g_kick[524288];
150 //unsigned char g_ram[FASTSIZE + 1]; /* RAM */
151 unsigned char toggle;
152 static volatile unsigned char ovl;
153 static volatile unsigned char maprom;
155 void sigint_handler(int sig_num) {
157 cpu_emulation_running = 0;
162 void *iplThread(void *args) {
163 printf("IPL thread running/n");
167 if (GET_GPIO(1) == 0) {
169 m68k_end_timeslice();
170 //printf("thread!/n");
179 int main(int argc, char *argv[]) {
181 const struct sched_param priority = {99};
183 // Some command line switch stuffles
184 for (g = 1; g < argc; g++) {
185 if (strcmp(argv[g], "--disable-gayle") == 0) {
186 gayle_emulation_enabled = 0;
188 else if (strcmp(argv[g], "--cpu_type") == 0 || strcmp(argv[g], "--cpu") == 0) {
190 printf("%s switch found, but no CPU type specified.\n", argv[g]);
193 cpu_type = get_m68k_cpu_type(argv[g]);
196 else if (strcmp(argv[g], "--config-file") == 0 || strcmp(argv[g], "--config") == 0) {
198 printf("%s switch found, but no config filename specified.\n", argv[g]);
201 cfg = load_config_file(argv[g]);
207 printf("No config file specified. Trying to load default.cfg...\n");
208 cfg = load_config_file("default.cfg");
210 printf("Couldn't load default.cfg, empty emulator config will be used.\n");
211 cfg = (struct emulator_config *)calloc(1, sizeof(struct emulator_config));
213 printf("Failed to allocate memory for emulator config!\n");
216 memset(cfg, 0x00, sizeof(struct emulator_config));
221 if (cfg->cpu_type) cpu_type = cfg->cpu_type;
222 if (cfg->loop_cycles) loop_cycles = cfg->loop_cycles;
225 if (cfg->mouse_enabled) {
226 mouse_fd = open(cfg->mouse_file, O_RDONLY | O_NONBLOCK);
227 if (mouse_fd == -1) {
228 printf("Failed to open %s, can't enable mouse hook.\n", cfg->mouse_file);
229 cfg->mouse_enabled = 0;
233 sched_setscheduler(0, SCHED_FIFO, &priority);
234 mlockall(MCL_CURRENT); // lock in memory to keep us from paging out
238 signal(SIGINT, sigint_handler);
241 //goto skip_everything;
243 // Enable 200MHz CLK output on GPIO4, adjust divider and pll source depending
245 printf("Enable 200MHz GPCLK0 on GPIO4\n");
247 *(gpclk + (CLK_GP0_CTL / 4)) = CLK_PASSWD | (1 << 5);
249 while ((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7))
252 *(gpclk + (CLK_GP0_DIV / 4)) =
253 CLK_PASSWD | (6 << 12); // divider , 6=200MHz on pi3
255 *(gpclk + (CLK_GP0_CTL / 4)) =
256 CLK_PASSWD | 5 | (1 << 4); // pll? 6=plld, 5=pllc
258 while (((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7)) == 0)
262 SET_GPIO_ALT(4, 0); // gpclk0
272 // set gpio0 (aux0) and gpio1 (aux1) to input
276 // Set GPIO pins 6,7 and 8-23 to output
277 for (g = 6; g <= 23; g++) {
281 printf("Precalculate GPIO8-23 as Output\n");
282 gpfsel0_o = *(gpio); // store gpio ddr
283 printf("gpfsel0: %#x\n", gpfsel0_o);
284 gpfsel1_o = *(gpio + 1); // store gpio ddr
285 printf("gpfsel1: %#x\n", gpfsel1_o);
286 gpfsel2_o = *(gpio + 2); // store gpio ddr
287 printf("gpfsel2: %#x\n", gpfsel2_o);
289 // Set GPIO pins 8-23 to input
290 for (g = 8; g <= 23; g++) {
293 printf("Precalculate GPIO8-23 as Input\n");
294 gpfsel0 = *(gpio); // store gpio ddr
295 printf("gpfsel0: %#x\n", gpfsel0);
296 gpfsel1 = *(gpio + 1); // store gpio ddr
297 printf("gpfsel1: %#x\n", gpfsel1);
298 gpfsel2 = *(gpio + 2); // store gpio ddr
299 printf("gpfsel2: %#x\n", gpfsel2);
308 // reset cpld statemachine first
316 // reset amiga and statemachine
320 m68k_write_memory_8(0xbfe201, 0x0001); // AMIGA OVL
321 m68k_write_memory_8(0xbfe001, 0x0001); // AMIGA OVL high (ROM@0x0)
326 printf("Setting CPU type to %d.\n", cpu_type);
327 m68k_set_cpu_type(cpu_type);
331 m68k_set_reg(M68K_REG_PC, 0xF80002);
333 m68k_set_reg(M68K_REG_PC, 0x0);
339 err = pthread_create(&id, NULL, &iplThread, NULL);
341 printf("\ncan't create IPL thread :[%s]", strerror(err));
343 printf("\n IPL Thread created successfully\n");
348 if (mouse_hook_enabled) {
349 if (get_mouse_status(&mouse_dx, &mouse_dy, &mouse_buttons)) {
350 //printf("Maus: %d (%.2X), %d (%.2X), B:%.2X\n", mouse_dx, mouse_dx, mouse_dy, mouse_dy, mouse_buttons);
354 if (cpu_emulation_running)
355 m68k_execute(loop_cycles);
359 if (c == cfg->keyboard_toggle_key && !kb_hook_enabled) {
361 printf("Keyboard hook enabled.\n");
363 else if (c == 0x1B && kb_hook_enabled) {
365 printf("Keyboard hook disabled.\n");
367 if (c == cfg->mouse_toggle_key) {
368 mouse_hook_enabled ^= 1;
369 printf("Mouse hook %s.\n", mouse_hook_enabled ? "enabled" : "disabled");
370 mouse_dx = mouse_dy = mouse_buttons = 0;
373 cpu_emulation_running ^= 1;
374 printf("CPU emulation is now %s\n", cpu_emulation_running ? "running" : "stopped");
379 printf("CPU emulation reset.\n");
382 printf("Quitting and exiting emulator.\n");
383 goto stop_cpu_emulation;
389 m68k_set_irq((srdata >> 13) & 0xff);
397 if (GET_GPIO(1) == 0) {
399 m68k_set_irq((srdata >> 13) & 0xff);
401 if (CheckIrq() == 1) {
402 write16(0xdff09c, 0x8008);
421 void cpu_pulse_reset(void) {
423 // printf("Status Reg%x\n",read_reg());
426 // printf("Status Reg%x\n",read_reg());
429 int cpu_irq_ack(int level) {
430 printf("cpu irq ack\n");
434 static unsigned int target = 0;
436 unsigned int m68k_read_memory_8(unsigned int address) {
438 int ret = handle_mapped_read(cfg, address, &target, OP_TYPE_BYTE, ovl);
444 // if (address < 0xffffff) {
445 return read8((uint32_t)address);
451 unsigned int m68k_read_memory_16(unsigned int address) {
453 int ret = handle_mapped_read(cfg, address, &target, OP_TYPE_WORD, ovl);
458 if (mouse_hook_enabled) {
459 if (address == JOY0DAT) {
460 // Forward mouse valueses to Amyga.
461 unsigned short result = (mouse_dy << 8) | (mouse_dx);
462 mouse_dx = mouse_dy = 0;
463 return (unsigned int)result;
465 if (address == CIAAPRA) {
466 unsigned short result = (unsigned int)read16((uint32_t)address);
467 if (mouse_buttons & 0x01) {
469 return (unsigned int)(result | 0x40);
472 return (unsigned int)result;
474 if (address == POTGOR) {
475 unsigned short result = (unsigned int)read16((uint32_t)address);
476 if (mouse_buttons & 0x02) {
478 return (unsigned int)(result | 0x2);
481 return (unsigned int)result;
485 // if (address < 0xffffff) {
487 return (unsigned int)read16((uint32_t)address);
493 unsigned int m68k_read_memory_32(unsigned int address) {
495 int ret = handle_mapped_read(cfg, address, &target, OP_TYPE_LONGWORD, ovl);
500 // if (address < 0xffffff) {
502 uint16_t a = read16(address);
503 uint16_t b = read16(address + 2);
504 return (a << 16) | b;
510 void m68k_write_memory_8(unsigned int address, unsigned int value) {
512 int ret = handle_mapped_write(cfg, address, value, OP_TYPE_BYTE, ovl);
517 if (address == 0xbfe001) {
518 ovl = (value & (1 << 0));
519 printf("OVL:%x\n", ovl);
522 // if (address < 0xffffff) {
524 write8((uint32_t)address, value);
531 void m68k_write_memory_16(unsigned int address, unsigned int value) {
533 int ret = handle_mapped_write(cfg, address, value, OP_TYPE_WORD, ovl);
538 // if (address < 0xffffff) {
540 write16((uint32_t)address, value);
546 void m68k_write_memory_32(unsigned int address, unsigned int value) {
548 int ret = handle_mapped_write(cfg, address, value, OP_TYPE_LONGWORD, ovl);
553 // if (address < 0xffffff) {
555 write16(address, value >> 16);
556 write16(address + 2, value);
563 void write16(uint32_t address, uint32_t data) {
564 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
565 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
566 uint32_t addr_l_s = (address >> 16) << 8;
567 uint32_t addr_l_r = (~address >> 16) << 8;
568 uint32_t data_s = (data & 0x0000ffff) << 8;
569 uint32_t data_r = (~data & 0x0000ffff) << 8;
571 // asm volatile ("dmb" ::: "memory");
574 *(gpio + 1) = gpfsel1_o;
575 *(gpio + 2) = gpfsel2_o;
577 *(gpio + 7) = addr_h_s;
578 *(gpio + 10) = addr_h_r;
582 *(gpio + 7) = addr_l_s;
583 *(gpio + 10) = addr_l_r;
588 *(gpio + 7) = data_s;
589 *(gpio + 10) = data_r;
594 *(gpio + 1) = gpfsel1;
595 *(gpio + 2) = gpfsel2;
596 while ((GET_GPIO(0)))
598 // asm volatile ("dmb" ::: "memory");
601 void write8(uint32_t address, uint32_t data) {
602 if ((address & 1) == 0)
603 data = data + (data << 8); // EVEN, A0=0,UDS
605 data = data & 0xff; // ODD , A0=1,LDS
606 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
607 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
608 uint32_t addr_l_s = (address >> 16) << 8;
609 uint32_t addr_l_r = (~address >> 16) << 8;
610 uint32_t data_s = (data & 0x0000ffff) << 8;
611 uint32_t data_r = (~data & 0x0000ffff) << 8;
613 // asm volatile ("dmb" ::: "memory");
616 *(gpio + 1) = gpfsel1_o;
617 *(gpio + 2) = gpfsel2_o;
619 *(gpio + 7) = addr_h_s;
620 *(gpio + 10) = addr_h_r;
624 *(gpio + 7) = addr_l_s;
625 *(gpio + 10) = addr_l_r;
630 *(gpio + 7) = data_s;
631 *(gpio + 10) = data_r;
636 *(gpio + 1) = gpfsel1;
637 *(gpio + 2) = gpfsel2;
638 while ((GET_GPIO(0)))
640 // asm volatile ("dmb" ::: "memory");
643 uint32_t read16(uint32_t address) {
645 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
646 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
647 uint32_t addr_l_s = (address >> 16) << 8;
648 uint32_t addr_l_r = (~address >> 16) << 8;
650 // asm volatile ("dmb" ::: "memory");
653 *(gpio + 1) = gpfsel1_o;
654 *(gpio + 2) = gpfsel2_o;
656 *(gpio + 7) = addr_h_s;
657 *(gpio + 10) = addr_h_r;
661 *(gpio + 7) = addr_l_s;
662 *(gpio + 10) = addr_l_r;
668 *(gpio + 1) = gpfsel1;
669 *(gpio + 2) = gpfsel2;
671 while (!(GET_GPIO(0)))
676 // asm volatile ("dmb" ::: "memory");
677 return (val >> 8) & 0xffff;
680 uint32_t read8(uint32_t address) {
682 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
683 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
684 uint32_t addr_l_s = (address >> 16) << 8;
685 uint32_t addr_l_r = (~address >> 16) << 8;
687 // asm volatile ("dmb" ::: "memory");
690 *(gpio + 1) = gpfsel1_o;
691 *(gpio + 2) = gpfsel2_o;
693 *(gpio + 7) = addr_h_s;
694 *(gpio + 10) = addr_h_r;
698 *(gpio + 7) = addr_l_s;
699 *(gpio + 10) = addr_l_r;
705 *(gpio + 1) = gpfsel1;
706 *(gpio + 2) = gpfsel2;
709 while (!(GET_GPIO(0)))
714 // asm volatile ("dmb" ::: "memory");
716 val = (val >> 8) & 0xffff;
717 if ((address & 1) == 0)
718 return (val >> 8) & 0xff; // EVEN, A0=0,UDS
720 return val & 0xff; // ODD , A0=1,LDS
723 /******************************************************/
725 void write_reg(unsigned int value) {
728 *(gpio + 1) = gpfsel1_o;
729 *(gpio + 2) = gpfsel2_o;
730 *(gpio + 7) = (value & 0xffff) << 8;
731 *(gpio + 10) = (~value & 0xffff) << 8;
733 GPIO_CLR = 1 << 7; // delay
738 *(gpio + 1) = gpfsel1;
739 *(gpio + 2) = gpfsel2;
742 uint16_t read_reg(void) {
747 *(gpio + 1) = gpfsel1;
748 *(gpio + 2) = gpfsel2;
750 GPIO_CLR = 1 << 6; // delay
755 return (uint16_t)(val >> 8);
759 // Set up a memory regions to access GPIO
763 if ((mem_fd = open("/dev/mem", O_RDWR | O_SYNC)) < 0) {
764 printf("can't open /dev/mem \n");
770 NULL, // Any adddress in our space will do
771 BCM2708_PERI_SIZE, // Map length
772 PROT_READ | PROT_WRITE, // Enable reading & writting to mapped memory
773 MAP_SHARED, // Shared with other processes
774 mem_fd, // File to map
775 BCM2708_PERI_BASE // Offset to GPIO peripheral
778 close(mem_fd); // No need to keep mem_fd open after mmap
780 if (gpio_map == MAP_FAILED) {
781 printf("gpio mmap error %d\n", (int)gpio_map); // errno also set!
785 gpio = ((volatile unsigned *)gpio_map) + GPIO_ADDR / 4;
786 gpclk = ((volatile unsigned *)gpio_map) + GPCLK_ADDR / 4;