20 //#define BCM2708_PERI_BASE 0x20000000 //pi0-1
21 //#define BCM2708_PERI_BASE 0xFE000000 //pi4
22 #define BCM2708_PERI_BASE 0x3F000000 //pi3
23 #define BCM2708_PERI_SIZE 0x01000000
24 #define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO controller */
25 #define GPCLK_BASE (BCM2708_PERI_BASE + 0x101000)
26 #define GPIO_ADDR 0x200000 /* GPIO controller */
27 #define GPCLK_ADDR 0x101000
28 #define CLK_PASSWD 0x5a000000
29 #define CLK_GP0_CTL 0x070
30 #define CLK_GP0_DIV 0x074
36 #define STATUSREGADDR GPIO_CLR = 1<<SA0;GPIO_CLR = 1<<SA1;GPIO_SET = 1<<SA2;
37 #define W16 GPIO_CLR = 1<<SA0;GPIO_CLR = 1<<SA1;GPIO_CLR = 1<<SA2;
38 #define R16 GPIO_SET = 1<<SA0;GPIO_CLR = 1<<SA1;GPIO_CLR = 1<<SA2;
39 #define W8 GPIO_CLR = 1<<SA0;GPIO_SET = 1<<SA1;GPIO_CLR = 1<<SA2;
40 #define R8 GPIO_SET = 1<<SA0;GPIO_SET = 1<<SA1;GPIO_CLR = 1<<SA2;
42 #define PAGE_SIZE (4*1024)
43 #define BLOCK_SIZE (4*1024)
45 #define GPIOSET(no, ishigh) \
50 reset |= (1 << (no)); \
54 #define FASTBASE 0x07FFFFFF
55 //#define FASTSIZE 0xFFFFFF
56 #define FASTSIZE 0xFFFFFFF
59 #define GAYLEBASE 0xD80000 //D7FFFF
60 #define GAYLESIZE 0x6FFFF
68 volatile unsigned int *gpio;
69 volatile unsigned int *gpclk;
70 volatile unsigned int gpfsel0;
71 volatile unsigned int gpfsel1;
72 volatile unsigned int gpfsel2;
73 volatile unsigned int gpfsel0_o;
74 volatile unsigned int gpfsel1_o;
75 volatile unsigned int gpfsel2_o;
77 // GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x) or SET_GPIO_ALT(x,y)
78 #define INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3))
79 #define OUT_GPIO(g) *(gpio+((g)/10)) |= (1<<(((g)%10)*3))
80 #define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3))
82 #define GPIO_SET *(gpio+7) // sets bits which are 1 ignores bits which are 0
83 #define GPIO_CLR *(gpio+10) // clears bits which are 1 ignores bits which are 0
85 #define GET_GPIO(g) (*(gpio+13)&(1<<g)) // 0 if LOW, (1<<g) if HIGH
87 #define GPIO_PULL *(gpio+37) // Pull up/pull down
88 #define GPIO_PULLCLK0 *(gpio+38) // Pull up/pull down clock
93 uint32_t read8(uint32_t address);
94 void write8(uint32_t address, uint32_t data);
96 uint32_t read16(uint32_t address);
97 void write16(uint32_t address, uint32_t data);
99 void write32(uint32_t address, uint32_t data);
100 uint32_t read32(uint32_t address);
102 uint16_t read_reg(void);
103 void write_reg(unsigned int value);
105 volatile uint16_t srdata;
106 volatile uint32_t srdata2;
107 volatile uint32_t srdata2_old;
110 unsigned char g_ram[FASTSIZE+1]; /* RAM */
111 unsigned char toggle;
113 /* Signal Handler for SIGINT */
114 void sigint_handler(int sig_num)
116 /* Reset handler to catch SIGINT next time.
117 Refer http://en.cppreference.com/w/c/program/signal */
118 printf("\n User provided signal handler for Ctrl+C \n");
120 /* Do a graceful cleanup of the program like: free memory/resources/etc and exit */
125 void* iplThread(void *args){
128 //srdata2_old = read_reg();
132 //printf("thread!/n");
133 if (GET_GPIO(1) == 0){
135 if (srdata != srdata2_old){
136 srdata2 = ((srdata >> 13)&0xff);
137 //printf("STATUS: %d\n", srdata2);
138 srdata2_old = srdata;
139 m68k_set_irq(srdata2);
146 srdata2 = ((srdata >> 13)&0xff);
147 srdata2_old = srdata;
148 m68k_set_irq(srdata2);
151 //printf("STATUS: 0\n");
167 const struct sched_param priority = {99};
169 sched_setscheduler(0, SCHED_RR , &priority);
170 printf("YES locked in memory\n");
171 mlockall(MCL_CURRENT); // lock in memory to keep us from paging out
178 ide0 = ide_allocate("cf");
179 fd = open("hd0.img", O_RDWR);
181 printf("HDD Image hd0.image failed open\n");
183 ide_attach(ide0, 0, fd);
184 ide_reset_begin(ide0);
185 printf("HDD Image hd0.image attached\n");
188 signal(SIGINT, sigint_handler);
191 //Enable 200MHz CLK output on GPIO4, adjust divider and pll source depending on pi model
192 printf("Enable GPCLK0 on GPIO4\n");
194 *(gpclk+ (CLK_GP0_CTL/4)) = CLK_PASSWD | (1 << 5);
196 while ( (*(gpclk+(CLK_GP0_CTL/4))) & (1 << 7));
198 *(gpclk+(CLK_GP0_DIV/4)) = CLK_PASSWD | (6 << 12); //divider , 6=200MHz on pi3
200 *(gpclk+(CLK_GP0_CTL/4)) = CLK_PASSWD | 5 | (1 << 4); //pll? 6=plld, 5=pllc
202 while (((*(gpclk+(CLK_GP0_CTL/4))) & (1 << 7))== 0);
205 SET_GPIO_ALT(4,0); //gpclk0
215 //set gpio0 (aux0) and gpio1 (aux1) to input
219 // Set GPIO pins 6,7 and 8-23 to output
220 for (g=6; g<=23; g++)
225 printf ("Precalculate GPIO8-23 aus Output\n");
226 gpfsel0_o =*(gpio); //store gpio ddr
227 printf ("gpfsel0: %#x\n", gpfsel0_o);
228 gpfsel1_o =*(gpio+1); //store gpio ddr
229 printf ("gpfsel1: %#x\n", gpfsel1_o);
230 gpfsel2_o =*(gpio+2); //store gpio ddr
231 printf ("gpfsel2: %#x\n", gpfsel2_o);
233 // Set GPIO pins 8-23 to input
234 for (g=8; g<=23; g++)
238 printf ("Precalculate GPIO8-23 as Input\n");
239 gpfsel0 =*(gpio); //store gpio ddr
240 printf ("gpfsel0: %#x\n", gpfsel0);
241 gpfsel1 =*(gpio+1); //store gpio ddr
242 printf ("gpfsel1: %#x\n", gpfsel1);
243 gpfsel2 =*(gpio+2); //store gpio ddr
244 printf ("gpfsel2: %#x\n", gpfsel2);
253 //reset cpld statemachine first
262 write8(0xbfe201,0x0001); //AMIGA OVL
263 write8(0xbfe001,0x0001); //AMIGA OVL high (ROM@0x0)
268 m68k_set_cpu_type(M68K_CPU_TYPE_68EC030);
270 srdata2_old = read_reg();
271 printf("STATUS: %d\n", srdata2_old);
278 //err = pthread_create(&id, NULL, &iplThread, NULL);
280 printf("\ncan't create IPL thread :[%s]", strerror(err));
282 printf("\n IPL Thread created successfully\n");
290 //printf("IRQ:0x%06x\n",CheckIrq());
298 if (GET_GPIO(1) == 0 || CheckIrq() == 1){
300 // if (CheckIrq() == 1) srdata |= (1 << 14);
301 if (srdata != srdata2_old){
302 srdata2 = ((srdata >> 13)&0xff);
303 //printf("STATUS: %d\n", srdata2);
304 srdata2_old = srdata;
305 m68k_set_irq(srdata2);
312 srdata2 = ((srdata >> 13)&0xff);
313 srdata2_old = srdata;
314 m68k_set_irq(srdata2);
315 //printf("STATUS: 0\n");
327 void cpu_pulse_reset(void){
335 int cpu_irq_ack(int level)
337 printf("cpu irq ack\n");
343 unsigned int m68k_read_memory_8(unsigned int address){
345 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
346 return readGayleB(address);
349 if(address>FASTBASE){
350 return g_ram[address- FASTBASE];
353 return read8((uint32_t)address);
356 unsigned int m68k_read_memory_16(unsigned int address){
358 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
359 return readGayle(address);
362 if(address>FASTBASE){
363 uint16_t value = *(uint16_t*)&g_ram[address- FASTBASE];
364 value = (value << 8) | (value >> 8);
367 return (unsigned int)read16((uint32_t)address);
370 unsigned int m68k_read_memory_32(unsigned int address){
372 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
373 return readGayleL(address);
376 if(address>FASTBASE){
377 uint32_t value = *(uint32_t*)&g_ram[address- FASTBASE];
378 value = ((value << 8) & 0xFF00FF00 ) | ((value >> 8) & 0xFF00FF );
379 return value << 16 | value >> 16;
382 uint16_t a = read16(address);
383 uint16_t b = read16(address+2);
384 return (a << 16) | b;
387 void m68k_write_memory_8(unsigned int address, unsigned int value){
390 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
391 writeGayleB(address, value);
396 if(address>FASTBASE){
397 g_ram[address- FASTBASE] = value;
401 write8((uint32_t)address,value);
405 void m68k_write_memory_16(unsigned int address, unsigned int value){
406 // if (address==0xdff030) printf("%c", value);
408 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
409 writeGayle(address,value);
414 if(address>FASTBASE){
415 uint16_t* dest = (uint16_t*)&g_ram[address- FASTBASE];
416 value = (value << 8) | (value >> 8);
421 write16((uint32_t)address,value);
425 void m68k_write_memory_32(unsigned int address, unsigned int value){
428 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
429 writeGayleL(address, value);
432 if(address>FASTBASE){
433 uint32_t* dest = (uint32_t*)&g_ram[address- FASTBASE];
434 value = ((value << 8) & 0xFF00FF00 ) | ((value >> 8) & 0xFF00FF );
435 value = value << 16 | value >> 16;
440 write16(address , value >> 16);
441 write16(address+2 , value );
446 void write32(uint32_t address, uint32_t data){
447 write16(address+2 , data);
448 write16(address , data >>16 );
451 uint32_t read32(uint32_t address){
452 uint16_t a = read16(address+2);
453 uint16_t b = read16(address);
458 void write16(uint32_t address, uint32_t data)
460 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
461 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
462 uint32_t addr_l_s = (address >> 16) << 8;
463 uint32_t addr_l_r = (~address >> 16) << 8;
464 uint32_t data_s = (data & 0x0000ffff) << 8;
465 uint32_t data_r = (~data & 0x0000ffff) << 8;
467 // asm volatile ("dmb" ::: "memory");
470 *(gpio + 1) = gpfsel1_o;
471 *(gpio + 2) = gpfsel2_o;
473 *(gpio + 7) = addr_h_s;
474 *(gpio + 10) = addr_h_r;
478 *(gpio + 7) = addr_l_s;
479 *(gpio + 10) = addr_l_r;
484 *(gpio + 7) = data_s;
485 *(gpio + 10) = data_r;
490 *(gpio + 1) = gpfsel1;
491 *(gpio + 2) = gpfsel2;
492 while ((GET_GPIO(0)));
493 // asm volatile ("dmb" ::: "memory");
497 void write8(uint32_t address, uint32_t data)
500 if ((address & 1) == 0)
501 data = data + (data << 8); //EVEN, A0=0,UDS
502 else data = data & 0xff ; //ODD , A0=1,LDS
503 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
504 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
505 uint32_t addr_l_s = (address >> 16) << 8;
506 uint32_t addr_l_r = (~address >> 16) << 8;
507 uint32_t data_s = (data & 0x0000ffff) << 8;
508 uint32_t data_r = (~data & 0x0000ffff) << 8;
511 // asm volatile ("dmb" ::: "memory");
514 *(gpio + 1) = gpfsel1_o;
515 *(gpio + 2) = gpfsel2_o;
517 *(gpio + 7) = addr_h_s;
518 *(gpio + 10) = addr_h_r;
522 *(gpio + 7) = addr_l_s;
523 *(gpio + 10) = addr_l_r;
528 *(gpio + 7) = data_s;
529 *(gpio + 10) = data_r;
534 *(gpio + 1) = gpfsel1;
535 *(gpio + 2) = gpfsel2;
536 while ((GET_GPIO(0)));
537 // asm volatile ("dmb" ::: "memory");
542 uint32_t read16(uint32_t address)
545 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
546 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
547 uint32_t addr_l_s = (address >> 16) << 8;
548 uint32_t addr_l_r = (~address >> 16) << 8;
550 // asm volatile ("dmb" ::: "memory");
554 *(gpio + 1) = gpfsel1_o;
555 *(gpio + 2) = gpfsel2_o;
557 *(gpio + 7) = addr_h_s;
558 *(gpio + 10) = addr_h_r;
562 *(gpio + 7) = addr_l_s;
563 *(gpio + 10) = addr_l_r;
571 *(gpio + 1) = gpfsel1;
572 *(gpio + 2) = gpfsel2;
575 while (!(GET_GPIO(0)));
577 asm volatile ("nop" ::);
578 asm volatile ("nop" ::);
579 asm volatile ("nop" ::);
582 // asm volatile ("dmb" ::: "memory");
583 return (val >>8)&0xffff;
587 uint32_t read8(uint32_t address)
590 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
591 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
592 uint32_t addr_l_s = (address >> 16) << 8;
593 uint32_t addr_l_r = (~address >> 16) << 8;
595 // asm volatile ("dmb" ::: "memory");
598 *(gpio + 1) = gpfsel1_o;
599 *(gpio + 2) = gpfsel2_o;
601 *(gpio + 7) = addr_h_s;
602 *(gpio + 10) = addr_h_r;
606 *(gpio + 7) = addr_l_s;
607 *(gpio + 10) = addr_l_r;
614 *(gpio + 1) = gpfsel1;
615 *(gpio + 2) = gpfsel2;
618 while (!(GET_GPIO(0)));
620 asm volatile ("nop" ::);
621 asm volatile ("nop" ::);
622 asm volatile ("nop" ::);
625 // asm volatile ("dmb" ::: "memory");
627 val = (val >>8)&0xffff;
628 if ((address & 1) == 0)
629 val = (val >> 8) & 0xff ; //EVEN, A0=0,UDS
631 val = val & 0xff ; //ODD , A0=1,LDS
637 /******************************************************/
639 void write_reg(unsigned int value)
641 asm volatile ("dmb" ::: "memory");
643 asm volatile ("nop" ::);
644 asm volatile ("nop" ::);
645 asm volatile ("nop" ::);
646 //Write Status register
652 *(gpio + 1) = gpfsel1_o;
653 *(gpio + 2) = gpfsel2_o;
654 *(gpio + 7) = (value & 0xffff) << 8;
655 *(gpio + 10) = (~value & 0xffff) << 8;
657 GPIO_CLR = 1 << 7; //delay
662 *(gpio + 1) = gpfsel1;
663 *(gpio + 2) = gpfsel2;
664 asm volatile ("dmb" ::: "memory");
668 uint16_t read_reg(void)
672 asm volatile ("dmb" ::: "memory");
674 asm volatile ("nop" ::);
675 asm volatile ("nop" ::);
676 asm volatile ("nop" ::);
679 *(gpio + 1) = gpfsel1;
680 *(gpio + 2) = gpfsel2;
683 GPIO_CLR = 1 << 6; //delay
688 asm volatile ("dmb" ::: "memory");
690 return (uint16_t)(val >> 8);
695 // Set up a memory regions to access GPIO
700 if ((mem_fd = open("/dev/mem", O_RDWR|O_SYNC) ) < 0) {
701 printf("can't open /dev/mem \n");
707 NULL, //Any adddress in our space will do
708 BCM2708_PERI_SIZE, //Map length
709 PROT_READ|PROT_WRITE,// Enable reading & writting to mapped memory
710 MAP_SHARED, //Shared with other processes
711 mem_fd, //File to map
712 BCM2708_PERI_BASE //Offset to GPIO peripheral
715 close(mem_fd); //No need to keep mem_fd open after mmap
717 if (gpio_map == MAP_FAILED) {
718 printf("gpio mmap error %d\n", (int)gpio_map);//errno also set!
722 gpio = ((volatile unsigned *)gpio_map) + GPIO_ADDR/4;
723 gpclk = ((volatile unsigned *)gpio_map) + GPCLK_ADDR/4;