20 //#define BCM2708_PERI_BASE 0x20000000 //pi0-1
21 //#define BCM2708_PERI_BASE 0xFE000000 //pi4
22 #define BCM2708_PERI_BASE 0x3F000000 //pi3
23 #define BCM2708_PERI_SIZE 0x01000000
24 #define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO controller */
25 #define GPCLK_BASE (BCM2708_PERI_BASE + 0x101000)
26 #define GPIO_ADDR 0x200000 /* GPIO controller */
27 #define GPCLK_ADDR 0x101000
28 #define CLK_PASSWD 0x5a000000
29 #define CLK_GP0_CTL 0x070
30 #define CLK_GP0_DIV 0x074
36 #define STATUSREGADDR GPIO_CLR = 1<<SA0;GPIO_CLR = 1<<SA1;GPIO_SET = 1<<SA2;
37 #define W16 GPIO_CLR = 1<<SA0;GPIO_CLR = 1<<SA1;GPIO_CLR = 1<<SA2;
38 #define R16 GPIO_SET = 1<<SA0;GPIO_CLR = 1<<SA1;GPIO_CLR = 1<<SA2;
39 #define W8 GPIO_CLR = 1<<SA0;GPIO_SET = 1<<SA1;GPIO_CLR = 1<<SA2;
40 #define R8 GPIO_SET = 1<<SA0;GPIO_SET = 1<<SA1;GPIO_CLR = 1<<SA2;
42 #define PAGE_SIZE (4*1024)
43 #define BLOCK_SIZE (4*1024)
45 #define GPIOSET(no, ishigh) \
50 reset |= (1 << (no)); \
54 #define FASTBASE 0x07FFFFFF
55 #define FASTSIZE 0xFFFFFFF
56 #define GAYLEBASE 0xD80000 //D7FFFF
57 #define GAYLESIZE 0x6FFFF
59 #define KICKBASE 0xF80000
60 #define KICKSIZE 0x7FFFF
68 volatile unsigned int *gpio;
69 volatile unsigned int *gpclk;
70 volatile unsigned int gpfsel0;
71 volatile unsigned int gpfsel1;
72 volatile unsigned int gpfsel2;
73 volatile unsigned int gpfsel0_o;
74 volatile unsigned int gpfsel1_o;
75 volatile unsigned int gpfsel2_o;
77 // GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x) or SET_GPIO_ALT(x,y)
78 #define INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3))
79 #define OUT_GPIO(g) *(gpio+((g)/10)) |= (1<<(((g)%10)*3))
80 #define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3))
82 #define GPIO_SET *(gpio+7) // sets bits which are 1 ignores bits which are 0
83 #define GPIO_CLR *(gpio+10) // clears bits which are 1 ignores bits which are 0
85 #define GET_GPIO(g) (*(gpio+13)&(1<<g)) // 0 if LOW, (1<<g) if HIGH
87 #define GPIO_PULL *(gpio+37) // Pull up/pull down
88 #define GPIO_PULLCLK0 *(gpio+38) // Pull up/pull down clock
93 uint32_t read8(uint32_t address);
94 void write8(uint32_t address, uint32_t data);
96 uint32_t read16(uint32_t address);
97 void write16(uint32_t address, uint32_t data);
99 void write32(uint32_t address, uint32_t data);
100 uint32_t read32(uint32_t address);
102 uint16_t read_reg(void);
103 void write_reg(unsigned int value);
105 volatile uint16_t srdata;
106 volatile uint32_t srdata2;
107 volatile uint32_t srdata2_old;
110 unsigned char g_kick[524288];
111 unsigned char g_ram[FASTSIZE+1]; /* RAM */
112 unsigned char toggle;
113 static volatile unsigned char ovl;
114 static volatile unsigned char maprom;
117 /* Signal Handler for SIGINT */
118 void sigint_handler(int sig_num)
120 /* Reset handler to catch SIGINT next time.
121 Refer http://en.cppreference.com/w/c/program/signal */
122 printf("\n User provided signal handler for Ctrl+C \n");
124 /* Do a graceful cleanup of the program like: free memory/resources/etc and exit */
129 void* iplThread(void *args){
132 //srdata2_old = read_reg();
136 //printf("thread!/n");
137 if (GET_GPIO(1) == 0){
139 if (srdata != srdata2_old){
140 srdata2 = ((srdata >> 13)&0xff);
141 //printf("STATUS: %d\n", srdata2);
142 srdata2_old = srdata;
143 m68k_set_irq(srdata2);
150 srdata2 = ((srdata >> 13)&0xff);
151 srdata2_old = srdata;
152 m68k_set_irq(srdata2);
155 //printf("STATUS: 0\n");
171 const struct sched_param priority = {99};
173 sched_setscheduler(0, SCHED_RR , &priority);
174 printf("YES locked in memory\n");
175 mlockall(MCL_CURRENT); // lock in memory to keep us from paging out
182 ide0 = ide_allocate("cf");
183 fd = open("hd0.img", O_RDWR);
185 printf("HDD Image hd0.image failed open\n");
187 ide_attach(ide0, 0, fd);
188 ide_reset_begin(ide0);
189 printf("HDD Image hd0.image attached\n");
192 signal(SIGINT, sigint_handler);
195 //Enable 200MHz CLK output on GPIO4, adjust divider and pll source depending on pi model
196 printf("Enable GPCLK0 on GPIO4\n");
198 *(gpclk+ (CLK_GP0_CTL/4)) = CLK_PASSWD | (1 << 5);
200 while ( (*(gpclk+(CLK_GP0_CTL/4))) & (1 << 7));
202 *(gpclk+(CLK_GP0_DIV/4)) = CLK_PASSWD | (6 << 12); //divider , 6=200MHz on pi3
204 *(gpclk+(CLK_GP0_CTL/4)) = CLK_PASSWD | 5 | (1 << 4); //pll? 6=plld, 5=pllc
206 while (((*(gpclk+(CLK_GP0_CTL/4))) & (1 << 7))== 0);
209 SET_GPIO_ALT(4,0); //gpclk0
219 //set gpio0 (aux0) and gpio1 (aux1) to input
223 // Set GPIO pins 6,7 and 8-23 to output
224 for (g=6; g<=23; g++)
229 printf ("Precalculate GPIO8-23 aus Output\n");
230 gpfsel0_o =*(gpio); //store gpio ddr
231 printf ("gpfsel0: %#x\n", gpfsel0_o);
232 gpfsel1_o =*(gpio+1); //store gpio ddr
233 printf ("gpfsel1: %#x\n", gpfsel1_o);
234 gpfsel2_o =*(gpio+2); //store gpio ddr
235 printf ("gpfsel2: %#x\n", gpfsel2_o);
237 // Set GPIO pins 8-23 to input
238 for (g=8; g<=23; g++)
242 printf ("Precalculate GPIO8-23 as Input\n");
243 gpfsel0 =*(gpio); //store gpio ddr
244 printf ("gpfsel0: %#x\n", gpfsel0);
245 gpfsel1 =*(gpio+1); //store gpio ddr
246 printf ("gpfsel1: %#x\n", gpfsel1);
247 gpfsel2 =*(gpio+2); //store gpio ddr
248 printf ("gpfsel2: %#x\n", gpfsel2);
257 //reset cpld statemachine first
267 fp = fopen("kick.rom", "rb");
270 printf("kick.rom cannot be opened\n");
272 printf("kick.rom found, using that instead of motherboard rom\n");
275 unsigned int reads = fread(&g_kick, sizeof(g_kick), 1, fp);
277 printf("failed loading kick.rom\n");
279 printf("loaded kick.rom\n");
287 m68k_write_memory_8(0xbfe201,0x0001); //AMIGA OVL
288 m68k_write_memory_8(0xbfe001,0x0001); //AMIGA OVL high (ROM@0x0)
294 m68k_set_cpu_type(M68K_CPU_TYPE_68030);
296 srdata2_old = read_reg();
297 printf("STATUS: %d\n", srdata2_old);
303 //err = pthread_create(&id, NULL, &iplThread, NULL);
305 printf("\ncan't create IPL thread :[%s]", strerror(err));
307 printf("\n IPL Thread created successfully\n");
316 //printf("IRQ:0x%06x\n",CheckIrq());
319 //if (CheckIrq() == 1)
327 if (GET_GPIO(1) == 0){
329 m68k_set_irq((srdata >> 13)&0xff);
336 if (GET_GPIO(1) == 0 || CheckIrq() == 1){
338 // if (CheckIrq() == 1) srdata |= (1 << 14);
339 if (srdata != srdata2_old){
340 srdata2 = ((srdata >> 13)&0xff);
341 //printf("STATUS: %d\n", srdata2);
342 srdata2_old = srdata;
343 m68k_set_irq(srdata2);
350 srdata2 = ((srdata >> 13)&0xff);
351 srdata2_old = srdata;
352 m68k_set_irq(srdata2);
353 //printf("STATUS: 0\n");
367 void cpu_pulse_reset(void){
377 int cpu_irq_ack(int level)
379 printf("cpu irq ack\n");
385 unsigned int m68k_read_memory_8(unsigned int address){
387 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
388 return readGayleB(address);
391 if(address>FASTBASE){
392 return g_ram[address- FASTBASE];
396 if (ovl == 1 && address<KICKSIZE){
397 return g_kick[address];}
398 if (ovl == 0 && (address>KICKBASE && address<KICKBASE + KICKSIZE)){
399 return g_kick[address-KICKBASE];}
402 if (address < 0xffffff){
403 return read8((uint32_t)address);
409 unsigned int m68k_read_memory_16(unsigned int address){
411 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
412 return readGayle(address);
415 if(address>FASTBASE){
416 uint16_t value = *(uint16_t*)&g_ram[address- FASTBASE];
417 value = (value << 8) | (value >> 8);
422 if (ovl == 1 && address<KICKSIZE ){
423 uint16_t value = *(uint16_t*)&g_kick[address];
424 return (value << 8) | (value >> 8);}
425 if (ovl == 0 && (address>KICKBASE && address<KICKBASE + KICKSIZE)){
426 //printf("kread16 addr: %x\n",address);
427 uint16_t value = *(uint16_t*)&g_kick[address-KICKBASE];
428 return (value << 8) | (value >> 8);}
431 if (address < 0xffffff){
432 return (unsigned int)read16((uint32_t)address);
438 unsigned int m68k_read_memory_32(unsigned int address){
440 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
441 return readGayleL(address);
444 if(address>FASTBASE){
445 uint32_t value = *(uint32_t*)&g_ram[address- FASTBASE];
446 value = ((value << 8) & 0xFF00FF00 ) | ((value >> 8) & 0xFF00FF );
447 return value << 16 | value >> 16;
451 if (ovl == 1 && address<KICKSIZE){
452 uint32_t value = *(uint32_t*)&g_kick[address];
453 value = ((value << 8) & 0xFF00FF00 ) | ((value >> 8) & 0xFF00FF );
454 return value << 16 | value >> 16;}
456 if (ovl == 0 && (address>KICKBASE && address<KICKBASE + KICKSIZE)){
457 //printf("kread32/n");
458 uint32_t value = *(uint32_t*)&g_kick[address-KICKBASE];
459 value = ((value << 8) & 0xFF00FF00 ) | ((value >> 8) & 0xFF00FF );
460 return value << 16 | value >> 16;}
463 if (address < 0xffffff){
464 uint16_t a = read16(address);
465 uint16_t b = read16(address+2);
466 return (a << 16) | b;
472 void m68k_write_memory_8(unsigned int address, unsigned int value){
475 if (address == 0xbfe001){
476 ovl = (value & (1<<0));
477 printf("OVL:%x\n", ovl );
481 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
482 writeGayleB(address, value);
487 if(address>FASTBASE){
488 g_ram[address- FASTBASE] = value;
492 if (address < 0xffffff){
493 write8((uint32_t)address,value);
500 void m68k_write_memory_16(unsigned int address, unsigned int value){
501 // if (address==0xdff030) printf("%c", value);
503 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
504 writeGayle(address,value);
508 if (address == 0xbfe001)
509 printf("16CIA Output:%x\n", value );
512 if(address>FASTBASE){
513 uint16_t* dest = (uint16_t*)&g_ram[address- FASTBASE];
514 value = (value << 8) | (value >> 8);
519 if (address < 0xffffff){
520 write16((uint32_t)address,value);
526 void m68k_write_memory_32(unsigned int address, unsigned int value){
529 if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
530 writeGayleL(address, value);
533 if(address>FASTBASE){
534 uint32_t* dest = (uint32_t*)&g_ram[address- FASTBASE];
535 value = ((value << 8) & 0xFF00FF00 ) | ((value >> 8) & 0xFF00FF );
536 value = value << 16 | value >> 16;
541 if (address < 0xffffff){
542 write16(address , value >> 16);
543 write16(address+2 , value );
551 void write32(uint32_t address, uint32_t data){
552 write16(address+2 , data);
553 write16(address , data >>16 );
556 uint32_t read32(uint32_t address){
557 uint16_t a = read16(address+2);
558 uint16_t b = read16(address);
563 void write16(uint32_t address, uint32_t data)
565 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
566 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
567 uint32_t addr_l_s = (address >> 16) << 8;
568 uint32_t addr_l_r = (~address >> 16) << 8;
569 uint32_t data_s = (data & 0x0000ffff) << 8;
570 uint32_t data_r = (~data & 0x0000ffff) << 8;
572 // asm volatile ("dmb" ::: "memory");
575 *(gpio + 1) = gpfsel1_o;
576 *(gpio + 2) = gpfsel2_o;
578 *(gpio + 7) = addr_h_s;
579 *(gpio + 10) = addr_h_r;
583 *(gpio + 7) = addr_l_s;
584 *(gpio + 10) = addr_l_r;
589 *(gpio + 7) = data_s;
590 *(gpio + 10) = data_r;
595 *(gpio + 1) = gpfsel1;
596 *(gpio + 2) = gpfsel2;
597 while ((GET_GPIO(0)));
598 // asm volatile ("dmb" ::: "memory");
602 void write8(uint32_t address, uint32_t data)
605 if ((address & 1) == 0)
606 data = data + (data << 8); //EVEN, A0=0,UDS
607 else data = data & 0xff ; //ODD , A0=1,LDS
608 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
609 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
610 uint32_t addr_l_s = (address >> 16) << 8;
611 uint32_t addr_l_r = (~address >> 16) << 8;
612 uint32_t data_s = (data & 0x0000ffff) << 8;
613 uint32_t data_r = (~data & 0x0000ffff) << 8;
616 // asm volatile ("dmb" ::: "memory");
619 *(gpio + 1) = gpfsel1_o;
620 *(gpio + 2) = gpfsel2_o;
622 *(gpio + 7) = addr_h_s;
623 *(gpio + 10) = addr_h_r;
627 *(gpio + 7) = addr_l_s;
628 *(gpio + 10) = addr_l_r;
633 *(gpio + 7) = data_s;
634 *(gpio + 10) = data_r;
639 *(gpio + 1) = gpfsel1;
640 *(gpio + 2) = gpfsel2;
641 while ((GET_GPIO(0)));
642 // asm volatile ("dmb" ::: "memory");
647 uint32_t read16(uint32_t address)
650 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
651 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
652 uint32_t addr_l_s = (address >> 16) << 8;
653 uint32_t addr_l_r = (~address >> 16) << 8;
655 // asm volatile ("dmb" ::: "memory");
659 *(gpio + 1) = gpfsel1_o;
660 *(gpio + 2) = gpfsel2_o;
662 *(gpio + 7) = addr_h_s;
663 *(gpio + 10) = addr_h_r;
667 *(gpio + 7) = addr_l_s;
668 *(gpio + 10) = addr_l_r;
676 *(gpio + 1) = gpfsel1;
677 *(gpio + 2) = gpfsel2;
680 while (!(GET_GPIO(0)));
682 asm volatile ("nop" ::);
683 asm volatile ("nop" ::);
684 asm volatile ("nop" ::);
687 // asm volatile ("dmb" ::: "memory");
688 return (val >>8)&0xffff;
692 uint32_t read8(uint32_t address)
695 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
696 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
697 uint32_t addr_l_s = (address >> 16) << 8;
698 uint32_t addr_l_r = (~address >> 16) << 8;
700 // asm volatile ("dmb" ::: "memory");
703 *(gpio + 1) = gpfsel1_o;
704 *(gpio + 2) = gpfsel2_o;
706 *(gpio + 7) = addr_h_s;
707 *(gpio + 10) = addr_h_r;
711 *(gpio + 7) = addr_l_s;
712 *(gpio + 10) = addr_l_r;
719 *(gpio + 1) = gpfsel1;
720 *(gpio + 2) = gpfsel2;
723 while (!(GET_GPIO(0)));
725 asm volatile ("nop" ::);
726 asm volatile ("nop" ::);
727 asm volatile ("nop" ::);
730 // asm volatile ("dmb" ::: "memory");
732 val = (val >>8)&0xffff;
733 if ((address & 1) == 0)
734 val = (val >> 8) & 0xff ; //EVEN, A0=0,UDS
736 val = val & 0xff ; //ODD , A0=1,LDS
742 /******************************************************/
744 void write_reg(unsigned int value)
746 asm volatile ("dmb" ::: "memory");
748 asm volatile ("nop" ::);
749 asm volatile ("nop" ::);
750 asm volatile ("nop" ::);
751 //Write Status register
757 *(gpio + 1) = gpfsel1_o;
758 *(gpio + 2) = gpfsel2_o;
759 *(gpio + 7) = (value & 0xffff) << 8;
760 *(gpio + 10) = (~value & 0xffff) << 8;
762 GPIO_CLR = 1 << 7; //delay
767 *(gpio + 1) = gpfsel1;
768 *(gpio + 2) = gpfsel2;
769 asm volatile ("dmb" ::: "memory");
773 uint16_t read_reg(void)
777 asm volatile ("dmb" ::: "memory");
779 asm volatile ("nop" ::);
780 asm volatile ("nop" ::);
781 asm volatile ("nop" ::);
784 *(gpio + 1) = gpfsel1;
785 *(gpio + 2) = gpfsel2;
788 GPIO_CLR = 1 << 6; //delay
793 asm volatile ("dmb" ::: "memory");
795 return (uint16_t)(val >> 8);
800 // Set up a memory regions to access GPIO
805 if ((mem_fd = open("/dev/mem", O_RDWR|O_SYNC) ) < 0) {
806 printf("can't open /dev/mem \n");
812 NULL, //Any adddress in our space will do
813 BCM2708_PERI_SIZE, //Map length
814 PROT_READ|PROT_WRITE,// Enable reading & writting to mapped memory
815 MAP_SHARED, //Shared with other processes
816 mem_fd, //File to map
817 BCM2708_PERI_BASE //Offset to GPIO peripheral
820 close(mem_fd); //No need to keep mem_fd open after mmap
822 if (gpio_map == MAP_FAILED) {
823 printf("gpio mmap error %d\n", (int)gpio_map);//errno also set!
827 gpio = ((volatile unsigned *)gpio_map) + GPIO_ADDR/4;
828 gpclk = ((volatile unsigned *)gpio_map) + GPCLK_ADDR/4;