14 #include <sys/types.h>
16 #include <sys/ioctl.h>
21 #include "platforms/platforms.h"
22 #include "input/input.h"
24 //#define BCM2708_PERI_BASE 0x20000000 //pi0-1
25 //#define BCM2708_PERI_BASE 0xFE000000 //pi4
26 #define BCM2708_PERI_BASE 0x3F000000 // pi3
27 #define BCM2708_PERI_SIZE 0x01000000
28 #define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO controller */
29 #define GPCLK_BASE (BCM2708_PERI_BASE + 0x101000)
30 #define GPIO_ADDR 0x200000 /* GPIO controller */
31 #define GPCLK_ADDR 0x101000
32 #define CLK_PASSWD 0x5a000000
33 #define CLK_GP0_CTL 0x070
34 #define CLK_GP0_DIV 0x074
40 #define STATUSREGADDR \
41 GPIO_CLR = 1 << SA0; \
42 GPIO_CLR = 1 << SA1; \
45 GPIO_CLR = 1 << SA0; \
46 GPIO_CLR = 1 << SA1; \
49 GPIO_SET = 1 << SA0; \
50 GPIO_CLR = 1 << SA1; \
53 GPIO_CLR = 1 << SA0; \
54 GPIO_SET = 1 << SA1; \
57 GPIO_SET = 1 << SA0; \
58 GPIO_SET = 1 << SA1; \
61 #define PAGE_SIZE (4 * 1024)
62 #define BLOCK_SIZE (4 * 1024)
64 #define GPIOSET(no, ishigh) \
69 reset |= (1 << (no)); \
72 #define FASTBASE 0x07FFFFFF
73 #define FASTSIZE 0xFFFFFFF
74 #define GAYLEBASE 0xD80000 // D7FFFF
75 #define GAYLESIZE 0x6FFFF
77 #define JOY0DAT 0xDFF00A
78 #define JOY1DAT 0xDFF00C
79 #define CIAAPRA 0xBFE001
80 #define POTGOR 0xDFF016
82 int kb_hook_enabled = 0;
83 int mouse_hook_enabled = 0;
84 int cpu_emulation_running = 1;
86 char mouse_dx = 0, mouse_dy = 0;
87 char mouse_buttons = 0;
89 #define KICKBASE 0xF80000
90 #define KICKSIZE 0x7FFFF
92 int mem_fd, mouse_fd = -1, keyboard_fd = -1;
94 int gayle_emulation_enabled = 1;
98 // Configurable emulator options
99 unsigned int cpu_type = M68K_CPU_TYPE_68000;
100 unsigned int loop_cycles = 300;
101 struct emulator_config *cfg = NULL;
102 char keyboard_file[256] = "/dev/input/event1";
105 volatile unsigned int *gpio;
106 volatile unsigned int *gpclk;
107 volatile unsigned int gpfsel0;
108 volatile unsigned int gpfsel1;
109 volatile unsigned int gpfsel2;
110 volatile unsigned int gpfsel0_o;
111 volatile unsigned int gpfsel1_o;
112 volatile unsigned int gpfsel2_o;
114 // GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x) or
116 #define INP_GPIO(g) *(gpio + ((g) / 10)) &= ~(7 << (((g) % 10) * 3))
117 #define OUT_GPIO(g) *(gpio + ((g) / 10)) |= (1 << (((g) % 10) * 3))
118 #define SET_GPIO_ALT(g, a) \
119 *(gpio + (((g) / 10))) |= \
120 (((a) <= 3 ? (a) + 4 : (a) == 4 ? 3 : 2) << (((g) % 10) * 3))
123 *(gpio + 7) // sets bits which are 1 ignores bits which are 0
125 *(gpio + 10) // clears bits which are 1 ignores bits which are 0
127 #define GET_GPIO(g) (*(gpio + 13) & (1 << g)) // 0 if LOW, (1<<g) if HIGH
129 #define GPIO_PULL *(gpio + 37) // Pull up/pull down
130 #define GPIO_PULLCLK0 *(gpio + 38) // Pull up/pull down clock
134 uint32_t read8(uint32_t address);
135 void write8(uint32_t address, uint32_t data);
137 uint32_t read16(uint32_t address);
138 void write16(uint32_t address, uint32_t data);
140 void write32(uint32_t address, uint32_t data);
141 uint32_t read32(uint32_t address);
143 uint16_t read_reg(void);
144 void write_reg(unsigned int value);
146 volatile uint16_t srdata;
147 volatile uint32_t srdata2;
148 volatile uint32_t srdata2_old;
150 //unsigned char g_kick[524288];
151 //unsigned char g_ram[FASTSIZE + 1]; /* RAM */
152 unsigned char toggle;
153 static volatile unsigned char ovl;
154 static volatile unsigned char maprom;
156 void sigint_handler(int sig_num) {
158 //cpu_emulation_running = 0;
161 printf("Received sigint %d, exiting.\n", sig_num);
170 void *iplThread(void *args) {
171 printf("IPL thread running/n");
175 if (GET_GPIO(1) == 0) {
177 m68k_end_timeslice();
178 //printf("thread!/n");
187 int main(int argc, char *argv[]) {
189 const struct sched_param priority = {99};
191 // Some command line switch stuffles
192 for (g = 1; g < argc; g++) {
193 if (strcmp(argv[g], "--disable-gayle") == 0) {
194 gayle_emulation_enabled = 0;
196 else if (strcmp(argv[g], "--cpu_type") == 0 || strcmp(argv[g], "--cpu") == 0) {
198 printf("%s switch found, but no CPU type specified.\n", argv[g]);
201 cpu_type = get_m68k_cpu_type(argv[g]);
204 else if (strcmp(argv[g], "--config-file") == 0 || strcmp(argv[g], "--config") == 0) {
206 printf("%s switch found, but no config filename specified.\n", argv[g]);
209 cfg = load_config_file(argv[g]);
215 printf("No config file specified. Trying to load default.cfg...\n");
216 cfg = load_config_file("default.cfg");
218 printf("Couldn't load default.cfg, empty emulator config will be used.\n");
219 cfg = (struct emulator_config *)calloc(1, sizeof(struct emulator_config));
221 printf("Failed to allocate memory for emulator config!\n");
224 memset(cfg, 0x00, sizeof(struct emulator_config));
229 if (cfg->cpu_type) cpu_type = cfg->cpu_type;
230 if (cfg->loop_cycles) loop_cycles = cfg->loop_cycles;
233 cfg->platform = make_platform_config("none", "generic");
234 cfg->platform->platform_initial_setup(cfg);
237 if (cfg->mouse_enabled) {
238 mouse_fd = open(cfg->mouse_file, O_RDONLY | O_NONBLOCK);
239 if (mouse_fd == -1) {
240 printf("Failed to open %s, can't enable mouse hook.\n", cfg->mouse_file);
241 cfg->mouse_enabled = 0;
245 keyboard_fd = open(keyboard_file, O_RDONLY | O_NONBLOCK);
246 if (keyboard_fd == -1) {
247 printf("Failed to open keyboard event source.\n");
250 sched_setscheduler(0, SCHED_FIFO, &priority);
251 mlockall(MCL_CURRENT); // lock in memory to keep us from paging out
255 signal(SIGINT, sigint_handler);
258 //goto skip_everything;
260 // Enable 200MHz CLK output on GPIO4, adjust divider and pll source depending
262 printf("Enable 200MHz GPCLK0 on GPIO4\n");
264 *(gpclk + (CLK_GP0_CTL / 4)) = CLK_PASSWD | (1 << 5);
266 while ((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7))
269 *(gpclk + (CLK_GP0_DIV / 4)) =
270 CLK_PASSWD | (6 << 12); // divider , 6=200MHz on pi3
272 *(gpclk + (CLK_GP0_CTL / 4)) =
273 CLK_PASSWD | 5 | (1 << 4); // pll? 6=plld, 5=pllc
275 while (((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7)) == 0)
279 SET_GPIO_ALT(4, 0); // gpclk0
289 // set gpio0 (aux0) and gpio1 (aux1) to input
293 // Set GPIO pins 6,7 and 8-23 to output
294 for (g = 6; g <= 23; g++) {
298 printf("Precalculate GPIO8-23 as Output\n");
299 gpfsel0_o = *(gpio); // store gpio ddr
300 printf("gpfsel0: %#x\n", gpfsel0_o);
301 gpfsel1_o = *(gpio + 1); // store gpio ddr
302 printf("gpfsel1: %#x\n", gpfsel1_o);
303 gpfsel2_o = *(gpio + 2); // store gpio ddr
304 printf("gpfsel2: %#x\n", gpfsel2_o);
306 // Set GPIO pins 8-23 to input
307 for (g = 8; g <= 23; g++) {
310 printf("Precalculate GPIO8-23 as Input\n");
311 gpfsel0 = *(gpio); // store gpio ddr
312 printf("gpfsel0: %#x\n", gpfsel0);
313 gpfsel1 = *(gpio + 1); // store gpio ddr
314 printf("gpfsel1: %#x\n", gpfsel1);
315 gpfsel2 = *(gpio + 2); // store gpio ddr
316 printf("gpfsel2: %#x\n", gpfsel2);
325 // reset cpld statemachine first
333 // reset amiga and statemachine
337 m68k_write_memory_8(0xbfe201, 0x0001); // AMIGA OVL
338 m68k_write_memory_8(0xbfe001, 0x0001); // AMIGA OVL high (ROM@0x0)
343 printf("Setting CPU type to %d.\n", cpu_type);
344 m68k_set_cpu_type(cpu_type);
348 m68k_set_reg(M68K_REG_PC, 0xF80002);
350 m68k_set_reg(M68K_REG_PC, 0x0);
356 err = pthread_create(&id, NULL, &iplThread, NULL);
358 printf("\ncan't create IPL thread :[%s]", strerror(err));
360 printf("\n IPL Thread created successfully\n");
366 if (mouse_hook_enabled) {
367 if (get_mouse_status(&mouse_dx, &mouse_dy, &mouse_buttons)) {
368 //printf("Maus: %d (%.2X), %d (%.2X), B:%.2X\n", mouse_dx, mouse_dx, mouse_dy, mouse_dy, mouse_buttons);
372 if (cpu_emulation_running)
373 m68k_execute(loop_cycles);
375 // FIXME: Rework this to use keyboard events instead.
376 while (get_key_char(&c)) {
377 if (c == cfg->keyboard_toggle_key && !kb_hook_enabled) {
379 printf("Keyboard hook enabled.\n");
381 else if (c == 0x1B && kb_hook_enabled) {
383 printf("Keyboard hook disabled.\n");
385 if (!kb_hook_enabled) {
386 if (c == cfg->mouse_toggle_key) {
387 mouse_hook_enabled ^= 1;
388 printf("Mouse hook %s.\n", mouse_hook_enabled ? "enabled" : "disabled");
389 mouse_dx = mouse_dy = mouse_buttons = 0;
392 cpu_emulation_running ^= 1;
393 printf("CPU emulation is now %s\n", cpu_emulation_running ? "running" : "stopped");
398 printf("CPU emulation reset.\n");
401 printf("Quitting and exiting emulator.\n");
402 goto stop_cpu_emulation;
409 m68k_set_irq((srdata >> 13) & 0xff);
417 if (GET_GPIO(1) == 0) {
419 m68k_set_irq((srdata >> 13) & 0xff);
421 if (CheckIrq() == 1) {
422 write16(0xdff09c, 0x8008);
441 void cpu_pulse_reset(void) {
443 // printf("Status Reg%x\n",read_reg());
446 // printf("Status Reg%x\n",read_reg());
449 int cpu_irq_ack(int level) {
450 printf("cpu irq ack\n");
454 static unsigned int target = 0;
456 unsigned int m68k_read_memory_8(unsigned int address) {
457 if (cfg->platform->custom_read && cfg->platform->custom_read(cfg, address, &target, OP_TYPE_BYTE) != -1) {
462 int ret = handle_mapped_read(cfg, address, &target, OP_TYPE_BYTE, ovl);
468 // if (address < 0xffffff) {
469 return read8((uint32_t)address);
475 unsigned int m68k_read_memory_16(unsigned int address) {
476 if (cfg->platform->custom_read && cfg->platform->custom_read(cfg, address, &target, OP_TYPE_WORD) != -1) {
481 int ret = handle_mapped_read(cfg, address, &target, OP_TYPE_WORD, ovl);
486 if (mouse_hook_enabled) {
487 if (address == JOY0DAT) {
488 // Forward mouse valueses to Amyga.
489 unsigned short result = (mouse_dy << 8) | (mouse_dx);
490 mouse_dx = mouse_dy = 0;
491 return (unsigned int)result;
493 if (address == CIAAPRA) {
494 unsigned short result = (unsigned int)read16((uint32_t)address);
495 if (mouse_buttons & 0x01) {
497 return (unsigned int)(result | 0x40);
500 return (unsigned int)result;
502 if (address == POTGOR) {
503 unsigned short result = (unsigned int)read16((uint32_t)address);
504 if (mouse_buttons & 0x02) {
506 return (unsigned int)(result | 0x2);
509 return (unsigned int)result;
513 // if (address < 0xffffff) {
515 return (unsigned int)read16((uint32_t)address);
521 unsigned int m68k_read_memory_32(unsigned int address) {
522 if (cfg->platform->custom_read && cfg->platform->custom_read(cfg, address, &target, OP_TYPE_LONGWORD) != -1) {
527 int ret = handle_mapped_read(cfg, address, &target, OP_TYPE_LONGWORD, ovl);
532 // if (address < 0xffffff) {
534 uint16_t a = read16(address);
535 uint16_t b = read16(address + 2);
536 return (a << 16) | b;
542 void m68k_write_memory_8(unsigned int address, unsigned int value) {
543 if (cfg->platform->custom_write && cfg->platform->custom_write(cfg, address, value, OP_TYPE_BYTE) != -1) {
548 int ret = handle_mapped_write(cfg, address, value, OP_TYPE_BYTE, ovl);
553 if (address == 0xbfe001) {
554 ovl = (value & (1 << 0));
555 printf("OVL:%x\n", ovl);
558 // if (address < 0xffffff) {
560 write8((uint32_t)address, value);
567 void m68k_write_memory_16(unsigned int address, unsigned int value) {
568 if (cfg->platform->custom_write && cfg->platform->custom_write(cfg, address, value, OP_TYPE_WORD) != -1) {
573 int ret = handle_mapped_write(cfg, address, value, OP_TYPE_WORD, ovl);
578 // if (address < 0xffffff) {
580 write16((uint32_t)address, value);
586 void m68k_write_memory_32(unsigned int address, unsigned int value) {
587 if (cfg->platform->custom_write && cfg->platform->custom_write(cfg, address, value, OP_TYPE_LONGWORD) != -1) {
592 int ret = handle_mapped_write(cfg, address, value, OP_TYPE_LONGWORD, ovl);
597 // if (address < 0xffffff) {
599 write16(address, value >> 16);
600 write16(address + 2, value);
607 void write16(uint32_t address, uint32_t data) {
608 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
609 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
610 uint32_t addr_l_s = (address >> 16) << 8;
611 uint32_t addr_l_r = (~address >> 16) << 8;
612 uint32_t data_s = (data & 0x0000ffff) << 8;
613 uint32_t data_r = (~data & 0x0000ffff) << 8;
615 // asm volatile ("dmb" ::: "memory");
618 *(gpio + 1) = gpfsel1_o;
619 *(gpio + 2) = gpfsel2_o;
621 *(gpio + 7) = addr_h_s;
622 *(gpio + 10) = addr_h_r;
626 *(gpio + 7) = addr_l_s;
627 *(gpio + 10) = addr_l_r;
632 *(gpio + 7) = data_s;
633 *(gpio + 10) = data_r;
638 *(gpio + 1) = gpfsel1;
639 *(gpio + 2) = gpfsel2;
640 while ((GET_GPIO(0)))
642 // asm volatile ("dmb" ::: "memory");
645 void write8(uint32_t address, uint32_t data) {
646 if ((address & 1) == 0)
647 data = data + (data << 8); // EVEN, A0=0,UDS
649 data = data & 0xff; // ODD , A0=1,LDS
650 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
651 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
652 uint32_t addr_l_s = (address >> 16) << 8;
653 uint32_t addr_l_r = (~address >> 16) << 8;
654 uint32_t data_s = (data & 0x0000ffff) << 8;
655 uint32_t data_r = (~data & 0x0000ffff) << 8;
657 // asm volatile ("dmb" ::: "memory");
660 *(gpio + 1) = gpfsel1_o;
661 *(gpio + 2) = gpfsel2_o;
663 *(gpio + 7) = addr_h_s;
664 *(gpio + 10) = addr_h_r;
668 *(gpio + 7) = addr_l_s;
669 *(gpio + 10) = addr_l_r;
674 *(gpio + 7) = data_s;
675 *(gpio + 10) = data_r;
680 *(gpio + 1) = gpfsel1;
681 *(gpio + 2) = gpfsel2;
682 while ((GET_GPIO(0)))
684 // asm volatile ("dmb" ::: "memory");
687 uint32_t read16(uint32_t address) {
689 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
690 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
691 uint32_t addr_l_s = (address >> 16) << 8;
692 uint32_t addr_l_r = (~address >> 16) << 8;
694 // asm volatile ("dmb" ::: "memory");
697 *(gpio + 1) = gpfsel1_o;
698 *(gpio + 2) = gpfsel2_o;
700 *(gpio + 7) = addr_h_s;
701 *(gpio + 10) = addr_h_r;
705 *(gpio + 7) = addr_l_s;
706 *(gpio + 10) = addr_l_r;
712 *(gpio + 1) = gpfsel1;
713 *(gpio + 2) = gpfsel2;
715 while (!(GET_GPIO(0)))
720 // asm volatile ("dmb" ::: "memory");
721 return (val >> 8) & 0xffff;
724 uint32_t read8(uint32_t address) {
726 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
727 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
728 uint32_t addr_l_s = (address >> 16) << 8;
729 uint32_t addr_l_r = (~address >> 16) << 8;
731 // asm volatile ("dmb" ::: "memory");
734 *(gpio + 1) = gpfsel1_o;
735 *(gpio + 2) = gpfsel2_o;
737 *(gpio + 7) = addr_h_s;
738 *(gpio + 10) = addr_h_r;
742 *(gpio + 7) = addr_l_s;
743 *(gpio + 10) = addr_l_r;
749 *(gpio + 1) = gpfsel1;
750 *(gpio + 2) = gpfsel2;
753 while (!(GET_GPIO(0)))
758 // asm volatile ("dmb" ::: "memory");
760 val = (val >> 8) & 0xffff;
761 if ((address & 1) == 0)
762 return (val >> 8) & 0xff; // EVEN, A0=0,UDS
764 return val & 0xff; // ODD , A0=1,LDS
767 /******************************************************/
769 void write_reg(unsigned int value) {
772 *(gpio + 1) = gpfsel1_o;
773 *(gpio + 2) = gpfsel2_o;
774 *(gpio + 7) = (value & 0xffff) << 8;
775 *(gpio + 10) = (~value & 0xffff) << 8;
777 GPIO_CLR = 1 << 7; // delay
782 *(gpio + 1) = gpfsel1;
783 *(gpio + 2) = gpfsel2;
786 uint16_t read_reg(void) {
791 *(gpio + 1) = gpfsel1;
792 *(gpio + 2) = gpfsel2;
794 GPIO_CLR = 1 << 6; // delay
799 return (uint16_t)(val >> 8);
803 // Set up a memory regions to access GPIO
807 if ((mem_fd = open("/dev/mem", O_RDWR | O_SYNC)) < 0) {
808 printf("can't open /dev/mem \n");
814 NULL, // Any adddress in our space will do
815 BCM2708_PERI_SIZE, // Map length
816 PROT_READ | PROT_WRITE, // Enable reading & writting to mapped memory
817 MAP_SHARED, // Shared with other processes
818 mem_fd, // File to map
819 BCM2708_PERI_BASE // Offset to GPIO peripheral
822 close(mem_fd); // No need to keep mem_fd open after mmap
824 if (gpio_map == MAP_FAILED) {
825 printf("gpio mmap error %d\n", (int)gpio_map); // errno also set!
829 gpio = ((volatile unsigned *)gpio_map) + GPIO_ADDR / 4;
830 gpclk = ((volatile unsigned *)gpio_map) + GPCLK_ADDR / 4;