14 #include <sys/types.h>
21 //#define BCM2708_PERI_BASE 0x20000000 //pi0-1
22 //#define BCM2708_PERI_BASE 0xFE000000 //pi4
23 #define BCM2708_PERI_BASE 0x3F000000 // pi3
24 #define BCM2708_PERI_SIZE 0x01000000
25 #define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO controller */
26 #define GPCLK_BASE (BCM2708_PERI_BASE + 0x101000)
27 #define GPIO_ADDR 0x200000 /* GPIO controller */
28 #define GPCLK_ADDR 0x101000
29 #define CLK_PASSWD 0x5a000000
30 #define CLK_GP0_CTL 0x070
31 #define CLK_GP0_DIV 0x074
37 #define STATUSREGADDR \
38 GPIO_CLR = 1 << SA0; \
39 GPIO_CLR = 1 << SA1; \
42 GPIO_CLR = 1 << SA0; \
43 GPIO_CLR = 1 << SA1; \
46 GPIO_SET = 1 << SA0; \
47 GPIO_CLR = 1 << SA1; \
50 GPIO_CLR = 1 << SA0; \
51 GPIO_SET = 1 << SA1; \
54 GPIO_SET = 1 << SA0; \
55 GPIO_SET = 1 << SA1; \
58 #define PAGE_SIZE (4 * 1024)
59 #define BLOCK_SIZE (4 * 1024)
61 #define GPIOSET(no, ishigh) \
66 reset |= (1 << (no)); \
69 #define FASTBASE 0x07FFFFFF
70 #define FASTSIZE 0xFFFFFFF
71 #define GAYLEBASE 0xD80000 // D7FFFF
72 #define GAYLESIZE 0x6FFFF
74 #define KICKBASE 0xF80000
75 #define KICKSIZE 0x7FFFF
83 volatile unsigned int *gpio;
84 volatile unsigned int *gpclk;
85 volatile unsigned int gpfsel0;
86 volatile unsigned int gpfsel1;
87 volatile unsigned int gpfsel2;
88 volatile unsigned int gpfsel0_o;
89 volatile unsigned int gpfsel1_o;
90 volatile unsigned int gpfsel2_o;
92 // GPIO setup macros. Always use INP_GPIO(x) before using OUT_GPIO(x) or
94 #define INP_GPIO(g) *(gpio + ((g) / 10)) &= ~(7 << (((g) % 10) * 3))
95 #define OUT_GPIO(g) *(gpio + ((g) / 10)) |= (1 << (((g) % 10) * 3))
96 #define SET_GPIO_ALT(g, a) \
97 *(gpio + (((g) / 10))) |= \
98 (((a) <= 3 ? (a) + 4 : (a) == 4 ? 3 : 2) << (((g) % 10) * 3))
101 *(gpio + 7) // sets bits which are 1 ignores bits which are 0
103 *(gpio + 10) // clears bits which are 1 ignores bits which are 0
105 #define GET_GPIO(g) (*(gpio + 13) & (1 << g)) // 0 if LOW, (1<<g) if HIGH
107 #define GPIO_PULL *(gpio + 37) // Pull up/pull down
108 #define GPIO_PULLCLK0 *(gpio + 38) // Pull up/pull down clock
112 uint32_t read8(uint32_t address);
113 void write8(uint32_t address, uint32_t data);
115 uint32_t read16(uint32_t address);
116 void write16(uint32_t address, uint32_t data);
118 void write32(uint32_t address, uint32_t data);
119 uint32_t read32(uint32_t address);
121 uint16_t read_reg(void);
122 void write_reg(unsigned int value);
124 volatile uint16_t srdata;
125 volatile uint32_t srdata2;
126 volatile uint32_t srdata2_old;
128 unsigned char g_kick[524288];
129 unsigned char g_ram[FASTSIZE + 1]; /* RAM */
130 unsigned char toggle;
131 static volatile unsigned char ovl;
132 static volatile unsigned char maprom;
134 void sigint_handler(int sig_num) {
135 printf("\n Exit Ctrl+C %d\n", sig_num);
139 void *iplThread(void *args) {
140 printf("IPL thread running/n");
144 if (GET_GPIO(1) == 0){
146 m68k_end_timeslice();
147 //printf("thread!/n");
158 const struct sched_param priority = {99};
160 sched_setscheduler(0, SCHED_FIFO, &priority);
161 mlockall(MCL_CURRENT); // lock in memory to keep us from paging out
165 signal(SIGINT, sigint_handler);
168 // Enable 200MHz CLK output on GPIO4, adjust divider and pll source depending
170 printf("Enable 200MHz GPCLK0 on GPIO4\n");
172 *(gpclk + (CLK_GP0_CTL / 4)) = CLK_PASSWD | (1 << 5);
174 while ((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7))
177 *(gpclk + (CLK_GP0_DIV / 4)) =
178 CLK_PASSWD | (6 << 12); // divider , 6=200MHz on pi3
180 *(gpclk + (CLK_GP0_CTL / 4)) =
181 CLK_PASSWD | 5 | (1 << 4); // pll? 6=plld, 5=pllc
183 while (((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7)) == 0)
187 SET_GPIO_ALT(4, 0); // gpclk0
197 // set gpio0 (aux0) and gpio1 (aux1) to input
201 // Set GPIO pins 6,7 and 8-23 to output
202 for (g = 6; g <= 23; g++) {
206 printf("Precalculate GPIO8-23 as Output\n");
207 gpfsel0_o = *(gpio); // store gpio ddr
208 printf("gpfsel0: %#x\n", gpfsel0_o);
209 gpfsel1_o = *(gpio + 1); // store gpio ddr
210 printf("gpfsel1: %#x\n", gpfsel1_o);
211 gpfsel2_o = *(gpio + 2); // store gpio ddr
212 printf("gpfsel2: %#x\n", gpfsel2_o);
214 // Set GPIO pins 8-23 to input
215 for (g = 8; g <= 23; g++) {
218 printf("Precalculate GPIO8-23 as Input\n");
219 gpfsel0 = *(gpio); // store gpio ddr
220 printf("gpfsel0: %#x\n", gpfsel0);
221 gpfsel1 = *(gpio + 1); // store gpio ddr
222 printf("gpfsel1: %#x\n", gpfsel1);
223 gpfsel2 = *(gpio + 2); // store gpio ddr
224 printf("gpfsel2: %#x\n", gpfsel2);
233 // reset cpld statemachine first
241 // load kick.rom if present
244 fd = open("kick.rom", O_RDONLY);
246 printf("Failed loading kick.rom, using motherboard kickstart\n");
249 int size = (int)lseek(fd, 0, SEEK_END);
250 if (size == 0x40000) {
251 lseek(fd, 0, SEEK_SET);
252 read(fd, &g_kick, size);
253 lseek(fd, 0, SEEK_SET);
254 read(fd, &g_kick[0x40000], size);
256 lseek(fd, 0, SEEK_SET);
257 read(fd, &g_kick, size);
259 printf("Loaded kick.rom with size %d kib\n", size / 1024);
262 // reset amiga and statemachine
265 m68k_write_memory_8(0xbfe201, 0x0001); // AMIGA OVL
266 m68k_write_memory_8(0xbfe001, 0x0001); // AMIGA OVL high (ROM@0x0)
271 m68k_set_cpu_type(M68K_CPU_TYPE_68030);
275 m68k_set_reg(M68K_REG_PC, 0xF80002);
277 m68k_set_reg(M68K_REG_PC, 0x0);
283 err = pthread_create(&id, NULL, &iplThread, NULL);
285 printf("\ncan't create IPL thread :[%s]", strerror(err));
287 printf("\n IPL Thread created successfully\n");
297 m68k_set_irq((srdata >> 13) & 0xff);
305 if (GET_GPIO(1) == 0){
307 m68k_set_irq((srdata >> 13) & 0xff);
309 // if (CheckIrq() == 1)
320 void cpu_pulse_reset(void) {
322 // printf("Status Reg%x\n",read_reg());
325 // printf("Status Reg%x\n",read_reg());
328 int cpu_irq_ack(int level) {
329 printf("cpu irq ack\n");
333 unsigned int m68k_read_memory_8(unsigned int address) {
334 if (address > FASTBASE && address < FASTBASE + FASTSIZE) {
335 return g_ram[address - FASTBASE];
339 if (address > KICKBASE && address < KICKBASE + KICKSIZE) {
340 return g_kick[address - KICKBASE];
344 if (address > GAYLEBASE && address < GAYLEBASE + GAYLESIZE) {
345 return readGayleB(address);
349 // if (address < 0xffffff) {
350 return read8((uint32_t)address);
356 unsigned int m68k_read_memory_16(unsigned int address) {
357 if (address > FASTBASE && address < FASTBASE + FASTSIZE) {
358 return be16toh(*(uint16_t *)&g_ram[address - FASTBASE]);
362 if (address > KICKBASE && address < KICKBASE + KICKSIZE) {
363 return be16toh(*(uint16_t *)&g_kick[address - KICKBASE]);
367 if (address > GAYLEBASE && address < GAYLEBASE + GAYLESIZE) {
368 return readGayle(address);
371 // if (address < 0xffffff) {
373 return (unsigned int)read16((uint32_t)address);
379 unsigned int m68k_read_memory_32(unsigned int address) {
380 if (address > FASTBASE && address < FASTBASE + FASTSIZE) {
381 return be32toh(*(uint32_t *)&g_ram[address - FASTBASE]);
385 if (address > KICKBASE && address < KICKBASE + KICKSIZE) {
386 return be32toh(*(uint32_t *)&g_kick[address - KICKBASE]);
390 if (address > GAYLEBASE && address < GAYLEBASE + GAYLESIZE) {
391 return readGayleL(address);
394 // if (address < 0xffffff) {
396 uint16_t a = read16(address);
397 uint16_t b = read16(address + 2);
398 return (a << 16) | b;
404 void m68k_write_memory_8(unsigned int address, unsigned int value) {
405 if (address > FASTBASE && address < FASTBASE + FASTSIZE) {
406 g_ram[address - FASTBASE] = value;
410 if (address > GAYLEBASE && address < GAYLEBASE + GAYLESIZE) {
411 writeGayleB(address, value);
415 if (address == 0xbfe001) {
416 ovl = (value & (1 << 0));
417 printf("OVL:%x\n", ovl);
420 // if (address < 0xffffff) {
422 write8((uint32_t)address, value);
429 void m68k_write_memory_16(unsigned int address, unsigned int value) {
430 if (address > FASTBASE && address < FASTBASE + FASTSIZE) {
431 *(uint16_t *)&g_ram[address - FASTBASE] = htobe16(value);
435 if (address > GAYLEBASE && address < GAYLEBASE + GAYLESIZE) {
436 writeGayle(address, value);
440 // if (address < 0xffffff) {
442 write16((uint32_t)address, value);
448 void m68k_write_memory_32(unsigned int address, unsigned int value) {
449 if (address > FASTBASE && address < FASTBASE + FASTSIZE) {
450 *(uint32_t *)&g_ram[address - FASTBASE] = htobe32(value);
454 if (address > GAYLEBASE && address < GAYLEBASE + GAYLESIZE) {
455 writeGayleL(address, value);
458 // if (address < 0xffffff) {
460 write16(address, value >> 16);
461 write16(address + 2, value);
468 void write16(uint32_t address, uint32_t data) {
469 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
470 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
471 uint32_t addr_l_s = (address >> 16) << 8;
472 uint32_t addr_l_r = (~address >> 16) << 8;
473 uint32_t data_s = (data & 0x0000ffff) << 8;
474 uint32_t data_r = (~data & 0x0000ffff) << 8;
476 // asm volatile ("dmb" ::: "memory");
479 *(gpio + 1) = gpfsel1_o;
480 *(gpio + 2) = gpfsel2_o;
482 *(gpio + 7) = addr_h_s;
483 *(gpio + 10) = addr_h_r;
487 *(gpio + 7) = addr_l_s;
488 *(gpio + 10) = addr_l_r;
493 *(gpio + 7) = data_s;
494 *(gpio + 10) = data_r;
499 *(gpio + 1) = gpfsel1;
500 *(gpio + 2) = gpfsel2;
501 while ((GET_GPIO(0)))
503 // asm volatile ("dmb" ::: "memory");
506 void write8(uint32_t address, uint32_t data) {
507 if ((address & 1) == 0)
508 data = data + (data << 8); // EVEN, A0=0,UDS
510 data = data & 0xff; // ODD , A0=1,LDS
511 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
512 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
513 uint32_t addr_l_s = (address >> 16) << 8;
514 uint32_t addr_l_r = (~address >> 16) << 8;
515 uint32_t data_s = (data & 0x0000ffff) << 8;
516 uint32_t data_r = (~data & 0x0000ffff) << 8;
518 // asm volatile ("dmb" ::: "memory");
521 *(gpio + 1) = gpfsel1_o;
522 *(gpio + 2) = gpfsel2_o;
524 *(gpio + 7) = addr_h_s;
525 *(gpio + 10) = addr_h_r;
529 *(gpio + 7) = addr_l_s;
530 *(gpio + 10) = addr_l_r;
535 *(gpio + 7) = data_s;
536 *(gpio + 10) = data_r;
541 *(gpio + 1) = gpfsel1;
542 *(gpio + 2) = gpfsel2;
543 while ((GET_GPIO(0)))
545 // asm volatile ("dmb" ::: "memory");
548 uint32_t read16(uint32_t address) {
550 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
551 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
552 uint32_t addr_l_s = (address >> 16) << 8;
553 uint32_t addr_l_r = (~address >> 16) << 8;
555 // asm volatile ("dmb" ::: "memory");
558 *(gpio + 1) = gpfsel1_o;
559 *(gpio + 2) = gpfsel2_o;
561 *(gpio + 7) = addr_h_s;
562 *(gpio + 10) = addr_h_r;
566 *(gpio + 7) = addr_l_s;
567 *(gpio + 10) = addr_l_r;
573 *(gpio + 1) = gpfsel1;
574 *(gpio + 2) = gpfsel2;
576 while (!(GET_GPIO(0)))
581 // asm volatile ("dmb" ::: "memory");
582 return (val >> 8) & 0xffff;
585 uint32_t read8(uint32_t address) {
587 uint32_t addr_h_s = (address & 0x0000ffff) << 8;
588 uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
589 uint32_t addr_l_s = (address >> 16) << 8;
590 uint32_t addr_l_r = (~address >> 16) << 8;
592 // asm volatile ("dmb" ::: "memory");
595 *(gpio + 1) = gpfsel1_o;
596 *(gpio + 2) = gpfsel2_o;
598 *(gpio + 7) = addr_h_s;
599 *(gpio + 10) = addr_h_r;
603 *(gpio + 7) = addr_l_s;
604 *(gpio + 10) = addr_l_r;
610 *(gpio + 1) = gpfsel1;
611 *(gpio + 2) = gpfsel2;
614 while (!(GET_GPIO(0)))
619 // asm volatile ("dmb" ::: "memory");
621 val = (val >> 8) & 0xffff;
622 if ((address & 1) == 0)
623 return (val >> 8) & 0xff; // EVEN, A0=0,UDS
625 return val & 0xff; // ODD , A0=1,LDS
628 /******************************************************/
630 void write_reg(unsigned int value) {
633 *(gpio + 1) = gpfsel1_o;
634 *(gpio + 2) = gpfsel2_o;
635 *(gpio + 7) = (value & 0xffff) << 8;
636 *(gpio + 10) = (~value & 0xffff) << 8;
638 GPIO_CLR = 1 << 7; // delay
643 *(gpio + 1) = gpfsel1;
644 *(gpio + 2) = gpfsel2;
647 uint16_t read_reg(void) {
652 *(gpio + 1) = gpfsel1;
653 *(gpio + 2) = gpfsel2;
655 GPIO_CLR = 1 << 6; // delay
660 return (uint16_t)(val >> 8);
664 // Set up a memory regions to access GPIO
668 if ((mem_fd = open("/dev/mem", O_RDWR | O_SYNC)) < 0) {
669 printf("can't open /dev/mem \n");
675 NULL, // Any adddress in our space will do
676 BCM2708_PERI_SIZE, // Map length
677 PROT_READ | PROT_WRITE, // Enable reading & writting to mapped memory
678 MAP_SHARED, // Shared with other processes
679 mem_fd, // File to map
680 BCM2708_PERI_BASE // Offset to GPIO peripheral
683 close(mem_fd); // No need to keep mem_fd open after mmap
685 if (gpio_map == MAP_FAILED) {
686 printf("gpio mmap error %d\n", (int)gpio_map); // errno also set!
690 gpio = ((volatile unsigned *)gpio_map) + GPIO_ADDR / 4;
691 gpclk = ((volatile unsigned *)gpio_map) + GPCLK_ADDR / 4;