11 #include "../platforms/amiga/Gayle.h"
12 #include "../platforms/amiga/gayle-ide/ide.h"
16 volatile unsigned int *gpio;
17 volatile unsigned int *gpclk;
18 volatile unsigned int gpfsel0;
19 volatile unsigned int gpfsel1;
20 volatile unsigned int gpfsel2;
21 volatile unsigned int gpfsel0_o;
22 volatile unsigned int gpfsel1_o;
23 volatile unsigned int gpfsel2_o;
25 volatile uint16_t srdata;
26 volatile uint32_t srdata2;
27 volatile uint32_t srdata2_old;
29 extern int mem_fd, mouse_fd, keyboard_fd;
30 extern int mem_fd_gpclk;
39 inline void write16(uint32_t address, uint32_t data) {
40 // asm volatile ("dmb" ::: "memory");
43 *(gpio + 1) = gpfsel1_o;
44 *(gpio + 2) = gpfsel2_o;
46 *(gpio + 7) = ((address & 0x0000ffff) << 8);
47 *(gpio + 10) = ((~address & 0x0000ffff) << 8);
51 *(gpio + 7) = ((address >> 16) << 8);
52 *(gpio + 10) = ((~address >> 16) << 8);
57 *(gpio + 7) = ((data & 0x0000ffff) << 8);
58 *(gpio + 10) = ((~data & 0x0000ffff) << 8);
63 *(gpio + 1) = gpfsel1;
64 *(gpio + 2) = gpfsel2;
67 // asm volatile ("dmb" ::: "memory");
70 inline void write8(uint32_t address, uint32_t data) {
71 if ((address & 1) == 0)
72 data = data + (data << 8); // EVEN, A0=0,UDS
74 data = data & 0xff; // ODD , A0=1,LDS
76 // asm volatile ("dmb" ::: "memory");
79 *(gpio + 1) = gpfsel1_o;
80 *(gpio + 2) = gpfsel2_o;
82 *(gpio + 7) = ((address & 0x0000ffff) << 8);
83 *(gpio + 10) = ((~address & 0x0000ffff) << 8);
87 *(gpio + 7) = ((address >> 16) << 8);
88 *(gpio + 10) = ((~address >> 16) << 8);
93 *(gpio + 7) = ((data & 0x0000ffff) << 8);
94 *(gpio + 10) = ((~data & 0x0000ffff) << 8);
99 *(gpio + 1) = gpfsel1;
100 *(gpio + 2) = gpfsel2;
101 while ((GET_GPIO(0)))
103 // asm volatile ("dmb" ::: "memory");
106 inline uint32_t read16(uint32_t address) {
108 // asm volatile ("dmb" ::: "memory");
111 *(gpio + 1) = gpfsel1_o;
112 *(gpio + 2) = gpfsel2_o;
114 *(gpio + 7) = ((address & 0x0000ffff) << 8);
115 *(gpio + 10) = ((~address & 0x0000ffff) << 8);
119 *(gpio + 7) = ((address >> 16) << 8);
120 *(gpio + 10) = ((~address >> 16) << 8);
126 *(gpio + 1) = gpfsel1;
127 *(gpio + 2) = gpfsel2;
129 while (!(GET_GPIO(0)))
134 // asm volatile ("dmb" ::: "memory");
135 return (val >> 8) & 0xffff;
138 inline uint32_t read8(uint32_t address) {
140 // asm volatile ("dmb" ::: "memory");
143 *(gpio + 1) = gpfsel1_o;
144 *(gpio + 2) = gpfsel2_o;
146 *(gpio + 7) = ((address & 0x0000ffff) << 8);
147 *(gpio + 10) = ((~address & 0x0000ffff) << 8);
151 *(gpio + 7) = ((address >> 16) << 8);
152 *(gpio + 10) = ((~address >> 16) << 8);
158 *(gpio + 1) = gpfsel1;
159 *(gpio + 2) = gpfsel2;
162 while (!(GET_GPIO(0)))
167 // asm volatile ("dmb" ::: "memory");
169 val = (val >> 8) & 0xffff;
170 if ((address & 1) == 0)
171 return (val >> 8) & 0xff; // EVEN, A0=0,UDS
173 return val & 0xff; // ODD , A0=1,LDS
176 /******************************************************/
178 void write_reg(unsigned int value) {
181 *(gpio + 1) = gpfsel1_o;
182 *(gpio + 2) = gpfsel2_o;
183 *(gpio + 7) = (value & 0xffff) << 8;
184 *(gpio + 10) = (~value & 0xffff) << 8;
186 GPIO_CLR = 1 << 7; // delay
191 *(gpio + 1) = gpfsel1;
192 *(gpio + 2) = gpfsel2;
195 uint16_t read_reg(void) {
200 *(gpio + 1) = gpfsel1;
201 *(gpio + 2) = gpfsel2;
203 GPIO_CLR = 1 << 6; // delay
208 return (uint16_t)(val >> 8);
212 // Set up a memory regions to access GPIO
216 if ((mem_fd = open("/dev/mem", O_RDWR | O_SYNC)) < 0) {
217 printf("can't open /dev/mem \n");
223 NULL, // Any adddress in our space will do
224 BCM2708_PERI_SIZE, // Map length
225 PROT_READ | PROT_WRITE, // Enable reading & writting to mapped memory
226 MAP_SHARED, // Shared with other processes
227 mem_fd, // File to map
228 BCM2708_PERI_BASE // Offset to GPIO peripheral
231 close(mem_fd); // No need to keep mem_fd open after mmap
233 if (gpio_map == MAP_FAILED) {
234 printf("gpio mmap error %d\n", (int)gpio_map); // errno also set!
238 gpio = ((volatile unsigned *)gpio_map) + GPIO_ADDR / 4;
239 gpclk = ((volatile unsigned *)gpio_map) + GPCLK_ADDR / 4;
243 void gpio_enable_200mhz() {
244 *(gpclk + (CLK_GP0_CTL / 4)) = CLK_PASSWD | (1 << 5);
246 while ((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7))
249 *(gpclk + (CLK_GP0_DIV / 4)) =
250 CLK_PASSWD | (6 << 12); // divider , 6=200MHz on pi3
252 *(gpclk + (CLK_GP0_CTL / 4)) =
253 CLK_PASSWD | 5 | (1 << 4); // pll? 6=plld, 5=pllc
255 while (((*(gpclk + (CLK_GP0_CTL / 4))) & (1 << 7)) == 0)
259 SET_GPIO_ALT(4, 0); // gpclk0
269 // set gpio0 (aux0) and gpio1 (aux1) to input
273 // Set GPIO pins 6,7 and 8-23 to output
274 for (g = 6; g <= 23; g++) {
278 printf("Precalculate GPIO8-23 as Output\n");
279 gpfsel0_o = *(gpio); // store gpio ddr
280 printf("gpfsel0: %#x\n", gpfsel0_o);
281 gpfsel1_o = *(gpio + 1); // store gpio ddr
282 printf("gpfsel1: %#x\n", gpfsel1_o);
283 gpfsel2_o = *(gpio + 2); // store gpio ddr
284 printf("gpfsel2: %#x\n", gpfsel2_o);
286 // Set GPIO pins 8-23 to input
287 for (g = 8; g <= 23; g++) {
290 printf("Precalculate GPIO8-23 as Input\n");
291 gpfsel0 = *(gpio); // store gpio ddr
292 printf("gpfsel0: %#x\n", gpfsel0);
293 gpfsel1 = *(gpio + 1); // store gpio ddr
294 printf("gpfsel1: %#x\n", gpfsel1);
295 gpfsel2 = *(gpio + 2); // store gpio ddr
296 printf("gpfsel2: %#x\n", gpfsel2);
306 inline void gpio_handle_irq() {
307 if (GET_GPIO(1) == 0) {
309 m68k_set_irq((srdata >> 13) & 0xff);
311 if ((gayle_int & 0x80) && get_ide(0)->drive->intrq) {
312 write16(0xdff09c, 0x8008);
320 inline int gpio_get_irq() {
321 return (GET_GPIO(1));
326 void *iplThread(void *args) {
327 printf("IPL thread running/n");
331 if (GET_GPIO(1) == 0) {
333 m68k_end_timeslice();
334 //printf("thread!/n");