2 * Copyright (c) 2008 Siarhei Siamashka <ssvb@users.sourceforge.net>
4 * This file is part of FFmpeg.
6 * FFmpeg is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * FFmpeg is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with FFmpeg; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
25 * VFP is a floating point coprocessor used in some ARM cores. VFP11 has 1 cycle
26 * throughput for almost all the instructions (except for double precision
27 * arithmetics), but rather high latency. Latency is 4 cycles for loads and 8 cycles
28 * for arithmetic operations. Scheduling code to avoid pipeline stalls is very
29 * important for performance. One more interesting feature is that VFP has
30 * independent load/store and arithmetics pipelines, so it is possible to make
31 * them work simultaneously and get more than 1 operation per cycle. Load/store
32 * pipeline can process 2 single precision floating point values per cycle and
33 * supports bulk loads and stores for large sets of registers. Arithmetic operations
34 * can be done on vectors, which allows to keep the arithmetics pipeline busy,
35 * while the processor may issue and execute other instructions. Detailed
36 * optimization manuals can be found at http://www.arm.com
40 * ARM VFP optimized implementation of 'vector_fmul_c' function.
41 * Assume that len is a positive number and is multiple of 8
43 @ void ff_vector_fmul_vfp(float *dst, const float *src0, const float *src1, int len)
44 function ff_vector_fmul_vfp, export=1
47 orr r12, r12, #(3 << 16) /* set vector size to 4 */
59 vldmiage r1!, {s16-s19}
60 vldmiage r2!, {s24-s27}
61 vldmiage r1!, {s20-s23}
62 vldmiage r2!, {s28-s31}
64 vmulge.f32 s24, s16, s24
68 vmulge.f32 s28, s20, s28
71 vldmiagt r2!, {s8-s11}
73 vldmiagt r2!, {s12-s15}
76 vstmiage r0!, {s24-s27}
77 vstmiage r0!, {s28-s31}
80 bic r12, r12, #(7 << 16) /* set vector size back to 1 */
87 * ARM VFP optimized implementation of 'vector_fmul_reverse_c' function.
88 * Assume that len is a positive number and is multiple of 8
90 @ void ff_vector_fmul_reverse_vfp(float *dst, const float *src0,
91 @ const float *src1, int len)
92 function ff_vector_fmul_reverse_vfp, export=1
94 add r2, r2, r3, lsl #2
101 vmul.f32 s10, s1, s10
102 vmul.f32 s11, s0, s11
106 vldmdbge r2!, {s16-s19}
107 vmul.f32 s12, s7, s12
109 vldmiage r1!, {s24-s27}
110 vmul.f32 s13, s6, s13
112 vldmdbge r2!, {s20-s23}
113 vmul.f32 s14, s5, s14
115 vldmiage r1!, {s28-s31}
116 vmul.f32 s15, s4, s15
118 vmulge.f32 s24, s19, s24
120 vldmdbgt r2!, {s0-s3}
122 vmulge.f32 s25, s18, s25
125 vmulge.f32 s26, s17, s26
127 vldmiagt r1!, {s8-s11}
129 vmulge.f32 s27, s16, s27
130 vmulge.f32 s28, s23, s28
132 vldmdbgt r2!, {s4-s7}
134 vmulge.f32 s29, s22, s29
135 vstmia r0!, {s14-s15}
137 vmulge.f32 s30, s21, s30
138 vmulge.f32 s31, s20, s31
139 vmulge.f32 s8, s3, s8
141 vldmiagt r1!, {s12-s15}
143 vmulge.f32 s9, s2, s9
144 vmulge.f32 s10, s1, s10
145 vstmiage r0!, {s24-s27}
146 vmulge.f32 s11, s0, s11
148 vstmiage r0!, {s28-s31}