2 * ARM NEON optimised Format Conversion Utils
3 * Copyright (c) 2008 Mans Rullgard <mans@mansr.com>
5 * This file is part of FFmpeg.
7 * FFmpeg is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * FFmpeg is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with FFmpeg; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
23 #include "libavutil/arm/asm.S"
27 function ff_float_to_int16_neon, export=1
29 vld1.64 {d0-d1}, [r1,:128]!
30 vcvt.s32.f32 q8, q0, #16
31 vld1.64 {d2-d3}, [r1,:128]!
32 vcvt.s32.f32 q9, q1, #16
38 vld1.64 {d0-d1}, [r1,:128]!
39 vcvt.s32.f32 q0, q0, #16
41 vld1.64 {d2-d3}, [r1,:128]!
42 vcvt.s32.f32 q1, q1, #16
44 vst1.64 {d4-d5}, [r0,:128]!
46 vld1.64 {d16-d17},[r1,:128]!
47 vcvt.s32.f32 q8, q8, #16
48 vld1.64 {d18-d19},[r1,:128]!
49 vcvt.s32.f32 q9, q9, #16
50 vst1.64 {d6-d7}, [r0,:128]!
54 2: vld1.64 {d0-d1}, [r1,:128]!
56 vcvt.s32.f32 q0, q0, #16
57 vld1.64 {d2-d3}, [r1,:128]!
59 vcvt.s32.f32 q1, q1, #16
61 vst1.64 {d4-d5}, [r0,:128]!
63 vst1.64 {d6-d7}, [r0,:128]!
65 3: vshrn.s32 d4, q8, #16
67 vst1.64 {d4-d5}, [r0,:128]!
71 function ff_float_to_int16_interleave_neon, export=1
75 blt ff_float_to_int16_neon
82 vld1.64 {d0-d1}, [r3,:128]!
83 vcvt.s32.f32 q8, q0, #16
84 vld1.64 {d2-d3}, [r3,:128]!
85 vcvt.s32.f32 q9, q1, #16
86 vld1.64 {d20-d21},[r1,:128]!
87 vcvt.s32.f32 q10, q10, #16
88 vld1.64 {d22-d23},[r1,:128]!
89 vcvt.s32.f32 q11, q11, #16
94 vld1.64 {d0-d1}, [r3,:128]!
95 vcvt.s32.f32 q0, q0, #16
97 vld1.64 {d2-d3}, [r3,:128]!
98 vcvt.s32.f32 q1, q1, #16
99 vld1.64 {d24-d25},[r1,:128]!
100 vcvt.s32.f32 q12, q12, #16
101 vld1.64 {d26-d27},[r1,:128]!
103 vst1.64 {d20-d21},[r0,:128]!
104 vcvt.s32.f32 q13, q13, #16
105 vst1.64 {d22-d23},[r0,:128]!
107 vld1.64 {d16-d17},[r3,:128]!
109 vst1.64 {d24-d25},[r0,:128]!
110 vcvt.s32.f32 q8, q8, #16
111 vld1.64 {d18-d19},[r3,:128]!
112 vcvt.s32.f32 q9, q9, #16
113 vld1.64 {d20-d21},[r1,:128]!
114 vcvt.s32.f32 q10, q10, #16
115 vld1.64 {d22-d23},[r1,:128]!
116 vcvt.s32.f32 q11, q11, #16
117 vst1.64 {d26-d27},[r0,:128]!
121 2: vsri.32 q10, q8, #16
122 vld1.64 {d0-d1}, [r3,:128]!
123 vcvt.s32.f32 q0, q0, #16
124 vld1.64 {d2-d3}, [r3,:128]!
125 vcvt.s32.f32 q1, q1, #16
126 vld1.64 {d24-d25},[r1,:128]!
127 vcvt.s32.f32 q12, q12, #16
129 vld1.64 {d26-d27},[r1,:128]!
130 vcvt.s32.f32 q13, q13, #16
131 vst1.64 {d20-d21},[r0,:128]!
133 vst1.64 {d22-d23},[r0,:128]!
135 vst1.64 {d24-d27},[r0,:128]!
137 3: vsri.32 q10, q8, #16
139 vst1.64 {d20-d23},[r0,:128]!
148 5: ldmia r1!, {r4-r7}
151 vld1.64 {d16-d17},[r4,:128]!
152 vcvt.s32.f32 q8, q8, #16
153 vld1.64 {d18-d19},[r5,:128]!
154 vcvt.s32.f32 q9, q9, #16
155 vld1.64 {d20-d21},[r6,:128]!
156 vcvt.s32.f32 q10, q10, #16
157 vld1.64 {d22-d23},[r7,:128]!
158 vcvt.s32.f32 q11, q11, #16
160 vld1.64 {d0-d1}, [r4,:128]!
161 vcvt.s32.f32 q0, q0, #16
163 vld1.64 {d2-d3}, [r5,:128]!
164 vcvt.s32.f32 q1, q1, #16
165 vsri.32 q11, q10, #16
166 vld1.64 {d4-d5}, [r6,:128]!
167 vcvt.s32.f32 q2, q2, #16
169 vld1.64 {d6-d7}, [r7,:128]!
170 vcvt.s32.f32 q3, q3, #16
172 vst1.64 {d18}, [r8], ip
174 vst1.64 {d22}, [r8], ip
176 vst1.64 {d19}, [r8], ip
178 vst1.64 {d23}, [r8], ip
181 vld1.64 {d16-d17},[r4,:128]!
182 vcvt.s32.f32 q8, q8, #16
183 vst1.64 {d2}, [r8], ip
184 vld1.64 {d18-d19},[r5,:128]!
185 vcvt.s32.f32 q9, q9, #16
186 vst1.64 {d6}, [r8], ip
187 vld1.64 {d20-d21},[r6,:128]!
188 vcvt.s32.f32 q10, q10, #16
189 vst1.64 {d3}, [r8], ip
190 vld1.64 {d22-d23},[r7,:128]!
191 vcvt.s32.f32 q11, q11, #16
192 vst1.64 {d7}, [r8], ip
194 7: vst1.64 {d2}, [r8], ip
195 vst1.64 {d6}, [r8], ip
196 vst1.64 {d3}, [r8], ip
197 vst1.64 {d7}, [r8], ip
212 vld1.64 {d16-d17},[r4,:128]!
213 vcvt.s32.f32 q8, q8, #16
214 vld1.64 {d18-d19},[r5,:128]!
215 vcvt.s32.f32 q9, q9, #16
216 vld1.64 {d20-d21},[r4,:128]!
217 vcvt.s32.f32 q10, q10, #16
218 vld1.64 {d22-d23},[r5,:128]!
219 vcvt.s32.f32 q11, q11, #16
223 vsri.32 d18, d16, #16
224 vsri.32 d19, d17, #16
225 vld1.64 {d16-d17},[r4,:128]!
226 vcvt.s32.f32 q8, q8, #16
227 vst1.32 {d18[0]}, [r8], ip
228 vsri.32 d22, d20, #16
229 vst1.32 {d18[1]}, [r8], ip
230 vsri.32 d23, d21, #16
231 vst1.32 {d19[0]}, [r8], ip
232 vst1.32 {d19[1]}, [r8], ip
233 vld1.64 {d18-d19},[r5,:128]!
234 vcvt.s32.f32 q9, q9, #16
235 vst1.32 {d22[0]}, [r8], ip
236 vst1.32 {d22[1]}, [r8], ip
237 vld1.64 {d20-d21},[r4,:128]!
238 vcvt.s32.f32 q10, q10, #16
239 vst1.32 {d23[0]}, [r8], ip
240 vst1.32 {d23[1]}, [r8], ip
241 vld1.64 {d22-d23},[r5,:128]!
242 vcvt.s32.f32 q11, q11, #16
244 vld1.64 {d0-d1}, [r4,:128]!
245 vcvt.s32.f32 q0, q0, #16
246 vsri.32 d18, d16, #16
247 vld1.64 {d2-d3}, [r5,:128]!
248 vcvt.s32.f32 q1, q1, #16
249 vsri.32 d19, d17, #16
250 vld1.64 {d4-d5}, [r4,:128]!
251 vcvt.s32.f32 q2, q2, #16
252 vld1.64 {d6-d7}, [r5,:128]!
253 vcvt.s32.f32 q3, q3, #16
254 vst1.32 {d18[0]}, [r8], ip
255 vsri.32 d22, d20, #16
256 vst1.32 {d18[1]}, [r8], ip
257 vsri.32 d23, d21, #16
258 vst1.32 {d19[0]}, [r8], ip
260 vst1.32 {d19[1]}, [r8], ip
262 vst1.32 {d22[0]}, [r8], ip
264 vst1.32 {d22[1]}, [r8], ip
266 vst1.32 {d23[0]}, [r8], ip
267 vst1.32 {d23[1]}, [r8], ip
269 vld1.64 {d16-d17},[r4,:128]!
270 vcvt.s32.f32 q8, q8, #16
271 vst1.32 {d2[0]}, [r8], ip
272 vst1.32 {d2[1]}, [r8], ip
273 vld1.64 {d18-d19},[r5,:128]!
274 vcvt.s32.f32 q9, q9, #16
275 vst1.32 {d3[0]}, [r8], ip
276 vst1.32 {d3[1]}, [r8], ip
277 vld1.64 {d20-d21},[r4,:128]!
278 vcvt.s32.f32 q10, q10, #16
279 vst1.32 {d6[0]}, [r8], ip
280 vst1.32 {d6[1]}, [r8], ip
281 vld1.64 {d22-d23},[r5,:128]!
282 vcvt.s32.f32 q11, q11, #16
283 vst1.32 {d7[0]}, [r8], ip
284 vst1.32 {d7[1]}, [r8], ip
286 6: vst1.32 {d2[0]}, [r8], ip
287 vst1.32 {d2[1]}, [r8], ip
288 vst1.32 {d3[0]}, [r8], ip
289 vst1.32 {d3[1]}, [r8], ip
290 vst1.32 {d6[0]}, [r8], ip
291 vst1.32 {d6[1]}, [r8], ip
292 vst1.32 {d7[0]}, [r8], ip
293 vst1.32 {d7[1]}, [r8], ip
295 7: vsri.32 d18, d16, #16
296 vsri.32 d19, d17, #16
297 vst1.32 {d18[0]}, [r8], ip
298 vsri.32 d22, d20, #16
299 vst1.32 {d18[1]}, [r8], ip
300 vsri.32 d23, d21, #16
301 vst1.32 {d19[0]}, [r8], ip
302 vst1.32 {d19[1]}, [r8], ip
303 vst1.32 {d22[0]}, [r8], ip
304 vst1.32 {d22[1]}, [r8], ip
305 vst1.32 {d23[0]}, [r8], ip
306 vst1.32 {d23[1]}, [r8], ip
317 vld1.64 {d0-d1}, [r4,:128]!
318 vcvt.s32.f32 q0, q0, #16
319 vld1.64 {d2-d3}, [r4,:128]!
320 vcvt.s32.f32 q1, q1, #16
323 vld1.64 {d4-d5}, [r4,:128]!
324 vcvt.s32.f32 q2, q2, #16
325 vld1.64 {d6-d7}, [r4,:128]!
326 vcvt.s32.f32 q3, q3, #16
327 vst1.16 {d0[1]}, [r5,:16], ip
328 vst1.16 {d0[3]}, [r5,:16], ip
329 vst1.16 {d1[1]}, [r5,:16], ip
330 vst1.16 {d1[3]}, [r5,:16], ip
331 vst1.16 {d2[1]}, [r5,:16], ip
332 vst1.16 {d2[3]}, [r5,:16], ip
333 vst1.16 {d3[1]}, [r5,:16], ip
334 vst1.16 {d3[3]}, [r5,:16], ip
336 vld1.64 {d0-d1}, [r4,:128]!
337 vcvt.s32.f32 q0, q0, #16
338 vld1.64 {d2-d3}, [r4,:128]!
339 vcvt.s32.f32 q1, q1, #16
340 7: vst1.16 {d4[1]}, [r5,:16], ip
341 vst1.16 {d4[3]}, [r5,:16], ip
342 vst1.16 {d5[1]}, [r5,:16], ip
343 vst1.16 {d5[3]}, [r5,:16], ip
344 vst1.16 {d6[1]}, [r5,:16], ip
345 vst1.16 {d6[3]}, [r5,:16], ip
346 vst1.16 {d7[1]}, [r5,:16], ip
347 vst1.16 {d7[3]}, [r5,:16], ip
351 vst1.16 {d0[1]}, [r5,:16], ip
352 vst1.16 {d0[3]}, [r5,:16], ip
353 vst1.16 {d1[1]}, [r5,:16], ip
354 vst1.16 {d1[3]}, [r5,:16], ip
355 vst1.16 {d2[1]}, [r5,:16], ip
356 vst1.16 {d2[3]}, [r5,:16], ip
357 vst1.16 {d3[1]}, [r5,:16], ip
358 vst1.16 {d3[3]}, [r5,:16], ip
361 vld1.64 {d0-d1}, [r4,:128]!
362 vcvt.s32.f32 q0, q0, #16
363 vld1.64 {d2-d3}, [r4,:128]!
364 vcvt.s32.f32 q1, q1, #16
368 function ff_int32_to_float_fmul_scalar_neon, export=1
369 VFP vdup.32 q0, d0[0]
374 vld1.32 {q1},[r1,:128]!
376 vld1.32 {q2},[r1,:128]!
383 vld1.32 {q1},[r1,:128]!
385 vld1.32 {q2},[r1,:128]!
387 vst1.32 {q9}, [r0,:128]!
388 vst1.32 {q10},[r0,:128]!
390 2: vst1.32 {q9}, [r0,:128]!
391 vst1.32 {q10},[r0,:128]!