4 * Copyright (c) 2001 Michael Niedermayer <michaelni@gmx.at>
5 * Copyright (c) 2007 Mans Rullgard <mans@mansr.com>
7 * This file is part of FFmpeg.
9 * FFmpeg is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Lesser General Public
11 * License as published by the Free Software Foundation; either
12 * version 2.1 of the License, or (at your option) any later version.
14 * FFmpeg is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * Lesser General Public License for more details.
19 * You should have received a copy of the GNU Lesser General Public
20 * License along with FFmpeg; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
24 #include "libavutil/arm/asm.S"
26 #define W1 22725 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
27 #define W2 21407 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
28 #define W3 19266 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
29 #define W4 16383 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
30 #define W5 12873 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
31 #define W6 8867 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
32 #define W7 4520 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
36 #define W13 (W1 | (W3 << 16))
37 #define W26 (W2 | (W6 << 16))
38 #define W42 (W4 | (W2 << 16))
39 #define W42n (-W4&0xffff | (-W2 << 16))
40 #define W46 (W4 | (W6 << 16))
41 #define W57 (W5 | (W7 << 16))
53 Compute partial IDCT of single row.
54 shift = left-shift amount
56 r2 = row[2,0] <= 2 cycles
60 Output in registers r4--r11
63 ldr lr, w46 /* lr = W4 | (W6 << 16) */
64 mov r1, #(1<<(\shift-1))
67 ldr ip, w13 /* ip = W1 | (W3 << 16) */
68 ldr r10,w57 /* r10 = W5 | (W7 << 16) */
72 smuad r8, r3, ip /* r8 = B0 = W1*row[1] + W3*row[3] */
73 smusdx r11,r3, r10 /* r11 = B3 = W7*row[1] - W5*row[3] */
74 ldr lr, [r0, #12] /* lr = row[7,5] */
75 pkhtb r2, ip, r10,asr #16 /* r3 = W7 | (W3 << 16) */
76 pkhbt r1, ip, r10,lsl #16 /* r1 = W1 | (W5 << 16) */
77 smusdx r9, r2, r3 /* r9 = -B1 = W7*row[3] - W3*row[1] */
78 smlad r8, lr, r10,r8 /* B0 += W5*row[5] + W7*row[7] */
79 smusdx r10,r3, r1 /* r10 = B2 = W5*row[1] - W1*row[3] */
81 ldr r3, w42n /* r3 = -W4 | (-W2 << 16) */
82 smlad r10,lr, r2, r10 /* B2 += W7*row[5] + W3*row[7] */
83 ldr r2, [r0, #4] /* r2 = row[6,4] */
84 smlsdx r11,lr, ip, r11 /* B3 += W3*row[5] - W1*row[7] */
85 ldr ip, w46 /* ip = W4 | (W6 << 16) */
86 smlad r9, lr, r1, r9 /* B1 -= W1*row[5] + W5*row[7] */
88 smlad r5, r2, r3, r5 /* A1 += -W4*row[4] - W2*row[6] */
89 smlsd r6, r2, r3, r6 /* A2 += -W4*row[4] + W2*row[6] */
90 smlad r4, r2, ip, r4 /* A0 += W4*row[4] + W6*row[6] */
91 smlsd r7, r2, ip, r7 /* A3 += W4*row[4] - W6*row[6] */
95 Compute partial IDCT of half row.
96 shift = left-shift amount
101 Output in registers r4--r11
103 .macro idct_row4 shift
104 ldr lr, w46 /* lr = W4 | (W6 << 16) */
105 ldr r10,w57 /* r10 = W5 | (W7 << 16) */
106 mov r1, #(1<<(\shift-1))
109 ldr ip, w13 /* ip = W1 | (W3 << 16) */
112 smusdx r11,r3, r10 /* r11 = B3 = W7*row[1] - W5*row[3] */
113 smuad r8, r3, ip /* r8 = B0 = W1*row[1] + W3*row[3] */
114 pkhtb r2, ip, r10,asr #16 /* r3 = W7 | (W3 << 16) */
115 pkhbt r1, ip, r10,lsl #16 /* r1 = W1 | (W5 << 16) */
116 smusdx r9, r2, r3 /* r9 = -B1 = W7*row[3] - W3*row[1] */
117 smusdx r10,r3, r1 /* r10 = B2 = W5*row[1] - W1*row[3] */
121 Compute final part of IDCT single row without shift.
122 Input in registers r4--r11
123 Output in registers ip, r4--r6, lr, r8--r10
126 add ip, r4, r8 /* r1 = A0 + B0 */
127 sub lr, r4, r8 /* r2 = A0 - B0 */
128 sub r4, r5, r9 /* r2 = A1 + B1 */
129 add r8, r5, r9 /* r2 = A1 - B1 */
130 add r5, r6, r10 /* r1 = A2 + B2 */
131 sub r9, r6, r10 /* r1 = A2 - B2 */
132 add r6, r7, r11 /* r2 = A3 + B3 */
133 sub r10,r7, r11 /* r2 = A3 - B3 */
137 Compute final part of IDCT single row.
138 shift = right-shift amount
139 Input/output in registers r4--r11
141 .macro idct_finish_shift shift
142 add r3, r4, r8 /* r3 = A0 + B0 */
143 sub r2, r4, r8 /* r2 = A0 - B0 */
144 mov r4, r3, asr #\shift
145 mov r8, r2, asr #\shift
147 sub r3, r5, r9 /* r3 = A1 + B1 */
148 add r2, r5, r9 /* r2 = A1 - B1 */
149 mov r5, r3, asr #\shift
150 mov r9, r2, asr #\shift
152 add r3, r6, r10 /* r3 = A2 + B2 */
153 sub r2, r6, r10 /* r2 = A2 - B2 */
154 mov r6, r3, asr #\shift
155 mov r10,r2, asr #\shift
157 add r3, r7, r11 /* r3 = A3 + B3 */
158 sub r2, r7, r11 /* r2 = A3 - B3 */
159 mov r7, r3, asr #\shift
160 mov r11,r2, asr #\shift
164 Compute final part of IDCT single row, saturating results at 8 bits.
165 shift = right-shift amount
166 Input/output in registers r4--r11
168 .macro idct_finish_shift_sat shift
169 add r3, r4, r8 /* r3 = A0 + B0 */
170 sub ip, r4, r8 /* ip = A0 - B0 */
171 usat r4, #8, r3, asr #\shift
172 usat r8, #8, ip, asr #\shift
174 sub r3, r5, r9 /* r3 = A1 + B1 */
175 add ip, r5, r9 /* ip = A1 - B1 */
176 usat r5, #8, r3, asr #\shift
177 usat r9, #8, ip, asr #\shift
179 add r3, r6, r10 /* r3 = A2 + B2 */
180 sub ip, r6, r10 /* ip = A2 - B2 */
181 usat r6, #8, r3, asr #\shift
182 usat r10,#8, ip, asr #\shift
184 add r3, r7, r11 /* r3 = A3 + B3 */
185 sub ip, r7, r11 /* ip = A3 - B3 */
186 usat r7, #8, r3, asr #\shift
187 usat r11,#8, ip, asr #\shift
191 Compute IDCT of single row, storing as column.
195 function idct_row_armv6
198 ldr lr, [r0, #12] /* lr = row[7,5] */
199 ldr ip, [r0, #4] /* ip = row[6,4] */
200 ldr r3, [r0, #8] /* r3 = row[3,1] */
201 ldr r2, [r0] /* r2 = row[2,0] */
205 cmpeq lr, r2, lsr #16
208 ldr ip, w42 /* ip = W4 | (W2 << 16) */
215 2: idct_row4 ROW_SHIFT
218 idct_finish_shift ROW_SHIFT
221 strh r5, [r1, #(16*2)]
222 strh r6, [r1, #(16*4)]
223 strh r7, [r1, #(16*6)]
224 strh r11,[r1, #(16*1)]
225 strh r10,[r1, #(16*3)]
226 strh r9, [r1, #(16*5)]
227 strh r8, [r1, #(16*7)]
231 1: mov r2, r2, lsl #3
233 strh r2, [r1, #(16*2)]
234 strh r2, [r1, #(16*4)]
235 strh r2, [r1, #(16*6)]
236 strh r2, [r1, #(16*1)]
237 strh r2, [r1, #(16*3)]
238 strh r2, [r1, #(16*5)]
239 strh r2, [r1, #(16*7)]
244 Compute IDCT of single column, read as row.
248 function idct_col_armv6
251 ldr r2, [r0] /* r2 = row[2,0] */
252 ldr ip, w42 /* ip = W4 | (W2 << 16) */
253 ldr r3, [r0, #8] /* r3 = row[3,1] */
256 idct_finish_shift COL_SHIFT
259 strh r5, [r1, #(16*1)]
260 strh r6, [r1, #(16*2)]
261 strh r7, [r1, #(16*3)]
262 strh r11,[r1, #(16*4)]
263 strh r10,[r1, #(16*5)]
264 strh r9, [r1, #(16*6)]
265 strh r8, [r1, #(16*7)]
271 Compute IDCT of single column, read as row, store saturated 8-bit.
276 function idct_col_put_armv6
279 ldr r2, [r0] /* r2 = row[2,0] */
280 ldr ip, w42 /* ip = W4 | (W2 << 16) */
281 ldr r3, [r0, #8] /* r3 = row[3,1] */
284 idct_finish_shift_sat COL_SHIFT
295 sub r1, r1, r2, lsl #3
301 Compute IDCT of single column, read as row, add/store saturated 8-bit.
306 function idct_col_add_armv6
309 ldr r2, [r0] /* r2 = row[2,0] */
310 ldr ip, w42 /* ip = W4 | (W2 << 16) */
311 ldr r3, [r0, #8] /* r3 = row[3,1] */
318 ldrb r11,[r1, r2, lsl #2]
319 add ip, r3, ip, asr #COL_SHIFT
321 add r4, r7, r4, asr #COL_SHIFT
325 ldrb r11,[r1, r2, lsl #2]
326 add r5, ip, r5, asr #COL_SHIFT
330 ldrb ip, [r1, r2, lsl #2]
333 ldrb r4, [r1, r2, lsl #2]
334 add r6, r3, r6, asr #COL_SHIFT
336 add r10,r7, r10,asr #COL_SHIFT
338 add r9, r11,r9, asr #COL_SHIFT
340 add r8, ip, r8, asr #COL_SHIFT
342 add lr, r4, lr, asr #COL_SHIFT
350 sub r1, r1, r2, lsl #3
356 Compute 8 IDCT row transforms.
357 func = IDCT row->col function
358 width = width of columns in bytes
360 .macro idct_rows func width
387 /* void ff_simple_idct_armv6(DCTELEM *data); */
388 function ff_simple_idct_armv6, export=1
393 idct_rows idct_row_armv6, 2
396 idct_rows idct_col_armv6, 2
402 /* ff_simple_idct_add_armv6(uint8_t *dest, int line_size, DCTELEM *data); */
403 function ff_simple_idct_add_armv6, export=1
404 push {r0, r1, r4-r11, lr}
409 idct_rows idct_row_armv6, 2
412 ldr r2, [sp, #(128+4)]
413 idct_rows idct_col_add_armv6, 1
419 /* ff_simple_idct_put_armv6(uint8_t *dest, int line_size, DCTELEM *data); */
420 function ff_simple_idct_put_armv6, export=1
421 push {r0, r1, r4-r11, lr}
426 idct_rows idct_row_armv6, 2
429 ldr r2, [sp, #(128+4)]
430 idct_rows idct_col_put_armv6, 1