2 * H.264/HEVC hardware encoding using nvidia nvenc
3 * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
5 * This file is part of FFmpeg.
7 * FFmpeg is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * FFmpeg is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with FFmpeg; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
26 #include "libavutil/hwcontext_cuda.h"
27 #include "libavutil/hwcontext.h"
28 #include "libavutil/cuda_check.h"
29 #include "libavutil/imgutils.h"
30 #include "libavutil/avassert.h"
31 #include "libavutil/mem.h"
32 #include "libavutil/pixdesc.h"
35 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
37 #define NVENC_CAP 0x30
38 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
39 rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
40 rc == NV_ENC_PARAMS_RC_CBR_HQ)
42 const enum AVPixelFormat ff_nvenc_pix_fmts[] = {
47 AV_PIX_FMT_P016, // Truncated to 10bits
48 AV_PIX_FMT_YUV444P16, // Truncated to 10bits
58 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
59 pix_fmt == AV_PIX_FMT_P016 || \
60 pix_fmt == AV_PIX_FMT_YUV444P16)
62 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
63 pix_fmt == AV_PIX_FMT_YUV444P16)
70 { NV_ENC_SUCCESS, 0, "success" },
71 { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
72 { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
73 { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
74 { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
75 { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
76 { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
77 { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
78 { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
79 { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
80 { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
81 { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
82 { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
83 { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
84 { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
85 { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
86 { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
87 { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
88 { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
89 { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
90 { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
91 { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
92 { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
93 { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
94 { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
95 { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
98 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
101 for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
102 if (nvenc_errors[i].nverr == err) {
104 *desc = nvenc_errors[i].desc;
105 return nvenc_errors[i].averr;
109 *desc = "unknown error";
110 return AVERROR_UNKNOWN;
113 static int nvenc_print_error(void *log_ctx, NVENCSTATUS err,
114 const char *error_string)
118 ret = nvenc_map_error(err, &desc);
119 av_log(log_ctx, AV_LOG_ERROR, "%s: %s (%d)\n", error_string, desc, err);
123 static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
125 #if NVENCAPI_CHECK_VERSION(9, 0)
126 # if defined(_WIN32) || defined(__CYGWIN__)
127 const char *minver = "418.81";
129 const char *minver = "418.30";
131 #elif NVENCAPI_CHECK_VERSION(8, 2)
132 # if defined(_WIN32) || defined(__CYGWIN__)
133 const char *minver = "397.93";
135 const char *minver = "396.24";
137 #elif NVENCAPI_CHECK_VERSION(8, 1)
138 # if defined(_WIN32) || defined(__CYGWIN__)
139 const char *minver = "390.77";
141 const char *minver = "390.25";
144 # if defined(_WIN32) || defined(__CYGWIN__)
145 const char *minver = "378.66";
147 const char *minver = "378.13";
150 av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
153 static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
155 NvencContext *ctx = avctx->priv_data;
156 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
158 uint32_t nvenc_max_ver;
161 ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
165 ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
167 nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
171 err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
172 if (err != NV_ENC_SUCCESS)
173 return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
175 av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
177 if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
178 av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
179 "Required: %d.%d Found: %d.%d\n",
180 NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
181 nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
182 nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
183 return AVERROR(ENOSYS);
186 dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
188 err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
189 if (err != NV_ENC_SUCCESS)
190 return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
192 av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
197 static int nvenc_push_context(AVCodecContext *avctx)
199 NvencContext *ctx = avctx->priv_data;
200 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
202 if (ctx->d3d11_device)
205 return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
208 static int nvenc_pop_context(AVCodecContext *avctx)
210 NvencContext *ctx = avctx->priv_data;
211 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
214 if (ctx->d3d11_device)
217 return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
220 static av_cold int nvenc_open_session(AVCodecContext *avctx)
222 NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
223 NvencContext *ctx = avctx->priv_data;
224 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
227 params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
228 params.apiVersion = NVENCAPI_VERSION;
229 if (ctx->d3d11_device) {
230 params.device = ctx->d3d11_device;
231 params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
233 params.device = ctx->cu_context;
234 params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
237 ret = p_nvenc->nvEncOpenEncodeSessionEx(¶ms, &ctx->nvencoder);
238 if (ret != NV_ENC_SUCCESS) {
239 ctx->nvencoder = NULL;
240 return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
246 static int nvenc_check_codec_support(AVCodecContext *avctx)
248 NvencContext *ctx = avctx->priv_data;
249 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
250 int i, ret, count = 0;
253 ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
255 if (ret != NV_ENC_SUCCESS || !count)
256 return AVERROR(ENOSYS);
258 guids = av_malloc(count * sizeof(GUID));
260 return AVERROR(ENOMEM);
262 ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
263 if (ret != NV_ENC_SUCCESS) {
264 ret = AVERROR(ENOSYS);
268 ret = AVERROR(ENOSYS);
269 for (i = 0; i < count; i++) {
270 if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
282 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
284 NvencContext *ctx = avctx->priv_data;
285 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
286 NV_ENC_CAPS_PARAM params = { 0 };
289 params.version = NV_ENC_CAPS_PARAM_VER;
290 params.capsToQuery = cap;
292 ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, ¶ms, &val);
294 if (ret == NV_ENC_SUCCESS)
299 static int nvenc_check_capabilities(AVCodecContext *avctx)
301 NvencContext *ctx = avctx->priv_data;
304 ret = nvenc_check_codec_support(avctx);
306 av_log(avctx, AV_LOG_VERBOSE, "Codec not supported\n");
310 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
311 if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
312 av_log(avctx, AV_LOG_VERBOSE, "YUV444P not supported\n");
313 return AVERROR(ENOSYS);
316 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
317 if (ctx->preset >= PRESET_LOSSLESS_DEFAULT && ret <= 0) {
318 av_log(avctx, AV_LOG_VERBOSE, "Lossless encoding not supported\n");
319 return AVERROR(ENOSYS);
322 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
323 if (ret < avctx->width) {
324 av_log(avctx, AV_LOG_VERBOSE, "Width %d exceeds %d\n",
326 return AVERROR(ENOSYS);
329 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
330 if (ret < avctx->height) {
331 av_log(avctx, AV_LOG_VERBOSE, "Height %d exceeds %d\n",
333 return AVERROR(ENOSYS);
336 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
337 if (ret < avctx->max_b_frames) {
338 av_log(avctx, AV_LOG_VERBOSE, "Max B-frames %d exceed %d\n",
339 avctx->max_b_frames, ret);
341 return AVERROR(ENOSYS);
344 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
345 if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
346 av_log(avctx, AV_LOG_VERBOSE,
347 "Interlaced encoding is not supported. Supported level: %d\n",
349 return AVERROR(ENOSYS);
352 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
353 if (IS_10BIT(ctx->data_pix_fmt) && ret <= 0) {
354 av_log(avctx, AV_LOG_VERBOSE, "10 bit encode not supported\n");
355 return AVERROR(ENOSYS);
358 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
359 if (ctx->rc_lookahead > 0 && ret <= 0) {
360 av_log(avctx, AV_LOG_VERBOSE, "RC lookahead not supported\n");
361 return AVERROR(ENOSYS);
364 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
365 if (ctx->temporal_aq > 0 && ret <= 0) {
366 av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ not supported\n");
367 return AVERROR(ENOSYS);
370 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
371 if (ctx->weighted_pred > 0 && ret <= 0) {
372 av_log (avctx, AV_LOG_VERBOSE, "Weighted Prediction not supported\n");
373 return AVERROR(ENOSYS);
376 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
377 if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
378 av_log(avctx, AV_LOG_VERBOSE, "CABAC entropy coding not supported\n");
379 return AVERROR(ENOSYS);
382 #ifdef NVENC_HAVE_BFRAME_REF_MODE
383 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
384 if (ctx->b_ref_mode == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1) {
385 av_log(avctx, AV_LOG_VERBOSE, "Each B frame as reference is not supported\n");
386 return AVERROR(ENOSYS);
387 } else if (ctx->b_ref_mode != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
388 av_log(avctx, AV_LOG_VERBOSE, "B frames as references are not supported\n");
389 return AVERROR(ENOSYS);
392 if (ctx->b_ref_mode != 0) {
393 av_log(avctx, AV_LOG_VERBOSE, "B frames as references need SDK 8.1 at build time\n");
394 return AVERROR(ENOSYS);
398 ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
403 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
405 NvencContext *ctx = avctx->priv_data;
406 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
407 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
408 char name[128] = { 0};
409 int major, minor, ret;
411 int loglevel = AV_LOG_VERBOSE;
413 if (ctx->device == LIST_DEVICES)
414 loglevel = AV_LOG_INFO;
416 ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
420 ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
424 ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
428 av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
429 if (((major << 4) | minor) < NVENC_CAP) {
430 av_log(avctx, loglevel, "does not support NVENC\n");
434 if (ctx->device != idx && ctx->device != ANY_DEVICE)
437 ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
441 ctx->cu_context = ctx->cu_context_internal;
443 if ((ret = nvenc_pop_context(avctx)) < 0)
446 if ((ret = nvenc_open_session(avctx)) < 0)
449 if ((ret = nvenc_check_capabilities(avctx)) < 0)
452 av_log(avctx, loglevel, "supports NVENC\n");
454 dl_fn->nvenc_device_count++;
456 if (ctx->device == idx || ctx->device == ANY_DEVICE)
460 if ((ret = nvenc_push_context(avctx)) < 0)
463 p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
464 ctx->nvencoder = NULL;
466 if ((ret = nvenc_pop_context(avctx)) < 0)
470 CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
471 ctx->cu_context_internal = NULL;
474 return AVERROR(ENOSYS);
477 static av_cold int nvenc_setup_device(AVCodecContext *avctx)
479 NvencContext *ctx = avctx->priv_data;
480 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
482 switch (avctx->codec->id) {
483 case AV_CODEC_ID_H264:
484 ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
486 case AV_CODEC_ID_HEVC:
487 ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
493 if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
494 AVHWFramesContext *frames_ctx;
495 AVHWDeviceContext *hwdev_ctx;
496 AVCUDADeviceContext *cuda_device_hwctx = NULL;
498 AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
502 if (avctx->hw_frames_ctx) {
503 frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
504 if (frames_ctx->format == AV_PIX_FMT_CUDA)
505 cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
507 else if (frames_ctx->format == AV_PIX_FMT_D3D11)
508 d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
511 return AVERROR(EINVAL);
512 } else if (avctx->hw_device_ctx) {
513 hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
514 if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
515 cuda_device_hwctx = hwdev_ctx->hwctx;
517 else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
518 d3d11_device_hwctx = hwdev_ctx->hwctx;
521 return AVERROR(EINVAL);
523 return AVERROR(EINVAL);
526 if (cuda_device_hwctx) {
527 ctx->cu_context = cuda_device_hwctx->cuda_ctx;
530 else if (d3d11_device_hwctx) {
531 ctx->d3d11_device = d3d11_device_hwctx->device;
532 ID3D11Device_AddRef(ctx->d3d11_device);
536 ret = nvenc_open_session(avctx);
540 ret = nvenc_check_capabilities(avctx);
542 av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
546 int i, nb_devices = 0;
548 if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
549 return AVERROR_UNKNOWN;
551 if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
552 return AVERROR_UNKNOWN;
555 av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
556 return AVERROR_EXTERNAL;
559 av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
561 dl_fn->nvenc_device_count = 0;
562 for (i = 0; i < nb_devices; ++i) {
563 if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
567 if (ctx->device == LIST_DEVICES)
570 if (!dl_fn->nvenc_device_count) {
571 av_log(avctx, AV_LOG_FATAL, "No NVENC capable devices found\n");
572 return AVERROR_EXTERNAL;
575 av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
576 return AVERROR(EINVAL);
582 typedef struct GUIDTuple {
587 #define PRESET_ALIAS(alias, name, ...) \
588 [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
590 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
592 static void nvenc_map_preset(NvencContext *ctx)
594 GUIDTuple presets[] = {
599 PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
600 PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
601 PRESET_ALIAS(FAST, HP, NVENC_ONE_PASS),
602 PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
603 PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
604 PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
605 PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
606 PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
609 GUIDTuple *t = &presets[ctx->preset];
611 ctx->init_encode_params.presetGUID = t->guid;
612 ctx->flags = t->flags;
618 static av_cold void set_constqp(AVCodecContext *avctx)
620 NvencContext *ctx = avctx->priv_data;
621 NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
623 rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
625 if (ctx->init_qp_p >= 0) {
626 rc->constQP.qpInterP = ctx->init_qp_p;
627 if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
628 rc->constQP.qpIntra = ctx->init_qp_i;
629 rc->constQP.qpInterB = ctx->init_qp_b;
630 } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
631 rc->constQP.qpIntra = av_clip(
632 rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
633 rc->constQP.qpInterB = av_clip(
634 rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
636 rc->constQP.qpIntra = rc->constQP.qpInterP;
637 rc->constQP.qpInterB = rc->constQP.qpInterP;
639 } else if (ctx->cqp >= 0) {
640 rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
641 if (avctx->b_quant_factor != 0.0)
642 rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
643 if (avctx->i_quant_factor != 0.0)
644 rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
651 static av_cold void set_vbr(AVCodecContext *avctx)
653 NvencContext *ctx = avctx->priv_data;
654 NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
657 if (avctx->qmin >= 0 && avctx->qmax >= 0) {
661 rc->minQP.qpInterB = avctx->qmin;
662 rc->minQP.qpInterP = avctx->qmin;
663 rc->minQP.qpIntra = avctx->qmin;
665 rc->maxQP.qpInterB = avctx->qmax;
666 rc->maxQP.qpInterP = avctx->qmax;
667 rc->maxQP.qpIntra = avctx->qmax;
669 qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
670 } else if (avctx->qmin >= 0) {
673 rc->minQP.qpInterB = avctx->qmin;
674 rc->minQP.qpInterP = avctx->qmin;
675 rc->minQP.qpIntra = avctx->qmin;
677 qp_inter_p = avctx->qmin;
679 qp_inter_p = 26; // default to 26
682 rc->enableInitialRCQP = 1;
684 if (ctx->init_qp_p < 0) {
685 rc->initialRCQP.qpInterP = qp_inter_p;
687 rc->initialRCQP.qpInterP = ctx->init_qp_p;
690 if (ctx->init_qp_i < 0) {
691 if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
692 rc->initialRCQP.qpIntra = av_clip(
693 rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
695 rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
698 rc->initialRCQP.qpIntra = ctx->init_qp_i;
701 if (ctx->init_qp_b < 0) {
702 if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
703 rc->initialRCQP.qpInterB = av_clip(
704 rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
706 rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
709 rc->initialRCQP.qpInterB = ctx->init_qp_b;
713 static av_cold void set_lossless(AVCodecContext *avctx)
715 NvencContext *ctx = avctx->priv_data;
716 NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
718 rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
719 rc->constQP.qpInterB = 0;
720 rc->constQP.qpInterP = 0;
721 rc->constQP.qpIntra = 0;
727 static void nvenc_override_rate_control(AVCodecContext *avctx)
729 NvencContext *ctx = avctx->priv_data;
730 NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
733 case NV_ENC_PARAMS_RC_CONSTQP:
736 case NV_ENC_PARAMS_RC_VBR_MINQP:
737 if (avctx->qmin < 0) {
738 av_log(avctx, AV_LOG_WARNING,
739 "The variable bitrate rate-control requires "
740 "the 'qmin' option set.\n");
745 case NV_ENC_PARAMS_RC_VBR_HQ:
746 case NV_ENC_PARAMS_RC_VBR:
749 case NV_ENC_PARAMS_RC_CBR:
750 case NV_ENC_PARAMS_RC_CBR_HQ:
751 case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
755 rc->rateControlMode = ctx->rc;
758 static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
760 NvencContext *ctx = avctx->priv_data;
761 // default minimum of 4 surfaces
762 // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
763 // another multiply by 2 to avoid blocking next PBB group
764 int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
767 if (ctx->rc_lookahead > 0) {
768 // +1 is to account for lkd_bound calculation later
769 // +4 is to allow sufficient pipelining with lookahead
770 nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
771 if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
773 av_log(avctx, AV_LOG_WARNING,
774 "Defined rc_lookahead requires more surfaces, "
775 "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
777 ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
779 if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
781 av_log(avctx, AV_LOG_WARNING,
782 "Defined b-frame requires more surfaces, "
783 "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
784 ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
786 else if (ctx->nb_surfaces <= 0)
787 ctx->nb_surfaces = nb_surfaces;
788 // otherwise use user specified value
791 ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
792 ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
797 static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
799 NvencContext *ctx = avctx->priv_data;
801 if (avctx->global_quality > 0)
802 av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
804 if (ctx->cqp < 0 && avctx->global_quality > 0)
805 ctx->cqp = avctx->global_quality;
807 if (avctx->bit_rate > 0) {
808 ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
809 } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
810 ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
813 if (avctx->rc_max_rate > 0)
814 ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
817 if (ctx->flags & NVENC_ONE_PASS)
819 if (ctx->flags & NVENC_TWO_PASSES)
822 if (ctx->twopass < 0)
823 ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
827 ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
829 ctx->rc = NV_ENC_PARAMS_RC_CBR;
831 } else if (ctx->cqp >= 0) {
832 ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
833 } else if (ctx->twopass) {
834 ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
835 } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
836 ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
840 if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
841 av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
842 av_log(avctx, AV_LOG_WARNING, "\tll_2pass_quality -> cbr_ld_hq\n");
843 av_log(avctx, AV_LOG_WARNING, "\tll_2pass_size -> cbr_hq\n");
844 av_log(avctx, AV_LOG_WARNING, "\tvbr_2pass -> vbr_hq\n");
845 av_log(avctx, AV_LOG_WARNING, "\tvbr_minqp -> (no replacement)\n");
847 ctx->rc &= ~RC_MODE_DEPRECATED;
850 if (ctx->flags & NVENC_LOSSLESS) {
852 } else if (ctx->rc >= 0) {
853 nvenc_override_rate_control(avctx);
855 ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
859 if (avctx->rc_buffer_size > 0) {
860 ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
861 } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
862 avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
866 ctx->encode_config.rcParams.enableAQ = 1;
867 ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
868 av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
871 if (ctx->temporal_aq) {
872 ctx->encode_config.rcParams.enableTemporalAQ = 1;
873 av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
876 if (ctx->rc_lookahead > 0) {
877 int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
878 ctx->encode_config.frameIntervalP - 4;
881 av_log(avctx, AV_LOG_WARNING,
882 "Lookahead not enabled. Increase buffer delay (-delay).\n");
884 ctx->encode_config.rcParams.enableLookahead = 1;
885 ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
886 ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
887 ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
888 av_log(avctx, AV_LOG_VERBOSE,
889 "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
890 ctx->encode_config.rcParams.lookaheadDepth,
891 ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
892 ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
896 if (ctx->strict_gop) {
897 ctx->encode_config.rcParams.strictGOPTarget = 1;
898 av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
902 ctx->encode_config.rcParams.enableNonRefP = 1;
904 if (ctx->zerolatency)
905 ctx->encode_config.rcParams.zeroReorderDelay = 1;
909 //convert from float to fixed point 8.8
910 int tmp_quality = (int)(ctx->quality * 256.0f);
911 ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
912 ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
916 static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
918 NvencContext *ctx = avctx->priv_data;
919 NV_ENC_CONFIG *cc = &ctx->encode_config;
920 NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
921 NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
923 vui->colourMatrix = avctx->colorspace;
924 vui->colourPrimaries = avctx->color_primaries;
925 vui->transferCharacteristics = avctx->color_trc;
926 vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
927 || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
929 vui->colourDescriptionPresentFlag =
930 (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
932 vui->videoSignalTypePresentFlag =
933 (vui->colourDescriptionPresentFlag
934 || vui->videoFormat != 5
935 || vui->videoFullRangeFlag != 0);
938 h264->sliceModeData = 1;
940 h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
941 h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
942 h264->outputAUD = ctx->aud;
944 if (avctx->refs >= 0) {
945 /* 0 means "let the hardware decide" */
946 h264->maxNumRefFrames = avctx->refs;
948 if (avctx->gop_size >= 0) {
949 h264->idrPeriod = cc->gopLength;
952 if (IS_CBR(cc->rcParams.rateControlMode)) {
953 h264->outputBufferingPeriodSEI = 1;
956 h264->outputPictureTimingSEI = 1;
958 if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
959 cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
960 cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
961 h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
962 h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
965 if (ctx->flags & NVENC_LOSSLESS) {
966 h264->qpPrimeYZeroTransformBypassFlag = 1;
968 switch(ctx->profile) {
969 case NV_ENC_H264_PROFILE_BASELINE:
970 cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
971 avctx->profile = FF_PROFILE_H264_BASELINE;
973 case NV_ENC_H264_PROFILE_MAIN:
974 cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
975 avctx->profile = FF_PROFILE_H264_MAIN;
977 case NV_ENC_H264_PROFILE_HIGH:
978 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
979 avctx->profile = FF_PROFILE_H264_HIGH;
981 case NV_ENC_H264_PROFILE_HIGH_444P:
982 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
983 avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
988 // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
989 if (ctx->data_pix_fmt == AV_PIX_FMT_YUV444P) {
990 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
991 avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
994 h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
996 h264->level = ctx->level;
999 h264->entropyCodingMode = ctx->coder;
1001 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1002 h264->useBFramesAsRef = ctx->b_ref_mode;
1008 static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
1010 NvencContext *ctx = avctx->priv_data;
1011 NV_ENC_CONFIG *cc = &ctx->encode_config;
1012 NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1013 NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1015 vui->colourMatrix = avctx->colorspace;
1016 vui->colourPrimaries = avctx->color_primaries;
1017 vui->transferCharacteristics = avctx->color_trc;
1018 vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1019 || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1021 vui->colourDescriptionPresentFlag =
1022 (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
1024 vui->videoSignalTypePresentFlag =
1025 (vui->colourDescriptionPresentFlag
1026 || vui->videoFormat != 5
1027 || vui->videoFullRangeFlag != 0);
1029 hevc->sliceMode = 3;
1030 hevc->sliceModeData = 1;
1032 hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1033 hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1034 hevc->outputAUD = ctx->aud;
1036 if (avctx->refs >= 0) {
1037 /* 0 means "let the hardware decide" */
1038 hevc->maxNumRefFramesInDPB = avctx->refs;
1040 if (avctx->gop_size >= 0) {
1041 hevc->idrPeriod = cc->gopLength;
1044 if (IS_CBR(cc->rcParams.rateControlMode)) {
1045 hevc->outputBufferingPeriodSEI = 1;
1048 hevc->outputPictureTimingSEI = 1;
1050 switch (ctx->profile) {
1051 case NV_ENC_HEVC_PROFILE_MAIN:
1052 cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1053 avctx->profile = FF_PROFILE_HEVC_MAIN;
1055 case NV_ENC_HEVC_PROFILE_MAIN_10:
1056 cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1057 avctx->profile = FF_PROFILE_HEVC_MAIN_10;
1059 case NV_ENC_HEVC_PROFILE_REXT:
1060 cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1061 avctx->profile = FF_PROFILE_HEVC_REXT;
1065 // force setting profile as main10 if input is 10 bit
1066 if (IS_10BIT(ctx->data_pix_fmt)) {
1067 cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1068 avctx->profile = FF_PROFILE_HEVC_MAIN_10;
1071 // force setting profile as rext if input is yuv444
1072 if (IS_YUV444(ctx->data_pix_fmt)) {
1073 cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1074 avctx->profile = FF_PROFILE_HEVC_REXT;
1077 hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1079 hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1081 hevc->level = ctx->level;
1083 hevc->tier = ctx->tier;
1085 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1086 hevc->useBFramesAsRef = ctx->b_ref_mode;
1092 static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
1094 switch (avctx->codec->id) {
1095 case AV_CODEC_ID_H264:
1096 return nvenc_setup_h264_config(avctx);
1097 case AV_CODEC_ID_HEVC:
1098 return nvenc_setup_hevc_config(avctx);
1099 /* Earlier switch/case will return if unknown codec is passed. */
1105 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1111 if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1112 sw *= avctx->sample_aspect_ratio.num;
1113 sh *= avctx->sample_aspect_ratio.den;
1116 av_reduce(dw, dh, sw, sh, 1024 * 1024);
1119 static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
1121 NvencContext *ctx = avctx->priv_data;
1122 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1123 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1125 NV_ENC_PRESET_CONFIG preset_config = { 0 };
1126 NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1127 AVCPBProperties *cpb_props;
1131 ctx->encode_config.version = NV_ENC_CONFIG_VER;
1132 ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1134 ctx->init_encode_params.encodeHeight = avctx->height;
1135 ctx->init_encode_params.encodeWidth = avctx->width;
1137 ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1139 nvenc_map_preset(ctx);
1141 preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1142 preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1144 nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1145 ctx->init_encode_params.encodeGUID,
1146 ctx->init_encode_params.presetGUID,
1148 if (nv_status != NV_ENC_SUCCESS)
1149 return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1151 memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1153 ctx->encode_config.version = NV_ENC_CONFIG_VER;
1155 compute_dar(avctx, &dw, &dh);
1156 ctx->init_encode_params.darHeight = dh;
1157 ctx->init_encode_params.darWidth = dw;
1159 ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1160 ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
1162 ctx->init_encode_params.enableEncodeAsync = 0;
1163 ctx->init_encode_params.enablePTD = 1;
1165 if (ctx->weighted_pred == 1)
1166 ctx->init_encode_params.enableWeightedPrediction = 1;
1168 if (ctx->bluray_compat) {
1170 avctx->refs = FFMIN(FFMAX(avctx->refs, 0), 6);
1171 avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1172 switch (avctx->codec->id) {
1173 case AV_CODEC_ID_H264:
1174 /* maximum level depends on used resolution */
1176 case AV_CODEC_ID_HEVC:
1177 ctx->level = NV_ENC_LEVEL_HEVC_51;
1178 ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1183 if (avctx->gop_size > 0) {
1184 if (avctx->max_b_frames >= 0) {
1185 /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1186 ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1189 ctx->encode_config.gopLength = avctx->gop_size;
1190 } else if (avctx->gop_size == 0) {
1191 ctx->encode_config.frameIntervalP = 0;
1192 ctx->encode_config.gopLength = 1;
1195 ctx->initial_pts[0] = AV_NOPTS_VALUE;
1196 ctx->initial_pts[1] = AV_NOPTS_VALUE;
1198 nvenc_recalc_surfaces(avctx);
1200 nvenc_setup_rate_control(avctx);
1202 if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1203 ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1205 ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1208 res = nvenc_setup_codec_config(avctx);
1212 res = nvenc_push_context(avctx);
1216 nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1218 res = nvenc_pop_context(avctx);
1222 if (nv_status != NV_ENC_SUCCESS) {
1223 return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1226 if (ctx->encode_config.frameIntervalP > 1)
1227 avctx->has_b_frames = 2;
1229 if (ctx->encode_config.rcParams.averageBitRate > 0)
1230 avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1232 cpb_props = ff_add_cpb_side_data(avctx);
1234 return AVERROR(ENOMEM);
1235 cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1236 cpb_props->avg_bitrate = avctx->bit_rate;
1237 cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1242 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1245 case AV_PIX_FMT_YUV420P:
1246 return NV_ENC_BUFFER_FORMAT_YV12_PL;
1247 case AV_PIX_FMT_NV12:
1248 return NV_ENC_BUFFER_FORMAT_NV12_PL;
1249 case AV_PIX_FMT_P010:
1250 case AV_PIX_FMT_P016:
1251 return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1252 case AV_PIX_FMT_YUV444P:
1253 return NV_ENC_BUFFER_FORMAT_YUV444_PL;
1254 case AV_PIX_FMT_YUV444P16:
1255 return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1256 case AV_PIX_FMT_0RGB32:
1257 return NV_ENC_BUFFER_FORMAT_ARGB;
1258 case AV_PIX_FMT_0BGR32:
1259 return NV_ENC_BUFFER_FORMAT_ABGR;
1261 return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1265 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1267 NvencContext *ctx = avctx->priv_data;
1268 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1269 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1270 NvencSurface* tmp_surface = &ctx->surfaces[idx];
1272 NVENCSTATUS nv_status;
1273 NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1274 allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1276 if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1277 ctx->surfaces[idx].in_ref = av_frame_alloc();
1278 if (!ctx->surfaces[idx].in_ref)
1279 return AVERROR(ENOMEM);
1281 NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1283 ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
1284 if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1285 av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1286 av_get_pix_fmt_name(ctx->data_pix_fmt));
1287 return AVERROR(EINVAL);
1290 allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1291 allocSurf.width = avctx->width;
1292 allocSurf.height = avctx->height;
1293 allocSurf.bufferFmt = ctx->surfaces[idx].format;
1295 nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1296 if (nv_status != NV_ENC_SUCCESS) {
1297 return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1300 ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1301 ctx->surfaces[idx].width = allocSurf.width;
1302 ctx->surfaces[idx].height = allocSurf.height;
1305 nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1306 if (nv_status != NV_ENC_SUCCESS) {
1307 int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1308 if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1309 p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1310 av_frame_free(&ctx->surfaces[idx].in_ref);
1314 ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1315 ctx->surfaces[idx].size = allocOut.size;
1317 av_fifo_generic_write(ctx->unused_surface_queue, &tmp_surface, sizeof(tmp_surface), NULL);
1322 static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
1324 NvencContext *ctx = avctx->priv_data;
1325 int i, res = 0, res2;
1327 ctx->surfaces = av_mallocz_array(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1329 return AVERROR(ENOMEM);
1331 ctx->timestamp_list = av_fifo_alloc(ctx->nb_surfaces * sizeof(int64_t));
1332 if (!ctx->timestamp_list)
1333 return AVERROR(ENOMEM);
1335 ctx->unused_surface_queue = av_fifo_alloc(ctx->nb_surfaces * sizeof(NvencSurface*));
1336 if (!ctx->unused_surface_queue)
1337 return AVERROR(ENOMEM);
1339 ctx->output_surface_queue = av_fifo_alloc(ctx->nb_surfaces * sizeof(NvencSurface*));
1340 if (!ctx->output_surface_queue)
1341 return AVERROR(ENOMEM);
1342 ctx->output_surface_ready_queue = av_fifo_alloc(ctx->nb_surfaces * sizeof(NvencSurface*));
1343 if (!ctx->output_surface_ready_queue)
1344 return AVERROR(ENOMEM);
1346 res = nvenc_push_context(avctx);
1350 for (i = 0; i < ctx->nb_surfaces; i++) {
1351 if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1356 res2 = nvenc_pop_context(avctx);
1363 static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
1365 NvencContext *ctx = avctx->priv_data;
1366 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1367 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1369 NVENCSTATUS nv_status;
1370 uint32_t outSize = 0;
1371 char tmpHeader[256];
1372 NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1373 payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1375 payload.spsppsBuffer = tmpHeader;
1376 payload.inBufferSize = sizeof(tmpHeader);
1377 payload.outSPSPPSPayloadSize = &outSize;
1379 nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1380 if (nv_status != NV_ENC_SUCCESS) {
1381 return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1384 avctx->extradata_size = outSize;
1385 avctx->extradata = av_mallocz(outSize + AV_INPUT_BUFFER_PADDING_SIZE);
1387 if (!avctx->extradata) {
1388 return AVERROR(ENOMEM);
1391 memcpy(avctx->extradata, tmpHeader, outSize);
1396 av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
1398 NvencContext *ctx = avctx->priv_data;
1399 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1400 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1403 /* the encoder has to be flushed before it can be closed */
1404 if (ctx->nvencoder) {
1405 NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1406 .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1408 res = nvenc_push_context(avctx);
1412 p_nvenc->nvEncEncodePicture(ctx->nvencoder, ¶ms);
1415 av_fifo_freep(&ctx->timestamp_list);
1416 av_fifo_freep(&ctx->output_surface_ready_queue);
1417 av_fifo_freep(&ctx->output_surface_queue);
1418 av_fifo_freep(&ctx->unused_surface_queue);
1420 if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
1421 for (i = 0; i < ctx->nb_registered_frames; i++) {
1422 if (ctx->registered_frames[i].mapped)
1423 p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
1424 if (ctx->registered_frames[i].regptr)
1425 p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1427 ctx->nb_registered_frames = 0;
1430 if (ctx->surfaces) {
1431 for (i = 0; i < ctx->nb_surfaces; ++i) {
1432 if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1433 p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1434 av_frame_free(&ctx->surfaces[i].in_ref);
1435 p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1438 av_freep(&ctx->surfaces);
1439 ctx->nb_surfaces = 0;
1441 if (ctx->nvencoder) {
1442 p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1444 res = nvenc_pop_context(avctx);
1448 ctx->nvencoder = NULL;
1450 if (ctx->cu_context_internal)
1451 CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
1452 ctx->cu_context = ctx->cu_context_internal = NULL;
1455 if (ctx->d3d11_device) {
1456 ID3D11Device_Release(ctx->d3d11_device);
1457 ctx->d3d11_device = NULL;
1461 nvenc_free_functions(&dl_fn->nvenc_dl);
1462 cuda_free_functions(&dl_fn->cuda_dl);
1464 dl_fn->nvenc_device_count = 0;
1466 av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
1471 av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
1473 NvencContext *ctx = avctx->priv_data;
1476 if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1477 AVHWFramesContext *frames_ctx;
1478 if (!avctx->hw_frames_ctx) {
1479 av_log(avctx, AV_LOG_ERROR,
1480 "hw_frames_ctx must be set when using GPU frames as input\n");
1481 return AVERROR(EINVAL);
1483 frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1484 if (frames_ctx->format != avctx->pix_fmt) {
1485 av_log(avctx, AV_LOG_ERROR,
1486 "hw_frames_ctx must match the GPU frame type\n");
1487 return AVERROR(EINVAL);
1489 ctx->data_pix_fmt = frames_ctx->sw_format;
1491 ctx->data_pix_fmt = avctx->pix_fmt;
1494 if ((ret = nvenc_load_libraries(avctx)) < 0)
1497 if ((ret = nvenc_setup_device(avctx)) < 0)
1500 if ((ret = nvenc_setup_encoder(avctx)) < 0)
1503 if ((ret = nvenc_setup_surfaces(avctx)) < 0)
1506 if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1507 if ((ret = nvenc_setup_extradata(avctx)) < 0)
1514 static NvencSurface *get_free_frame(NvencContext *ctx)
1516 NvencSurface *tmp_surf;
1518 if (!(av_fifo_size(ctx->unused_surface_queue) > 0))
1522 av_fifo_generic_read(ctx->unused_surface_queue, &tmp_surf, sizeof(tmp_surf), NULL);
1526 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
1527 NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
1529 int dst_linesize[4] = {
1530 lock_buffer_params->pitch,
1531 lock_buffer_params->pitch,
1532 lock_buffer_params->pitch,
1533 lock_buffer_params->pitch
1535 uint8_t *dst_data[4];
1538 if (frame->format == AV_PIX_FMT_YUV420P)
1539 dst_linesize[1] = dst_linesize[2] >>= 1;
1541 ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
1542 lock_buffer_params->bufferDataPtr, dst_linesize);
1546 if (frame->format == AV_PIX_FMT_YUV420P)
1547 FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
1549 av_image_copy(dst_data, dst_linesize,
1550 (const uint8_t**)frame->data, frame->linesize, frame->format,
1551 avctx->width, avctx->height);
1556 static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
1558 NvencContext *ctx = avctx->priv_data;
1559 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1560 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1561 NVENCSTATUS nv_status;
1565 if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
1566 for (first_round = 1; first_round >= 0; first_round--) {
1567 for (i = 0; i < ctx->nb_registered_frames; i++) {
1568 if (!ctx->registered_frames[i].mapped) {
1569 if (ctx->registered_frames[i].regptr) {
1572 nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1573 if (nv_status != NV_ENC_SUCCESS)
1574 return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
1575 ctx->registered_frames[i].ptr = NULL;
1576 ctx->registered_frames[i].regptr = NULL;
1583 return ctx->nb_registered_frames++;
1586 av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
1587 return AVERROR(ENOMEM);
1590 static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
1592 NvencContext *ctx = avctx->priv_data;
1593 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1594 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1596 AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
1597 NV_ENC_REGISTER_RESOURCE reg;
1600 for (i = 0; i < ctx->nb_registered_frames; i++) {
1601 if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
1603 else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
1607 idx = nvenc_find_free_reg_resource(avctx);
1611 reg.version = NV_ENC_REGISTER_RESOURCE_VER;
1612 reg.width = frames_ctx->width;
1613 reg.height = frames_ctx->height;
1614 reg.pitch = frame->linesize[0];
1615 reg.resourceToRegister = frame->data[0];
1617 if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1618 reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
1620 else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1621 reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
1622 reg.subResourceIndex = (intptr_t)frame->data[1];
1625 reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
1626 if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1627 av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1628 av_get_pix_fmt_name(frames_ctx->sw_format));
1629 return AVERROR(EINVAL);
1632 ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, ®);
1633 if (ret != NV_ENC_SUCCESS) {
1634 nvenc_print_error(avctx, ret, "Error registering an input resource");
1635 return AVERROR_UNKNOWN;
1638 ctx->registered_frames[idx].ptr = frame->data[0];
1639 ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
1640 ctx->registered_frames[idx].regptr = reg.registeredResource;
1644 static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame,
1645 NvencSurface *nvenc_frame)
1647 NvencContext *ctx = avctx->priv_data;
1648 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1649 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1652 NVENCSTATUS nv_status;
1654 if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1655 int reg_idx = nvenc_register_frame(avctx, frame);
1657 av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
1661 res = av_frame_ref(nvenc_frame->in_ref, frame);
1665 if (!ctx->registered_frames[reg_idx].mapped) {
1666 ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
1667 ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
1668 nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
1669 if (nv_status != NV_ENC_SUCCESS) {
1670 av_frame_unref(nvenc_frame->in_ref);
1671 return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
1675 ctx->registered_frames[reg_idx].mapped += 1;
1677 nvenc_frame->reg_idx = reg_idx;
1678 nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
1679 nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
1680 nvenc_frame->pitch = frame->linesize[0];
1684 NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
1686 lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
1687 lockBufferParams.inputBuffer = nvenc_frame->input_surface;
1689 nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
1690 if (nv_status != NV_ENC_SUCCESS) {
1691 return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
1694 nvenc_frame->pitch = lockBufferParams.pitch;
1695 res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
1697 nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
1698 if (nv_status != NV_ENC_SUCCESS) {
1699 return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
1706 static void nvenc_codec_specific_pic_params(AVCodecContext *avctx,
1707 NV_ENC_PIC_PARAMS *params,
1708 NV_ENC_SEI_PAYLOAD *sei_data)
1710 NvencContext *ctx = avctx->priv_data;
1712 switch (avctx->codec->id) {
1713 case AV_CODEC_ID_H264:
1714 params->codecPicParams.h264PicParams.sliceMode =
1715 ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
1716 params->codecPicParams.h264PicParams.sliceModeData =
1717 ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1719 params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
1720 params->codecPicParams.h264PicParams.seiPayloadArrayCnt = 1;
1724 case AV_CODEC_ID_HEVC:
1725 params->codecPicParams.hevcPicParams.sliceMode =
1726 ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
1727 params->codecPicParams.hevcPicParams.sliceModeData =
1728 ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1730 params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
1731 params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = 1;
1738 static inline void timestamp_queue_enqueue(AVFifoBuffer* queue, int64_t timestamp)
1740 av_fifo_generic_write(queue, ×tamp, sizeof(timestamp), NULL);
1743 static inline int64_t timestamp_queue_dequeue(AVFifoBuffer* queue)
1745 int64_t timestamp = AV_NOPTS_VALUE;
1746 if (av_fifo_size(queue) > 0)
1747 av_fifo_generic_read(queue, ×tamp, sizeof(timestamp), NULL);
1752 static int nvenc_set_timestamp(AVCodecContext *avctx,
1753 NV_ENC_LOCK_BITSTREAM *params,
1756 NvencContext *ctx = avctx->priv_data;
1758 pkt->pts = params->outputTimeStamp;
1760 /* generate the first dts by linearly extrapolating the
1761 * first two pts values to the past */
1762 if (avctx->max_b_frames > 0 && !ctx->first_packet_output &&
1763 ctx->initial_pts[1] != AV_NOPTS_VALUE) {
1764 int64_t ts0 = ctx->initial_pts[0], ts1 = ctx->initial_pts[1];
1767 if ((ts0 < 0 && ts1 > INT64_MAX + ts0) ||
1768 (ts0 > 0 && ts1 < INT64_MIN + ts0))
1769 return AVERROR(ERANGE);
1772 if ((delta < 0 && ts0 > INT64_MAX + delta) ||
1773 (delta > 0 && ts0 < INT64_MIN + delta))
1774 return AVERROR(ERANGE);
1775 pkt->dts = ts0 - delta;
1777 ctx->first_packet_output = 1;
1781 pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
1786 static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
1788 NvencContext *ctx = avctx->priv_data;
1789 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1790 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1792 uint32_t slice_mode_data;
1793 uint32_t *slice_offsets = NULL;
1794 NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
1795 NVENCSTATUS nv_status;
1798 enum AVPictureType pict_type;
1800 switch (avctx->codec->id) {
1801 case AV_CODEC_ID_H264:
1802 slice_mode_data = ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1804 case AV_CODEC_ID_H265:
1805 slice_mode_data = ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1808 av_log(avctx, AV_LOG_ERROR, "Unknown codec name\n");
1809 res = AVERROR(EINVAL);
1812 slice_offsets = av_mallocz(slice_mode_data * sizeof(*slice_offsets));
1814 if (!slice_offsets) {
1815 res = AVERROR(ENOMEM);
1819 lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
1821 lock_params.doNotWait = 0;
1822 lock_params.outputBitstream = tmpoutsurf->output_surface;
1823 lock_params.sliceOffsets = slice_offsets;
1825 nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
1826 if (nv_status != NV_ENC_SUCCESS) {
1827 res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
1831 if (res = ff_alloc_packet2(avctx, pkt, lock_params.bitstreamSizeInBytes,0)) {
1832 p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1836 memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
1838 nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1839 if (nv_status != NV_ENC_SUCCESS) {
1840 res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
1845 if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1846 ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
1847 if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
1848 nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
1849 if (nv_status != NV_ENC_SUCCESS) {
1850 res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
1853 } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
1858 av_frame_unref(tmpoutsurf->in_ref);
1860 tmpoutsurf->input_surface = NULL;
1863 switch (lock_params.pictureType) {
1864 case NV_ENC_PIC_TYPE_IDR:
1865 pkt->flags |= AV_PKT_FLAG_KEY;
1866 case NV_ENC_PIC_TYPE_I:
1867 pict_type = AV_PICTURE_TYPE_I;
1869 case NV_ENC_PIC_TYPE_P:
1870 pict_type = AV_PICTURE_TYPE_P;
1872 case NV_ENC_PIC_TYPE_B:
1873 pict_type = AV_PICTURE_TYPE_B;
1875 case NV_ENC_PIC_TYPE_BI:
1876 pict_type = AV_PICTURE_TYPE_BI;
1879 av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
1880 av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
1881 res = AVERROR_EXTERNAL;
1885 #if FF_API_CODED_FRAME
1886 FF_DISABLE_DEPRECATION_WARNINGS
1887 avctx->coded_frame->pict_type = pict_type;
1888 FF_ENABLE_DEPRECATION_WARNINGS
1891 ff_side_data_set_encoder_stats(pkt,
1892 (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
1894 res = nvenc_set_timestamp(avctx, &lock_params, pkt);
1898 av_free(slice_offsets);
1903 timestamp_queue_dequeue(ctx->timestamp_list);
1906 av_free(slice_offsets);
1911 static int output_ready(AVCodecContext *avctx, int flush)
1913 NvencContext *ctx = avctx->priv_data;
1914 int nb_ready, nb_pending;
1916 /* when B-frames are enabled, we wait for two initial timestamps to
1917 * calculate the first dts */
1918 if (!flush && avctx->max_b_frames > 0 &&
1919 (ctx->initial_pts[0] == AV_NOPTS_VALUE || ctx->initial_pts[1] == AV_NOPTS_VALUE))
1922 nb_ready = av_fifo_size(ctx->output_surface_ready_queue) / sizeof(NvencSurface*);
1923 nb_pending = av_fifo_size(ctx->output_surface_queue) / sizeof(NvencSurface*);
1925 return nb_ready > 0;
1926 return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
1929 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
1931 NvencContext *ctx = avctx->priv_data;
1932 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
1935 NV_ENC_RECONFIGURE_PARAMS params = { 0 };
1936 int needs_reconfig = 0;
1937 int needs_encode_config = 0;
1938 int reconfig_bitrate = 0, reconfig_dar = 0;
1941 params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
1942 params.reInitEncodeParams = ctx->init_encode_params;
1944 compute_dar(avctx, &dw, &dh);
1945 if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
1946 av_log(avctx, AV_LOG_VERBOSE,
1947 "aspect ratio change (DAR): %d:%d -> %d:%d\n",
1948 ctx->init_encode_params.darWidth,
1949 ctx->init_encode_params.darHeight, dw, dh);
1951 params.reInitEncodeParams.darHeight = dh;
1952 params.reInitEncodeParams.darWidth = dw;
1958 if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
1959 if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
1960 av_log(avctx, AV_LOG_VERBOSE,
1961 "avg bitrate change: %d -> %d\n",
1962 params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
1963 (uint32_t)avctx->bit_rate);
1965 params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
1966 reconfig_bitrate = 1;
1969 if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
1970 av_log(avctx, AV_LOG_VERBOSE,
1971 "max bitrate change: %d -> %d\n",
1972 params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
1973 (uint32_t)avctx->rc_max_rate);
1975 params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
1976 reconfig_bitrate = 1;
1979 if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
1980 av_log(avctx, AV_LOG_VERBOSE,
1981 "vbv buffer size change: %d -> %d\n",
1982 params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
1983 avctx->rc_buffer_size);
1985 params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
1986 reconfig_bitrate = 1;
1989 if (reconfig_bitrate) {
1990 params.resetEncoder = 1;
1991 params.forceIDR = 1;
1993 needs_encode_config = 1;
1998 if (!needs_encode_config)
1999 params.reInitEncodeParams.encodeConfig = NULL;
2001 if (needs_reconfig) {
2002 ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, ¶ms);
2003 if (ret != NV_ENC_SUCCESS) {
2004 nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2007 ctx->init_encode_params.darHeight = dh;
2008 ctx->init_encode_params.darWidth = dw;
2011 if (reconfig_bitrate) {
2012 ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2013 ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2014 ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2021 int ff_nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
2023 NVENCSTATUS nv_status;
2024 NvencSurface *tmp_out_surf, *in_surf;
2026 NV_ENC_SEI_PAYLOAD *sei_data = NULL;
2029 NvencContext *ctx = avctx->priv_data;
2030 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2031 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2033 NV_ENC_PIC_PARAMS pic_params = { 0 };
2034 pic_params.version = NV_ENC_PIC_PARAMS_VER;
2036 if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2037 return AVERROR(EINVAL);
2039 if (ctx->encoder_flushing) {
2040 if (avctx->internal->draining)
2043 ctx->encoder_flushing = 0;
2044 ctx->first_packet_output = 0;
2045 ctx->initial_pts[0] = AV_NOPTS_VALUE;
2046 ctx->initial_pts[1] = AV_NOPTS_VALUE;
2047 av_fifo_reset(ctx->timestamp_list);
2051 in_surf = get_free_frame(ctx);
2053 return AVERROR(EAGAIN);
2055 res = nvenc_push_context(avctx);
2059 reconfig_encoder(avctx, frame);
2061 res = nvenc_upload_frame(avctx, frame, in_surf);
2063 res2 = nvenc_pop_context(avctx);
2070 pic_params.inputBuffer = in_surf->input_surface;
2071 pic_params.bufferFmt = in_surf->format;
2072 pic_params.inputWidth = in_surf->width;
2073 pic_params.inputHeight = in_surf->height;
2074 pic_params.inputPitch = in_surf->pitch;
2075 pic_params.outputBitstream = in_surf->output_surface;
2077 if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
2078 if (frame->top_field_first)
2079 pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
2081 pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
2083 pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
2086 if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
2087 pic_params.encodePicFlags =
2088 ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
2090 pic_params.encodePicFlags = 0;
2093 pic_params.inputTimeStamp = frame->pts;
2095 if (ctx->a53_cc && av_frame_get_side_data(frame, AV_FRAME_DATA_A53_CC)) {
2096 if (ff_alloc_a53_sei(frame, sizeof(NV_ENC_SEI_PAYLOAD), (void**)&sei_data, &sei_size) < 0) {
2097 av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2101 sei_data->payloadSize = (uint32_t)sei_size;
2102 sei_data->payloadType = 4;
2103 sei_data->payload = (uint8_t*)(sei_data + 1);
2107 nvenc_codec_specific_pic_params(avctx, &pic_params, sei_data);
2109 pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
2110 ctx->encoder_flushing = 1;
2113 res = nvenc_push_context(avctx);
2117 nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
2120 res = nvenc_pop_context(avctx);
2124 if (nv_status != NV_ENC_SUCCESS &&
2125 nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
2126 return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
2129 av_fifo_generic_write(ctx->output_surface_queue, &in_surf, sizeof(in_surf), NULL);
2130 timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
2132 if (ctx->initial_pts[0] == AV_NOPTS_VALUE)
2133 ctx->initial_pts[0] = frame->pts;
2134 else if (ctx->initial_pts[1] == AV_NOPTS_VALUE)
2135 ctx->initial_pts[1] = frame->pts;
2138 /* all the pending buffers are now ready for output */
2139 if (nv_status == NV_ENC_SUCCESS) {
2140 while (av_fifo_size(ctx->output_surface_queue) > 0) {
2141 av_fifo_generic_read(ctx->output_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2142 av_fifo_generic_write(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2149 int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
2151 NvencSurface *tmp_out_surf;
2154 NvencContext *ctx = avctx->priv_data;
2156 if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2157 return AVERROR(EINVAL);
2159 if (output_ready(avctx, ctx->encoder_flushing)) {
2160 av_fifo_generic_read(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2162 res = nvenc_push_context(avctx);
2166 res = process_output_surface(avctx, pkt, tmp_out_surf);
2168 res2 = nvenc_pop_context(avctx);
2175 av_fifo_generic_write(ctx->unused_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2176 } else if (ctx->encoder_flushing) {
2179 return AVERROR(EAGAIN);
2185 int ff_nvenc_encode_frame(AVCodecContext *avctx, AVPacket *pkt,
2186 const AVFrame *frame, int *got_packet)
2188 NvencContext *ctx = avctx->priv_data;
2191 if (!ctx->encoder_flushing) {
2192 res = ff_nvenc_send_frame(avctx, frame);
2197 res = ff_nvenc_receive_packet(avctx, pkt);
2198 if (res == AVERROR(EAGAIN) || res == AVERROR_EOF) {
2200 } else if (res < 0) {