2 * H.264/HEVC hardware encoding using nvidia nvenc
3 * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
5 * This file is part of FFmpeg.
7 * FFmpeg is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * FFmpeg is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with FFmpeg; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
24 #if defined(_WIN32) || defined(__CYGWIN__)
25 # define CUDA_LIBNAME "nvcuda.dll"
27 # define NVENC_LIBNAME "nvEncodeAPI64.dll"
29 # define NVENC_LIBNAME "nvEncodeAPI.dll"
32 # define CUDA_LIBNAME "libcuda.so.1"
33 # define NVENC_LIBNAME "libnvidia-encode.so.1"
37 #include "compat/w32dlfcn.h"
42 #include "libavutil/hwcontext.h"
43 #include "libavutil/imgutils.h"
44 #include "libavutil/avassert.h"
45 #include "libavutil/mem.h"
49 #define NVENC_CAP 0x30
50 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
51 rc == NV_ENC_PARAMS_RC_2_PASS_QUALITY || \
52 rc == NV_ENC_PARAMS_RC_2_PASS_FRAMESIZE_CAP)
54 #define LOAD_LIBRARY(l, path) \
56 if (!((l) = dlopen(path, RTLD_LAZY))) { \
57 av_log(avctx, AV_LOG_ERROR, \
60 return AVERROR_UNKNOWN; \
64 #define LOAD_SYMBOL(fun, lib, symbol) \
66 if (!((fun) = dlsym(lib, symbol))) { \
67 av_log(avctx, AV_LOG_ERROR, \
70 return AVERROR_UNKNOWN; \
74 const enum AVPixelFormat ff_nvenc_pix_fmts[] = {
88 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
89 pix_fmt == AV_PIX_FMT_YUV444P16)
91 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
92 pix_fmt == AV_PIX_FMT_YUV444P16)
99 { NV_ENC_SUCCESS, 0, "success" },
100 { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
101 { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
102 { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
103 { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
104 { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
105 { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
106 { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
107 { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
108 { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
109 { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
110 { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
111 { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
112 { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
113 { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
114 { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
115 { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
116 { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
117 { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
118 { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
119 { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
120 { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
121 { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
122 { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
123 { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
124 { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
127 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
130 for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
131 if (nvenc_errors[i].nverr == err) {
133 *desc = nvenc_errors[i].desc;
134 return nvenc_errors[i].averr;
138 *desc = "unknown error";
139 return AVERROR_UNKNOWN;
142 static int nvenc_print_error(void *log_ctx, NVENCSTATUS err,
143 const char *error_string)
147 ret = nvenc_map_error(err, &desc);
148 av_log(log_ctx, AV_LOG_ERROR, "%s: %s (%d)\n", error_string, desc, err);
152 static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
154 NvencContext *ctx = avctx->priv_data;
155 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
156 PNVENCODEAPIGETMAXSUPPORTEDVERSION nvenc_get_max_ver;
157 PNVENCODEAPICREATEINSTANCE nvenc_create_instance;
159 uint32_t nvenc_max_ver;
162 dl_fn->cu_init = cuInit;
163 dl_fn->cu_device_get_count = cuDeviceGetCount;
164 dl_fn->cu_device_get = cuDeviceGet;
165 dl_fn->cu_device_get_name = cuDeviceGetName;
166 dl_fn->cu_device_compute_capability = cuDeviceComputeCapability;
167 dl_fn->cu_ctx_create = cuCtxCreate_v2;
168 dl_fn->cu_ctx_pop_current = cuCtxPopCurrent_v2;
169 dl_fn->cu_ctx_destroy = cuCtxDestroy_v2;
171 LOAD_LIBRARY(dl_fn->cuda, CUDA_LIBNAME);
173 LOAD_SYMBOL(dl_fn->cu_init, dl_fn->cuda, "cuInit");
174 LOAD_SYMBOL(dl_fn->cu_device_get_count, dl_fn->cuda, "cuDeviceGetCount");
175 LOAD_SYMBOL(dl_fn->cu_device_get, dl_fn->cuda, "cuDeviceGet");
176 LOAD_SYMBOL(dl_fn->cu_device_get_name, dl_fn->cuda, "cuDeviceGetName");
177 LOAD_SYMBOL(dl_fn->cu_device_compute_capability, dl_fn->cuda,
178 "cuDeviceComputeCapability");
179 LOAD_SYMBOL(dl_fn->cu_ctx_create, dl_fn->cuda, "cuCtxCreate_v2");
180 LOAD_SYMBOL(dl_fn->cu_ctx_pop_current, dl_fn->cuda, "cuCtxPopCurrent_v2");
181 LOAD_SYMBOL(dl_fn->cu_ctx_destroy, dl_fn->cuda, "cuCtxDestroy_v2");
184 LOAD_LIBRARY(dl_fn->nvenc, NVENC_LIBNAME);
186 LOAD_SYMBOL(nvenc_get_max_ver, dl_fn->nvenc,
187 "NvEncodeAPIGetMaxSupportedVersion");
188 LOAD_SYMBOL(nvenc_create_instance, dl_fn->nvenc,
189 "NvEncodeAPICreateInstance");
191 err = nvenc_get_max_ver(&nvenc_max_ver);
192 if (err != NV_ENC_SUCCESS)
193 return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
195 av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
197 if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
198 av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
199 "Required: %d.%d Found: %d.%d\n",
200 NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
201 nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
202 return AVERROR(ENOSYS);
205 dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
207 err = nvenc_create_instance(&dl_fn->nvenc_funcs);
208 if (err != NV_ENC_SUCCESS)
209 return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
211 av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
216 static av_cold int nvenc_open_session(AVCodecContext *avctx)
218 NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
219 NvencContext *ctx = avctx->priv_data;
220 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
223 params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
224 params.apiVersion = NVENCAPI_VERSION;
225 params.device = ctx->cu_context;
226 params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
228 ret = p_nvenc->nvEncOpenEncodeSessionEx(¶ms, &ctx->nvencoder);
229 if (ret != NV_ENC_SUCCESS) {
230 ctx->nvencoder = NULL;
231 return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
237 static int nvenc_check_codec_support(AVCodecContext *avctx)
239 NvencContext *ctx = avctx->priv_data;
240 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
241 int i, ret, count = 0;
244 ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
246 if (ret != NV_ENC_SUCCESS || !count)
247 return AVERROR(ENOSYS);
249 guids = av_malloc(count * sizeof(GUID));
251 return AVERROR(ENOMEM);
253 ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
254 if (ret != NV_ENC_SUCCESS) {
255 ret = AVERROR(ENOSYS);
259 ret = AVERROR(ENOSYS);
260 for (i = 0; i < count; i++) {
261 if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
273 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
275 NvencContext *ctx = avctx->priv_data;
276 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
277 NV_ENC_CAPS_PARAM params = { 0 };
280 params.version = NV_ENC_CAPS_PARAM_VER;
281 params.capsToQuery = cap;
283 ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, ¶ms, &val);
285 if (ret == NV_ENC_SUCCESS)
290 static int nvenc_check_capabilities(AVCodecContext *avctx)
292 NvencContext *ctx = avctx->priv_data;
295 ret = nvenc_check_codec_support(avctx);
297 av_log(avctx, AV_LOG_VERBOSE, "Codec not supported\n");
301 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
302 if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
303 av_log(avctx, AV_LOG_VERBOSE, "YUV444P not supported\n");
304 return AVERROR(ENOSYS);
307 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
308 if (ctx->preset >= PRESET_LOSSLESS_DEFAULT && ret <= 0) {
309 av_log(avctx, AV_LOG_VERBOSE, "Lossless encoding not supported\n");
310 return AVERROR(ENOSYS);
313 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
314 if (ret < avctx->width) {
315 av_log(avctx, AV_LOG_VERBOSE, "Width %d exceeds %d\n",
317 return AVERROR(ENOSYS);
320 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
321 if (ret < avctx->height) {
322 av_log(avctx, AV_LOG_VERBOSE, "Height %d exceeds %d\n",
324 return AVERROR(ENOSYS);
327 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
328 if (ret < avctx->max_b_frames) {
329 av_log(avctx, AV_LOG_VERBOSE, "Max B-frames %d exceed %d\n",
330 avctx->max_b_frames, ret);
332 return AVERROR(ENOSYS);
335 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
336 if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
337 av_log(avctx, AV_LOG_VERBOSE,
338 "Interlaced encoding is not supported. Supported level: %d\n",
340 return AVERROR(ENOSYS);
343 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
344 if (IS_10BIT(ctx->data_pix_fmt) && ret <= 0) {
345 av_log(avctx, AV_LOG_VERBOSE, "10 bit encode not supported\n");
346 return AVERROR(ENOSYS);
349 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
350 if (ctx->rc_lookahead > 0 && ret <= 0) {
351 av_log(avctx, AV_LOG_VERBOSE, "RC lookahead not supported\n");
352 return AVERROR(ENOSYS);
355 ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
356 if (ctx->temporal_aq > 0 && ret <= 0) {
357 av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ not supported\n");
358 return AVERROR(ENOSYS);
364 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
366 NvencContext *ctx = avctx->priv_data;
367 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
368 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
369 char name[128] = { 0};
370 int major, minor, ret;
374 int loglevel = AV_LOG_VERBOSE;
376 if (ctx->device == LIST_DEVICES)
377 loglevel = AV_LOG_INFO;
379 cu_res = dl_fn->cu_device_get(&cu_device, idx);
380 if (cu_res != CUDA_SUCCESS) {
381 av_log(avctx, AV_LOG_ERROR,
382 "Cannot access the CUDA device %d\n",
387 cu_res = dl_fn->cu_device_get_name(name, sizeof(name), cu_device);
388 if (cu_res != CUDA_SUCCESS)
391 cu_res = dl_fn->cu_device_compute_capability(&major, &minor, cu_device);
392 if (cu_res != CUDA_SUCCESS)
395 av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
396 if (((major << 4) | minor) < NVENC_CAP) {
397 av_log(avctx, loglevel, "does not support NVENC\n");
401 cu_res = dl_fn->cu_ctx_create(&ctx->cu_context_internal, 0, cu_device);
402 if (cu_res != CUDA_SUCCESS) {
403 av_log(avctx, AV_LOG_FATAL, "Failed creating CUDA context for NVENC: 0x%x\n", (int)cu_res);
407 ctx->cu_context = ctx->cu_context_internal;
409 cu_res = dl_fn->cu_ctx_pop_current(&dummy);
410 if (cu_res != CUDA_SUCCESS) {
411 av_log(avctx, AV_LOG_FATAL, "Failed popping CUDA context: 0x%x\n", (int)cu_res);
415 if ((ret = nvenc_open_session(avctx)) < 0)
418 if ((ret = nvenc_check_capabilities(avctx)) < 0)
421 av_log(avctx, loglevel, "supports NVENC\n");
423 dl_fn->nvenc_device_count++;
425 if (ctx->device == dl_fn->nvenc_device_count - 1 || ctx->device == ANY_DEVICE)
429 p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
430 ctx->nvencoder = NULL;
433 dl_fn->cu_ctx_destroy(ctx->cu_context_internal);
434 ctx->cu_context_internal = NULL;
437 return AVERROR(ENOSYS);
440 static av_cold int nvenc_setup_device(AVCodecContext *avctx)
442 NvencContext *ctx = avctx->priv_data;
443 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
445 switch (avctx->codec->id) {
446 case AV_CODEC_ID_H264:
447 ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
449 case AV_CODEC_ID_HEVC:
450 ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
456 if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
458 AVHWFramesContext *frames_ctx;
459 AVCUDADeviceContext *device_hwctx;
462 if (!avctx->hw_frames_ctx)
463 return AVERROR(EINVAL);
465 frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
466 device_hwctx = frames_ctx->device_ctx->hwctx;
468 ctx->cu_context = device_hwctx->cuda_ctx;
470 ret = nvenc_open_session(avctx);
474 ret = nvenc_check_capabilities(avctx);
476 av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
483 int i, nb_devices = 0;
485 if ((dl_fn->cu_init(0)) != CUDA_SUCCESS) {
486 av_log(avctx, AV_LOG_ERROR,
487 "Cannot init CUDA\n");
488 return AVERROR_UNKNOWN;
491 if ((dl_fn->cu_device_get_count(&nb_devices)) != CUDA_SUCCESS) {
492 av_log(avctx, AV_LOG_ERROR,
493 "Cannot enumerate the CUDA devices\n");
494 return AVERROR_UNKNOWN;
498 av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
499 return AVERROR_EXTERNAL;
502 av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
504 dl_fn->nvenc_device_count = 0;
505 for (i = 0; i < nb_devices; ++i) {
506 if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
510 if (ctx->device == LIST_DEVICES)
513 if (!dl_fn->nvenc_device_count) {
514 av_log(avctx, AV_LOG_FATAL, "No NVENC capable devices found\n");
515 return AVERROR_EXTERNAL;
518 av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, dl_fn->nvenc_device_count);
519 return AVERROR(EINVAL);
525 typedef struct GUIDTuple {
530 #define PRESET_ALIAS(alias, name, ...) \
531 [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
533 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
535 static void nvenc_map_preset(NvencContext *ctx)
537 GUIDTuple presets[] = {
542 PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
543 PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
544 PRESET_ALIAS(FAST, HP, NVENC_ONE_PASS),
545 PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
546 PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
547 PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
548 PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
549 PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
552 GUIDTuple *t = &presets[ctx->preset];
554 ctx->init_encode_params.presetGUID = t->guid;
555 ctx->flags = t->flags;
561 static av_cold void set_constqp(AVCodecContext *avctx)
563 NvencContext *ctx = avctx->priv_data;
564 NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
566 rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
567 rc->constQP.qpInterB = avctx->global_quality;
568 rc->constQP.qpInterP = avctx->global_quality;
569 rc->constQP.qpIntra = avctx->global_quality;
575 static av_cold void set_vbr(AVCodecContext *avctx)
577 NvencContext *ctx = avctx->priv_data;
578 NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
581 if (avctx->qmin >= 0 && avctx->qmax >= 0) {
585 rc->minQP.qpInterB = avctx->qmin;
586 rc->minQP.qpInterP = avctx->qmin;
587 rc->minQP.qpIntra = avctx->qmin;
589 rc->maxQP.qpInterB = avctx->qmax;
590 rc->maxQP.qpInterP = avctx->qmax;
591 rc->maxQP.qpIntra = avctx->qmax;
593 qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
594 } else if (avctx->qmin >= 0) {
597 rc->minQP.qpInterB = avctx->qmin;
598 rc->minQP.qpInterP = avctx->qmin;
599 rc->minQP.qpIntra = avctx->qmin;
601 qp_inter_p = avctx->qmin;
603 qp_inter_p = 26; // default to 26
606 rc->enableInitialRCQP = 1;
607 rc->initialRCQP.qpInterP = qp_inter_p;
609 if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
610 rc->initialRCQP.qpIntra = av_clip(
611 qp_inter_p * fabs(avctx->i_quant_factor) + avctx->i_quant_offset, 0, 51);
612 rc->initialRCQP.qpInterB = av_clip(
613 qp_inter_p * fabs(avctx->b_quant_factor) + avctx->b_quant_offset, 0, 51);
615 rc->initialRCQP.qpIntra = qp_inter_p;
616 rc->initialRCQP.qpInterB = qp_inter_p;
620 static av_cold void set_lossless(AVCodecContext *avctx)
622 NvencContext *ctx = avctx->priv_data;
623 NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
625 rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
626 rc->constQP.qpInterB = 0;
627 rc->constQP.qpInterP = 0;
628 rc->constQP.qpIntra = 0;
634 static void nvenc_override_rate_control(AVCodecContext *avctx)
636 NvencContext *ctx = avctx->priv_data;
637 NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
640 case NV_ENC_PARAMS_RC_CONSTQP:
641 if (avctx->global_quality <= 0) {
642 av_log(avctx, AV_LOG_WARNING,
643 "The constant quality rate-control requires "
644 "the 'global_quality' option set.\n");
649 case NV_ENC_PARAMS_RC_2_PASS_VBR:
650 case NV_ENC_PARAMS_RC_VBR:
651 if (avctx->qmin < 0 && avctx->qmax < 0) {
652 av_log(avctx, AV_LOG_WARNING,
653 "The variable bitrate rate-control requires "
654 "the 'qmin' and/or 'qmax' option set.\n");
658 case NV_ENC_PARAMS_RC_VBR_MINQP:
659 if (avctx->qmin < 0) {
660 av_log(avctx, AV_LOG_WARNING,
661 "The variable bitrate rate-control requires "
662 "the 'qmin' option set.\n");
668 case NV_ENC_PARAMS_RC_CBR:
669 case NV_ENC_PARAMS_RC_2_PASS_QUALITY:
670 case NV_ENC_PARAMS_RC_2_PASS_FRAMESIZE_CAP:
674 rc->rateControlMode = ctx->rc;
677 static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
679 NvencContext *ctx = avctx->priv_data;
681 if (avctx->bit_rate > 0) {
682 ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
683 } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
684 ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
687 if (avctx->rc_max_rate > 0)
688 ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
691 if (ctx->flags & NVENC_ONE_PASS)
693 if (ctx->flags & NVENC_TWO_PASSES)
696 if (ctx->twopass < 0)
697 ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
701 ctx->rc = NV_ENC_PARAMS_RC_2_PASS_QUALITY;
703 ctx->rc = NV_ENC_PARAMS_RC_CBR;
705 } else if (avctx->global_quality > 0) {
706 ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
707 } else if (ctx->twopass) {
708 ctx->rc = NV_ENC_PARAMS_RC_2_PASS_VBR;
709 } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
710 ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
714 if (ctx->flags & NVENC_LOSSLESS) {
716 } else if (ctx->rc >= 0) {
717 nvenc_override_rate_control(avctx);
719 ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
723 if (avctx->rc_buffer_size > 0) {
724 ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
725 } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
726 ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
730 ctx->encode_config.rcParams.enableAQ = 1;
731 ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
732 av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
735 if (ctx->temporal_aq) {
736 ctx->encode_config.rcParams.enableTemporalAQ = 1;
737 av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
740 if (ctx->rc_lookahead) {
741 int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
742 ctx->encode_config.frameIntervalP - 4;
745 av_log(avctx, AV_LOG_WARNING,
746 "Lookahead not enabled. Increase buffer delay (-delay).\n");
748 ctx->encode_config.rcParams.enableLookahead = 1;
749 ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
750 ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
751 ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
752 av_log(avctx, AV_LOG_VERBOSE,
753 "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
754 ctx->encode_config.rcParams.lookaheadDepth,
755 ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
756 ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
760 if (ctx->strict_gop) {
761 ctx->encode_config.rcParams.strictGOPTarget = 1;
762 av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
766 ctx->encode_config.rcParams.enableNonRefP = 1;
768 if (ctx->zerolatency)
769 ctx->encode_config.rcParams.zeroReorderDelay = 1;
772 ctx->encode_config.rcParams.targetQuality = ctx->quality;
775 static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
777 NvencContext *ctx = avctx->priv_data;
778 NV_ENC_CONFIG *cc = &ctx->encode_config;
779 NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
780 NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
782 vui->colourMatrix = avctx->colorspace;
783 vui->colourPrimaries = avctx->color_primaries;
784 vui->transferCharacteristics = avctx->color_trc;
785 vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
786 || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
788 vui->colourDescriptionPresentFlag =
789 (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
791 vui->videoSignalTypePresentFlag =
792 (vui->colourDescriptionPresentFlag
793 || vui->videoFormat != 5
794 || vui->videoFullRangeFlag != 0);
797 h264->sliceModeData = 1;
799 h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
800 h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
803 if (avctx->refs >= 0) {
804 /* 0 means "let the hardware decide" */
805 h264->maxNumRefFrames = avctx->refs;
807 if (avctx->gop_size >= 0) {
808 h264->idrPeriod = cc->gopLength;
811 if (IS_CBR(cc->rcParams.rateControlMode)) {
812 h264->outputBufferingPeriodSEI = 1;
813 h264->outputPictureTimingSEI = 1;
816 if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_2_PASS_QUALITY ||
817 cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_2_PASS_FRAMESIZE_CAP ||
818 cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_2_PASS_VBR) {
819 h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
820 h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
823 if (ctx->flags & NVENC_LOSSLESS) {
824 h264->qpPrimeYZeroTransformBypassFlag = 1;
826 switch(ctx->profile) {
827 case NV_ENC_H264_PROFILE_BASELINE:
828 cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
829 avctx->profile = FF_PROFILE_H264_BASELINE;
831 case NV_ENC_H264_PROFILE_MAIN:
832 cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
833 avctx->profile = FF_PROFILE_H264_MAIN;
835 case NV_ENC_H264_PROFILE_HIGH:
836 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
837 avctx->profile = FF_PROFILE_H264_HIGH;
839 case NV_ENC_H264_PROFILE_HIGH_444P:
840 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
841 avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
846 // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
847 if (ctx->data_pix_fmt == AV_PIX_FMT_YUV444P) {
848 cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
849 avctx->profile = FF_PROFILE_H264_HIGH_444_PREDICTIVE;
852 h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
854 h264->level = ctx->level;
859 static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
861 NvencContext *ctx = avctx->priv_data;
862 NV_ENC_CONFIG *cc = &ctx->encode_config;
863 NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
864 NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
866 vui->colourMatrix = avctx->colorspace;
867 vui->colourPrimaries = avctx->color_primaries;
868 vui->transferCharacteristics = avctx->color_trc;
869 vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
870 || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
872 vui->colourDescriptionPresentFlag =
873 (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
875 vui->videoSignalTypePresentFlag =
876 (vui->colourDescriptionPresentFlag
877 || vui->videoFormat != 5
878 || vui->videoFullRangeFlag != 0);
881 hevc->sliceModeData = 1;
883 hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
884 hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
887 if (avctx->refs >= 0) {
888 /* 0 means "let the hardware decide" */
889 hevc->maxNumRefFramesInDPB = avctx->refs;
891 if (avctx->gop_size >= 0) {
892 hevc->idrPeriod = cc->gopLength;
895 if (IS_CBR(cc->rcParams.rateControlMode)) {
896 hevc->outputBufferingPeriodSEI = 1;
897 hevc->outputPictureTimingSEI = 1;
900 switch(ctx->profile) {
901 case NV_ENC_HEVC_PROFILE_MAIN:
902 cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
903 avctx->profile = FF_PROFILE_HEVC_MAIN;
905 case NV_ENC_HEVC_PROFILE_MAIN_10:
906 cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
907 avctx->profile = FF_PROFILE_HEVC_MAIN_10;
909 case NV_ENC_HEVC_PROFILE_REXT:
910 cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
911 avctx->profile = FF_PROFILE_HEVC_REXT;
915 // force setting profile as main10 if input is 10 bit
916 if (IS_10BIT(ctx->data_pix_fmt)) {
917 cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
918 avctx->profile = FF_PROFILE_HEVC_MAIN_10;
921 // force setting profile as rext if input is yuv444
922 if (IS_YUV444(ctx->data_pix_fmt)) {
923 cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
924 avctx->profile = FF_PROFILE_HEVC_REXT;
927 hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
929 hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
931 hevc->level = ctx->level;
933 hevc->tier = ctx->tier;
938 static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
940 switch (avctx->codec->id) {
941 case AV_CODEC_ID_H264:
942 return nvenc_setup_h264_config(avctx);
943 case AV_CODEC_ID_HEVC:
944 return nvenc_setup_hevc_config(avctx);
945 /* Earlier switch/case will return if unknown codec is passed. */
951 static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
953 NvencContext *ctx = avctx->priv_data;
954 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
955 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
957 NV_ENC_PRESET_CONFIG preset_config = { 0 };
958 NVENCSTATUS nv_status = NV_ENC_SUCCESS;
959 AVCPBProperties *cpb_props;
963 ctx->encode_config.version = NV_ENC_CONFIG_VER;
964 ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
966 ctx->init_encode_params.encodeHeight = avctx->height;
967 ctx->init_encode_params.encodeWidth = avctx->width;
969 ctx->init_encode_params.encodeConfig = &ctx->encode_config;
971 nvenc_map_preset(ctx);
973 preset_config.version = NV_ENC_PRESET_CONFIG_VER;
974 preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
976 nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
977 ctx->init_encode_params.encodeGUID,
978 ctx->init_encode_params.presetGUID,
980 if (nv_status != NV_ENC_SUCCESS)
981 return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
983 memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
985 ctx->encode_config.version = NV_ENC_CONFIG_VER;
987 if (avctx->sample_aspect_ratio.num && avctx->sample_aspect_ratio.den &&
988 (avctx->sample_aspect_ratio.num != 1 || avctx->sample_aspect_ratio.num != 1)) {
990 avctx->width * avctx->sample_aspect_ratio.num,
991 avctx->height * avctx->sample_aspect_ratio.den,
993 ctx->init_encode_params.darHeight = dh;
994 ctx->init_encode_params.darWidth = dw;
996 ctx->init_encode_params.darHeight = avctx->height;
997 ctx->init_encode_params.darWidth = avctx->width;
1000 // De-compensate for hardware, dubiously, trying to compensate for
1001 // playback at 704 pixel width.
1002 if (avctx->width == 720 &&
1003 (avctx->height == 480 || avctx->height == 576)) {
1005 ctx->init_encode_params.darWidth * 44,
1006 ctx->init_encode_params.darHeight * 45,
1008 ctx->init_encode_params.darHeight = dh;
1009 ctx->init_encode_params.darWidth = dw;
1012 ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1013 ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
1015 ctx->init_encode_params.enableEncodeAsync = 0;
1016 ctx->init_encode_params.enablePTD = 1;
1018 if (avctx->gop_size > 0) {
1019 if (avctx->max_b_frames >= 0) {
1020 /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1021 ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1024 ctx->encode_config.gopLength = avctx->gop_size;
1025 } else if (avctx->gop_size == 0) {
1026 ctx->encode_config.frameIntervalP = 0;
1027 ctx->encode_config.gopLength = 1;
1030 ctx->initial_pts[0] = AV_NOPTS_VALUE;
1031 ctx->initial_pts[1] = AV_NOPTS_VALUE;
1033 nvenc_setup_rate_control(avctx);
1035 if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1036 ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1038 ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1041 res = nvenc_setup_codec_config(avctx);
1045 nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1046 if (nv_status != NV_ENC_SUCCESS) {
1047 return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1050 if (ctx->encode_config.frameIntervalP > 1)
1051 avctx->has_b_frames = 2;
1053 if (ctx->encode_config.rcParams.averageBitRate > 0)
1054 avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1056 cpb_props = ff_add_cpb_side_data(avctx);
1058 return AVERROR(ENOMEM);
1059 cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1060 cpb_props->avg_bitrate = avctx->bit_rate;
1061 cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1066 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1068 NvencContext *ctx = avctx->priv_data;
1069 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1070 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1072 NVENCSTATUS nv_status;
1073 NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1074 allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1076 switch (ctx->data_pix_fmt) {
1077 case AV_PIX_FMT_YUV420P:
1078 ctx->surfaces[idx].format = NV_ENC_BUFFER_FORMAT_YV12_PL;
1081 case AV_PIX_FMT_NV12:
1082 ctx->surfaces[idx].format = NV_ENC_BUFFER_FORMAT_NV12_PL;
1085 case AV_PIX_FMT_P010:
1086 ctx->surfaces[idx].format = NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1089 case AV_PIX_FMT_YUV444P:
1090 ctx->surfaces[idx].format = NV_ENC_BUFFER_FORMAT_YUV444_PL;
1093 case AV_PIX_FMT_YUV444P16:
1094 ctx->surfaces[idx].format = NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1097 case AV_PIX_FMT_0RGB32:
1098 ctx->surfaces[idx].format = NV_ENC_BUFFER_FORMAT_ARGB;
1101 case AV_PIX_FMT_0BGR32:
1102 ctx->surfaces[idx].format = NV_ENC_BUFFER_FORMAT_ABGR;
1106 av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format\n");
1107 return AVERROR(EINVAL);
1110 if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1111 ctx->surfaces[idx].in_ref = av_frame_alloc();
1112 if (!ctx->surfaces[idx].in_ref)
1113 return AVERROR(ENOMEM);
1115 NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1116 allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1117 allocSurf.width = (avctx->width + 31) & ~31;
1118 allocSurf.height = (avctx->height + 31) & ~31;
1119 allocSurf.memoryHeap = NV_ENC_MEMORY_HEAP_SYSMEM_CACHED;
1120 allocSurf.bufferFmt = ctx->surfaces[idx].format;
1122 nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1123 if (nv_status != NV_ENC_SUCCESS) {
1124 return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1127 ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1128 ctx->surfaces[idx].width = allocSurf.width;
1129 ctx->surfaces[idx].height = allocSurf.height;
1132 ctx->surfaces[idx].lockCount = 0;
1134 /* 1MB is large enough to hold most output frames.
1135 * NVENC increases this automaticaly if it is not enough. */
1136 allocOut.size = 1024 * 1024;
1138 allocOut.memoryHeap = NV_ENC_MEMORY_HEAP_SYSMEM_CACHED;
1140 nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1141 if (nv_status != NV_ENC_SUCCESS) {
1142 int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1143 if (avctx->pix_fmt != AV_PIX_FMT_CUDA)
1144 p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1145 av_frame_free(&ctx->surfaces[idx].in_ref);
1149 ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1150 ctx->surfaces[idx].size = allocOut.size;
1155 static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
1157 NvencContext *ctx = avctx->priv_data;
1159 int num_mbs = ((avctx->width + 15) >> 4) * ((avctx->height + 15) >> 4);
1160 ctx->nb_surfaces = FFMAX((num_mbs >= 8160) ? 32 : 48,
1162 ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
1165 ctx->surfaces = av_mallocz_array(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1167 return AVERROR(ENOMEM);
1169 ctx->timestamp_list = av_fifo_alloc(ctx->nb_surfaces * sizeof(int64_t));
1170 if (!ctx->timestamp_list)
1171 return AVERROR(ENOMEM);
1172 ctx->output_surface_queue = av_fifo_alloc(ctx->nb_surfaces * sizeof(NvencSurface*));
1173 if (!ctx->output_surface_queue)
1174 return AVERROR(ENOMEM);
1175 ctx->output_surface_ready_queue = av_fifo_alloc(ctx->nb_surfaces * sizeof(NvencSurface*));
1176 if (!ctx->output_surface_ready_queue)
1177 return AVERROR(ENOMEM);
1179 for (i = 0; i < ctx->nb_surfaces; i++) {
1180 if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1187 static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
1189 NvencContext *ctx = avctx->priv_data;
1190 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1191 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1193 NVENCSTATUS nv_status;
1194 uint32_t outSize = 0;
1195 char tmpHeader[256];
1196 NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1197 payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1199 payload.spsppsBuffer = tmpHeader;
1200 payload.inBufferSize = sizeof(tmpHeader);
1201 payload.outSPSPPSPayloadSize = &outSize;
1203 nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1204 if (nv_status != NV_ENC_SUCCESS) {
1205 return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1208 avctx->extradata_size = outSize;
1209 avctx->extradata = av_mallocz(outSize + AV_INPUT_BUFFER_PADDING_SIZE);
1211 if (!avctx->extradata) {
1212 return AVERROR(ENOMEM);
1215 memcpy(avctx->extradata, tmpHeader, outSize);
1220 av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
1222 NvencContext *ctx = avctx->priv_data;
1223 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1224 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1227 /* the encoder has to be flushed before it can be closed */
1228 if (ctx->nvencoder) {
1229 NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1230 .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1232 p_nvenc->nvEncEncodePicture(ctx->nvencoder, ¶ms);
1235 av_fifo_freep(&ctx->timestamp_list);
1236 av_fifo_freep(&ctx->output_surface_ready_queue);
1237 av_fifo_freep(&ctx->output_surface_queue);
1239 if (ctx->surfaces && avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1240 for (i = 0; i < ctx->nb_surfaces; ++i) {
1241 if (ctx->surfaces[i].input_surface) {
1242 p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->surfaces[i].in_map.mappedResource);
1245 for (i = 0; i < ctx->nb_registered_frames; i++) {
1246 if (ctx->registered_frames[i].regptr)
1247 p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1249 ctx->nb_registered_frames = 0;
1252 if (ctx->surfaces) {
1253 for (i = 0; i < ctx->nb_surfaces; ++i) {
1254 if (avctx->pix_fmt != AV_PIX_FMT_CUDA)
1255 p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1256 av_frame_free(&ctx->surfaces[i].in_ref);
1257 p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1260 av_freep(&ctx->surfaces);
1261 ctx->nb_surfaces = 0;
1264 p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1265 ctx->nvencoder = NULL;
1267 if (ctx->cu_context_internal)
1268 dl_fn->cu_ctx_destroy(ctx->cu_context_internal);
1269 ctx->cu_context = ctx->cu_context_internal = NULL;
1272 dlclose(dl_fn->nvenc);
1273 dl_fn->nvenc = NULL;
1275 dl_fn->nvenc_device_count = 0;
1279 dlclose(dl_fn->cuda);
1283 dl_fn->cu_init = NULL;
1284 dl_fn->cu_device_get_count = NULL;
1285 dl_fn->cu_device_get = NULL;
1286 dl_fn->cu_device_get_name = NULL;
1287 dl_fn->cu_device_compute_capability = NULL;
1288 dl_fn->cu_ctx_create = NULL;
1289 dl_fn->cu_ctx_pop_current = NULL;
1290 dl_fn->cu_ctx_destroy = NULL;
1292 av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
1297 av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
1299 NvencContext *ctx = avctx->priv_data;
1302 if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1303 AVHWFramesContext *frames_ctx;
1304 if (!avctx->hw_frames_ctx) {
1305 av_log(avctx, AV_LOG_ERROR,
1306 "hw_frames_ctx must be set when using GPU frames as input\n");
1307 return AVERROR(EINVAL);
1309 frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1310 ctx->data_pix_fmt = frames_ctx->sw_format;
1312 ctx->data_pix_fmt = avctx->pix_fmt;
1315 if ((ret = nvenc_load_libraries(avctx)) < 0)
1318 if ((ret = nvenc_setup_device(avctx)) < 0)
1321 if ((ret = nvenc_setup_encoder(avctx)) < 0)
1324 if ((ret = nvenc_setup_surfaces(avctx)) < 0)
1327 if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1328 if ((ret = nvenc_setup_extradata(avctx)) < 0)
1335 static NvencSurface *get_free_frame(NvencContext *ctx)
1339 for (i = 0; i < ctx->nb_surfaces; ++i) {
1340 if (!ctx->surfaces[i].lockCount) {
1341 ctx->surfaces[i].lockCount = 1;
1342 return &ctx->surfaces[i];
1349 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
1350 NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
1352 int dst_linesize[4] = {
1353 lock_buffer_params->pitch,
1354 lock_buffer_params->pitch,
1355 lock_buffer_params->pitch,
1356 lock_buffer_params->pitch
1358 uint8_t *dst_data[4];
1361 if (frame->format == AV_PIX_FMT_YUV420P)
1362 dst_linesize[1] = dst_linesize[2] >>= 1;
1364 ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
1365 lock_buffer_params->bufferDataPtr, dst_linesize);
1369 if (frame->format == AV_PIX_FMT_YUV420P)
1370 FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
1372 av_image_copy(dst_data, dst_linesize,
1373 (const uint8_t**)frame->data, frame->linesize, frame->format,
1374 avctx->width, avctx->height);
1379 static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
1381 NvencContext *ctx = avctx->priv_data;
1382 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1383 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1387 if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
1388 for (i = 0; i < ctx->nb_registered_frames; i++) {
1389 if (!ctx->registered_frames[i].mapped) {
1390 if (ctx->registered_frames[i].regptr) {
1391 p_nvenc->nvEncUnregisterResource(ctx->nvencoder,
1392 ctx->registered_frames[i].regptr);
1393 ctx->registered_frames[i].regptr = NULL;
1399 return ctx->nb_registered_frames++;
1402 av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
1403 return AVERROR(ENOMEM);
1406 static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
1408 NvencContext *ctx = avctx->priv_data;
1409 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1410 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1412 AVHWFramesContext *frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1413 NV_ENC_REGISTER_RESOURCE reg;
1416 for (i = 0; i < ctx->nb_registered_frames; i++) {
1417 if (ctx->registered_frames[i].ptr == (CUdeviceptr)frame->data[0])
1421 idx = nvenc_find_free_reg_resource(avctx);
1425 reg.version = NV_ENC_REGISTER_RESOURCE_VER;
1426 reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
1427 reg.width = frames_ctx->width;
1428 reg.height = frames_ctx->height;
1429 reg.bufferFormat = ctx->surfaces[0].format;
1430 reg.pitch = frame->linesize[0];
1431 reg.resourceToRegister = frame->data[0];
1433 ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, ®);
1434 if (ret != NV_ENC_SUCCESS) {
1435 nvenc_print_error(avctx, ret, "Error registering an input resource");
1436 return AVERROR_UNKNOWN;
1439 ctx->registered_frames[idx].ptr = (CUdeviceptr)frame->data[0];
1440 ctx->registered_frames[idx].regptr = reg.registeredResource;
1444 static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame,
1445 NvencSurface *nvenc_frame)
1447 NvencContext *ctx = avctx->priv_data;
1448 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1449 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1452 NVENCSTATUS nv_status;
1454 if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1455 int reg_idx = nvenc_register_frame(avctx, frame);
1457 av_log(avctx, AV_LOG_ERROR, "Could not register an input CUDA frame\n");
1461 res = av_frame_ref(nvenc_frame->in_ref, frame);
1465 nvenc_frame->in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
1466 nvenc_frame->in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
1467 nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &nvenc_frame->in_map);
1468 if (nv_status != NV_ENC_SUCCESS) {
1469 av_frame_unref(nvenc_frame->in_ref);
1470 return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
1473 ctx->registered_frames[reg_idx].mapped = 1;
1474 nvenc_frame->reg_idx = reg_idx;
1475 nvenc_frame->input_surface = nvenc_frame->in_map.mappedResource;
1476 nvenc_frame->pitch = frame->linesize[0];
1479 NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
1481 lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
1482 lockBufferParams.inputBuffer = nvenc_frame->input_surface;
1484 nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
1485 if (nv_status != NV_ENC_SUCCESS) {
1486 return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
1489 nvenc_frame->pitch = lockBufferParams.pitch;
1490 res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
1492 nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
1493 if (nv_status != NV_ENC_SUCCESS) {
1494 return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
1501 static void nvenc_codec_specific_pic_params(AVCodecContext *avctx,
1502 NV_ENC_PIC_PARAMS *params)
1504 NvencContext *ctx = avctx->priv_data;
1506 switch (avctx->codec->id) {
1507 case AV_CODEC_ID_H264:
1508 params->codecPicParams.h264PicParams.sliceMode =
1509 ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
1510 params->codecPicParams.h264PicParams.sliceModeData =
1511 ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1513 case AV_CODEC_ID_HEVC:
1514 params->codecPicParams.hevcPicParams.sliceMode =
1515 ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
1516 params->codecPicParams.hevcPicParams.sliceModeData =
1517 ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1522 static inline void timestamp_queue_enqueue(AVFifoBuffer* queue, int64_t timestamp)
1524 av_fifo_generic_write(queue, ×tamp, sizeof(timestamp), NULL);
1527 static inline int64_t timestamp_queue_dequeue(AVFifoBuffer* queue)
1529 int64_t timestamp = AV_NOPTS_VALUE;
1530 if (av_fifo_size(queue) > 0)
1531 av_fifo_generic_read(queue, ×tamp, sizeof(timestamp), NULL);
1536 static int nvenc_set_timestamp(AVCodecContext *avctx,
1537 NV_ENC_LOCK_BITSTREAM *params,
1540 NvencContext *ctx = avctx->priv_data;
1542 pkt->pts = params->outputTimeStamp;
1544 /* generate the first dts by linearly extrapolating the
1545 * first two pts values to the past */
1546 if (avctx->max_b_frames > 0 && !ctx->first_packet_output &&
1547 ctx->initial_pts[1] != AV_NOPTS_VALUE) {
1548 int64_t ts0 = ctx->initial_pts[0], ts1 = ctx->initial_pts[1];
1551 if ((ts0 < 0 && ts1 > INT64_MAX + ts0) ||
1552 (ts0 > 0 && ts1 < INT64_MIN + ts0))
1553 return AVERROR(ERANGE);
1556 if ((delta < 0 && ts0 > INT64_MAX + delta) ||
1557 (delta > 0 && ts0 < INT64_MIN + delta))
1558 return AVERROR(ERANGE);
1559 pkt->dts = ts0 - delta;
1561 ctx->first_packet_output = 1;
1565 pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
1570 static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
1572 NvencContext *ctx = avctx->priv_data;
1573 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1574 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1576 uint32_t slice_mode_data;
1577 uint32_t *slice_offsets = NULL;
1578 NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
1579 NVENCSTATUS nv_status;
1582 enum AVPictureType pict_type;
1584 switch (avctx->codec->id) {
1585 case AV_CODEC_ID_H264:
1586 slice_mode_data = ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1588 case AV_CODEC_ID_H265:
1589 slice_mode_data = ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1592 av_log(avctx, AV_LOG_ERROR, "Unknown codec name\n");
1593 res = AVERROR(EINVAL);
1596 slice_offsets = av_mallocz(slice_mode_data * sizeof(*slice_offsets));
1601 lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
1603 lock_params.doNotWait = 0;
1604 lock_params.outputBitstream = tmpoutsurf->output_surface;
1605 lock_params.sliceOffsets = slice_offsets;
1607 nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
1608 if (nv_status != NV_ENC_SUCCESS) {
1609 res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
1613 if (res = ff_alloc_packet2(avctx, pkt, lock_params.bitstreamSizeInBytes,0)) {
1614 p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1618 memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
1620 nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1621 if (nv_status != NV_ENC_SUCCESS)
1622 nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
1625 if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1626 p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, tmpoutsurf->in_map.mappedResource);
1627 av_frame_unref(tmpoutsurf->in_ref);
1628 ctx->registered_frames[tmpoutsurf->reg_idx].mapped = 0;
1630 tmpoutsurf->input_surface = NULL;
1633 switch (lock_params.pictureType) {
1634 case NV_ENC_PIC_TYPE_IDR:
1635 pkt->flags |= AV_PKT_FLAG_KEY;
1636 case NV_ENC_PIC_TYPE_I:
1637 pict_type = AV_PICTURE_TYPE_I;
1639 case NV_ENC_PIC_TYPE_P:
1640 pict_type = AV_PICTURE_TYPE_P;
1642 case NV_ENC_PIC_TYPE_B:
1643 pict_type = AV_PICTURE_TYPE_B;
1645 case NV_ENC_PIC_TYPE_BI:
1646 pict_type = AV_PICTURE_TYPE_BI;
1649 av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
1650 av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
1651 res = AVERROR_EXTERNAL;
1655 #if FF_API_CODED_FRAME
1656 FF_DISABLE_DEPRECATION_WARNINGS
1657 avctx->coded_frame->pict_type = pict_type;
1658 FF_ENABLE_DEPRECATION_WARNINGS
1661 ff_side_data_set_encoder_stats(pkt,
1662 (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
1664 res = nvenc_set_timestamp(avctx, &lock_params, pkt);
1668 av_free(slice_offsets);
1673 timestamp_queue_dequeue(ctx->timestamp_list);
1676 av_free(slice_offsets);
1681 static int output_ready(AVCodecContext *avctx, int flush)
1683 NvencContext *ctx = avctx->priv_data;
1684 int nb_ready, nb_pending;
1686 /* when B-frames are enabled, we wait for two initial timestamps to
1687 * calculate the first dts */
1688 if (!flush && avctx->max_b_frames > 0 &&
1689 (ctx->initial_pts[0] == AV_NOPTS_VALUE || ctx->initial_pts[1] == AV_NOPTS_VALUE))
1692 nb_ready = av_fifo_size(ctx->output_surface_ready_queue) / sizeof(NvencSurface*);
1693 nb_pending = av_fifo_size(ctx->output_surface_queue) / sizeof(NvencSurface*);
1695 return nb_ready > 0;
1696 return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
1699 int ff_nvenc_encode_frame(AVCodecContext *avctx, AVPacket *pkt,
1700 const AVFrame *frame, int *got_packet)
1702 NVENCSTATUS nv_status;
1703 NvencSurface *tmpoutsurf, *inSurf;
1706 NvencContext *ctx = avctx->priv_data;
1707 NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1708 NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1710 NV_ENC_PIC_PARAMS pic_params = { 0 };
1711 pic_params.version = NV_ENC_PIC_PARAMS_VER;
1714 inSurf = get_free_frame(ctx);
1716 av_log(avctx, AV_LOG_ERROR, "No free surfaces\n");
1720 res = nvenc_upload_frame(avctx, frame, inSurf);
1722 inSurf->lockCount = 0;
1726 pic_params.inputBuffer = inSurf->input_surface;
1727 pic_params.bufferFmt = inSurf->format;
1728 pic_params.inputWidth = avctx->width;
1729 pic_params.inputHeight = avctx->height;
1730 pic_params.inputPitch = inSurf->pitch;
1731 pic_params.outputBitstream = inSurf->output_surface;
1733 if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1734 if (frame->top_field_first)
1735 pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
1737 pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
1739 pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
1742 if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
1743 pic_params.encodePicFlags =
1744 ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
1746 pic_params.encodePicFlags = 0;
1749 pic_params.inputTimeStamp = frame->pts;
1751 nvenc_codec_specific_pic_params(avctx, &pic_params);
1753 pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
1756 nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
1757 if (nv_status != NV_ENC_SUCCESS &&
1758 nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
1759 return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
1762 av_fifo_generic_write(ctx->output_surface_queue, &inSurf, sizeof(inSurf), NULL);
1763 timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
1765 if (ctx->initial_pts[0] == AV_NOPTS_VALUE)
1766 ctx->initial_pts[0] = frame->pts;
1767 else if (ctx->initial_pts[1] == AV_NOPTS_VALUE)
1768 ctx->initial_pts[1] = frame->pts;
1771 /* all the pending buffers are now ready for output */
1772 if (nv_status == NV_ENC_SUCCESS) {
1773 while (av_fifo_size(ctx->output_surface_queue) > 0) {
1774 av_fifo_generic_read(ctx->output_surface_queue, &tmpoutsurf, sizeof(tmpoutsurf), NULL);
1775 av_fifo_generic_write(ctx->output_surface_ready_queue, &tmpoutsurf, sizeof(tmpoutsurf), NULL);
1779 if (output_ready(avctx, !frame)) {
1780 av_fifo_generic_read(ctx->output_surface_ready_queue, &tmpoutsurf, sizeof(tmpoutsurf), NULL);
1782 res = process_output_surface(avctx, pkt, tmpoutsurf);
1787 av_assert0(tmpoutsurf->lockCount);
1788 tmpoutsurf->lockCount--;