2 * Copyright (c) 2002 Brian Foley
3 * Copyright (c) 2002 Dieter Shirley
4 * Copyright (c) 2003-2004 Romain Dolbeau <romain@dolbeau.org>
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
21 #include "../dsputil.h"
23 #include "dsputil_ppc.h"
26 #include "dsputil_altivec.h"
28 extern void fdct_altivec(int16_t *block);
29 extern void gmc1_altivec(uint8_t *dst, uint8_t *src, int stride, int h,
30 int x16, int y16, int rounder);
31 extern void idct_put_altivec(uint8_t *dest, int line_size, int16_t *block);
32 extern void idct_add_altivec(uint8_t *dest, int line_size, int16_t *block);
34 void dsputil_h264_init_ppc(DSPContext* c, AVCodecContext *avctx);
36 void dsputil_init_altivec(DSPContext* c, AVCodecContext *avctx);
37 void vc1dsp_init_altivec(DSPContext* c, AVCodecContext *avctx);
38 void snow_init_altivec(DSPContext* c, AVCodecContext *avctx);
39 void float_init_altivec(DSPContext* c, AVCodecContext *avctx);
56 #ifdef POWERPC_PERFORMANCE_REPORT
57 unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][powerpc_data_total];
58 /* list below must match enum in dsputil_ppc.h */
59 static unsigned char* perfname[] = {
60 "ff_fft_calc_altivec",
62 "dct_unquantize_h263_altivec",
66 "put_pixels16_altivec",
67 "avg_pixels16_altivec",
68 "avg_pixels8_altivec",
69 "put_pixels8_xy2_altivec",
70 "put_no_rnd_pixels8_xy2_altivec",
71 "put_pixels16_xy2_altivec",
72 "put_no_rnd_pixels16_xy2_altivec",
73 "hadamard8_diff8x8_altivec",
74 "hadamard8_diff16_altivec",
75 "avg_pixels8_xy2_altivec",
76 "clear_blocks_dcbz32_ppc",
77 "clear_blocks_dcbz128_ppc",
78 "put_h264_chroma_mc8_altivec",
79 "avg_h264_chroma_mc8_altivec",
80 "put_h264_qpel16_h_lowpass_altivec",
81 "avg_h264_qpel16_h_lowpass_altivec",
82 "put_h264_qpel16_v_lowpass_altivec",
83 "avg_h264_qpel16_v_lowpass_altivec",
84 "put_h264_qpel16_hv_lowpass_altivec",
85 "avg_h264_qpel16_hv_lowpass_altivec",
91 #ifdef POWERPC_PERFORMANCE_REPORT
92 void powerpc_display_perf_report(void)
95 av_log(NULL, AV_LOG_INFO, "PowerPC performance report\n Values are from the PMC registers, and represent whatever the registers are set to record.\n");
96 for(i = 0 ; i < powerpc_perf_total ; i++)
98 for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++)
100 if (perfdata[j][i][powerpc_data_num] != (unsigned long long)0)
101 av_log(NULL, AV_LOG_INFO,
102 " Function \"%s\" (pmc%d):\n\tmin: %llu\n\tmax: %llu\n\tavg: %1.2lf (%llu)\n",
105 perfdata[j][i][powerpc_data_min],
106 perfdata[j][i][powerpc_data_max],
107 (double)perfdata[j][i][powerpc_data_sum] /
108 (double)perfdata[j][i][powerpc_data_num],
109 perfdata[j][i][powerpc_data_num]);
113 #endif /* POWERPC_PERFORMANCE_REPORT */
115 /* ***** WARNING ***** WARNING ***** WARNING ***** */
117 clear_blocks_dcbz32_ppc will not work properly
118 on PowerPC processors with a cache line size
119 not equal to 32 bytes.
120 Fortunately all processor used by Apple up to
121 at least the 7450 (aka second generation G4)
122 use 32 bytes cache line.
123 This is due to the use of the 'dcbz' instruction.
124 It simply clear to zero a single cache line,
125 so you need to know the cache line size to use it !
126 It's absurd, but it's fast...
128 update 24/06/2003 : Apple released yesterday the G5,
129 with a PPC970. cache line size : 128 bytes. Oups.
130 The semantic of dcbz was changed, it always clear
131 32 bytes. so the function below will work, but will
132 be slow. So I fixed check_dcbz_effect to use dcbzl,
133 which is defined to clear a cache line (as dcbz before).
134 So we still can distinguish, and use dcbz (32 bytes)
135 or dcbzl (one cache line) as required.
137 see <http://developer.apple.com/technotes/tn/tn2087.html>
138 and <http://developer.apple.com/technotes/tn/tn2086.html>
140 void clear_blocks_dcbz32_ppc(DCTELEM *blocks)
142 POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz32, 1);
143 register int misal = ((unsigned long)blocks & 0x00000010);
145 POWERPC_PERF_START_COUNT(powerpc_clear_blocks_dcbz32, 1);
148 ((unsigned long*)blocks)[0] = 0L;
149 ((unsigned long*)blocks)[1] = 0L;
150 ((unsigned long*)blocks)[2] = 0L;
151 ((unsigned long*)blocks)[3] = 0L;
154 for ( ; i < sizeof(DCTELEM)*6*64-31 ; i += 32) {
156 asm volatile("dcbz %0,%1" : : "b" (blocks), "r" (i) : "memory");
162 ((unsigned long*)blocks)[188] = 0L;
163 ((unsigned long*)blocks)[189] = 0L;
164 ((unsigned long*)blocks)[190] = 0L;
165 ((unsigned long*)blocks)[191] = 0L;
169 memset(blocks, 0, sizeof(DCTELEM)*6*64);
171 POWERPC_PERF_STOP_COUNT(powerpc_clear_blocks_dcbz32, 1);
174 /* same as above, when dcbzl clear a whole 128B cache line
175 i.e. the PPC970 aka G5 */
177 void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
179 POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz128, 1);
180 register int misal = ((unsigned long)blocks & 0x0000007f);
182 POWERPC_PERF_START_COUNT(powerpc_clear_blocks_dcbz128, 1);
185 // we could probably also optimize this case,
186 // but there's not much point as the machines
187 // aren't available yet (2003-06-26)
188 memset(blocks, 0, sizeof(DCTELEM)*6*64);
191 for ( ; i < sizeof(DCTELEM)*6*64 ; i += 128) {
192 asm volatile("dcbzl %0,%1" : : "b" (blocks), "r" (i) : "memory");
195 memset(blocks, 0, sizeof(DCTELEM)*6*64);
197 POWERPC_PERF_STOP_COUNT(powerpc_clear_blocks_dcbz128, 1);
200 void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
202 memset(blocks, 0, sizeof(DCTELEM)*6*64);
207 /* check dcbz report how many bytes are set to 0 by dcbz */
208 /* update 24/06/2003 : replace dcbz by dcbzl to get
209 the intended effect (Apple "fixed" dcbz)
210 unfortunately this cannot be used unless the assembler
211 knows about dcbzl ... */
212 long check_dcbzl_effect(void)
214 register char *fakedata = (char*)av_malloc(1024);
215 register char *fakedata_middle;
216 register long zero = 0;
225 fakedata_middle = (fakedata + 512);
227 memset(fakedata, 0xFF, 1024);
229 /* below the constraint "b" seems to mean "Address base register"
230 in gcc-3.3 / RS/6000 speaks. seems to avoid using r0, so.... */
231 asm volatile("dcbzl %0, %1" : : "b" (fakedata_middle), "r" (zero));
233 for (i = 0; i < 1024 ; i ++)
235 if (fakedata[i] == (char)0)
244 long check_dcbzl_effect(void)
250 void dsputil_init_ppc(DSPContext* c, AVCodecContext *avctx)
252 // Common optimizations whether Altivec is available or not
254 switch (check_dcbzl_effect()) {
256 c->clear_blocks = clear_blocks_dcbz32_ppc;
259 c->clear_blocks = clear_blocks_dcbz128_ppc;
266 dsputil_h264_init_ppc(c, avctx);
269 mm_flags |= MM_ALTIVEC;
271 dsputil_init_altivec(c, avctx);
272 snow_init_altivec(c, avctx);
273 vc1dsp_init_altivec(c, avctx);
274 float_init_altivec(c, avctx);
275 c->gmc1 = gmc1_altivec;
277 #ifdef CONFIG_ENCODERS
278 if (avctx->dct_algo == FF_DCT_AUTO ||
279 avctx->dct_algo == FF_DCT_ALTIVEC)
281 c->fdct = fdct_altivec;
283 #endif //CONFIG_ENCODERS
285 if (avctx->lowres==0)
287 if ((avctx->idct_algo == FF_IDCT_AUTO) ||
288 (avctx->idct_algo == FF_IDCT_ALTIVEC))
290 c->idct_put = idct_put_altivec;
291 c->idct_add = idct_add_altivec;
292 #ifndef ALTIVEC_USE_REFERENCE_C_CODE
293 c->idct_permutation_type = FF_TRANSPOSE_IDCT_PERM;
294 #else /* ALTIVEC_USE_REFERENCE_C_CODE */
295 c->idct_permutation_type = FF_NO_IDCT_PERM;
296 #endif /* ALTIVEC_USE_REFERENCE_C_CODE */
300 #ifdef POWERPC_PERFORMANCE_REPORT
303 for (i = 0 ; i < powerpc_perf_total ; i++)
305 for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++)
307 perfdata[j][i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFFULL;
308 perfdata[j][i][powerpc_data_max] = 0x0000000000000000ULL;
309 perfdata[j][i][powerpc_data_sum] = 0x0000000000000000ULL;
310 perfdata[j][i][powerpc_data_num] = 0x0000000000000000ULL;
314 #endif /* POWERPC_PERFORMANCE_REPORT */
316 #endif /* HAVE_ALTIVEC */
318 // Non-AltiVec PPC optimisations