git.sesse.net Git - ffmpeg/blob - libavcodec/x86/constants.c

   1 /*
   2  * MMX/SSE/AVX constants used across x86 dsp optimizations.
   3  *
   4  * This file is part of FFmpeg.
   5  *
   6  * FFmpeg is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * FFmpeg is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with FFmpeg; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
  19  */
  20
  21 #include "libavutil/mem.h"
  22 #include "libavutil/x86/asm.h" // for xmm_reg
  23 #include "constants.h"
  24
  25 DECLARE_ALIGNED(32, const ymm_reg,  ff_pw_1)    = { 0x0001000100010001ULL, 0x0001000100010001ULL,
  26                                                     0x0001000100010001ULL, 0x0001000100010001ULL };
  27 DECLARE_ALIGNED(32, const ymm_reg,  ff_pw_2)    = { 0x0002000200020002ULL, 0x0002000200020002ULL,
  28                                                     0x0002000200020002ULL, 0x0002000200020002ULL };
  29 DECLARE_ALIGNED(16, const xmm_reg,  ff_pw_3)    = { 0x0003000300030003ULL, 0x0003000300030003ULL };
  30 DECLARE_ALIGNED(16, const xmm_reg,  ff_pw_4)    = { 0x0004000400040004ULL, 0x0004000400040004ULL };
  31 DECLARE_ALIGNED(16, const xmm_reg,  ff_pw_5)    = { 0x0005000500050005ULL, 0x0005000500050005ULL };
  32 DECLARE_ALIGNED(16, const xmm_reg,  ff_pw_8)    = { 0x0008000800080008ULL, 0x0008000800080008ULL };
  33 DECLARE_ALIGNED(16, const xmm_reg,  ff_pw_9)    = { 0x0009000900090009ULL, 0x0009000900090009ULL };
  34 DECLARE_ALIGNED(8,  const uint64_t, ff_pw_15)   =   0x000F000F000F000FULL;
  35 DECLARE_ALIGNED(16, const xmm_reg,  ff_pw_16)   = { 0x0010001000100010ULL, 0x0010001000100010ULL };
  36 DECLARE_ALIGNED(16, const xmm_reg,  ff_pw_17)   = { 0x0011001100110011ULL, 0x0011001100110011ULL };
  37 DECLARE_ALIGNED(16, const xmm_reg,  ff_pw_18)   = { 0x0012001200120012ULL, 0x0012001200120012ULL };
  38 DECLARE_ALIGNED(16, const xmm_reg,  ff_pw_20)   = { 0x0014001400140014ULL, 0x0014001400140014ULL };
  39 DECLARE_ALIGNED(16, const xmm_reg,  ff_pw_32)   = { 0x0020002000200020ULL, 0x0020002000200020ULL };
  40 DECLARE_ALIGNED(8,  const uint64_t, ff_pw_42)   =   0x002A002A002A002AULL;
  41 DECLARE_ALIGNED(8,  const uint64_t, ff_pw_53)   =   0x0035003500350035ULL;
  42 DECLARE_ALIGNED(16, const xmm_reg,  ff_pw_64)   = { 0x0040004000400040ULL, 0x0040004000400040ULL };
  43 DECLARE_ALIGNED(8,  const uint64_t, ff_pw_96)   =   0x0060006000600060ULL;
  44 DECLARE_ALIGNED(8,  const uint64_t, ff_pw_128)  =   0x0080008000800080ULL;
  45 DECLARE_ALIGNED(32, const ymm_reg,  ff_pw_255)  = { 0x00ff00ff00ff00ffULL, 0x00ff00ff00ff00ffULL,
  46                                                     0x00ff00ff00ff00ffULL, 0x00ff00ff00ff00ffULL };
  47 DECLARE_ALIGNED(32, const ymm_reg,  ff_pw_256)  = { 0x0100010001000100ULL, 0x0100010001000100ULL,
  48                                                     0x0100010001000100ULL, 0x0100010001000100ULL };
  49 DECLARE_ALIGNED(32, const ymm_reg,  ff_pw_512)  = { 0x0200020002000200ULL, 0x0200020002000200ULL,
  50                                                     0x0200020002000200ULL, 0x0200020002000200ULL };
  51 DECLARE_ALIGNED(16, const xmm_reg,  ff_pw_1019) = { 0x03FB03FB03FB03FBULL, 0x03FB03FB03FB03FBULL };
  52 DECLARE_ALIGNED(32, const ymm_reg,  ff_pw_1023) = { 0x03ff03ff03ff03ffULL, 0x03ff03ff03ff03ffULL,
  53                                                     0x03ff03ff03ff03ffULL, 0x03ff03ff03ff03ffULL};
  54 DECLARE_ALIGNED(32, const ymm_reg,  ff_pw_1024) = { 0x0400040004000400ULL, 0x0400040004000400ULL,
  55                                                     0x0400040004000400ULL, 0x0400040004000400ULL};
  56 DECLARE_ALIGNED(32, const ymm_reg,  ff_pw_2048) = { 0x0800080008000800ULL, 0x0800080008000800ULL,
  57                                                     0x0800080008000800ULL, 0x0800080008000800ULL };
  58 DECLARE_ALIGNED(32, const ymm_reg,  ff_pw_4095) = { 0x0fff0fff0fff0fffULL, 0x0fff0fff0fff0fffULL,
  59                                                     0x0fff0fff0fff0fffULL, 0x0fff0fff0fff0fffULL };
  60 DECLARE_ALIGNED(32, const ymm_reg,  ff_pw_4096) = { 0x1000100010001000ULL, 0x1000100010001000ULL,
  61                                                     0x1000100010001000ULL, 0x1000100010001000ULL };
  62 DECLARE_ALIGNED(32, const ymm_reg,  ff_pw_8192) = { 0x2000200020002000ULL, 0x2000200020002000ULL,
  63                                                     0x2000200020002000ULL, 0x2000200020002000ULL };
  64 DECLARE_ALIGNED(32, const ymm_reg,  ff_pw_m1)   = { 0xFFFFFFFFFFFFFFFFULL, 0xFFFFFFFFFFFFFFFFULL,
  65                                                     0xFFFFFFFFFFFFFFFFULL, 0xFFFFFFFFFFFFFFFFULL };
  66
  67 DECLARE_ALIGNED(32, const ymm_reg,  ff_pb_0)    = { 0x0000000000000000ULL, 0x0000000000000000ULL,
  68                                                     0x0000000000000000ULL, 0x0000000000000000ULL };
  69 DECLARE_ALIGNED(32, const ymm_reg,  ff_pb_1)    = { 0x0101010101010101ULL, 0x0101010101010101ULL,
  70                                                     0x0101010101010101ULL, 0x0101010101010101ULL };
  71 DECLARE_ALIGNED(32, const ymm_reg,  ff_pb_2)    = { 0x0202020202020202ULL, 0x0202020202020202ULL,
  72                                                     0x0202020202020202ULL, 0x0202020202020202ULL };
  73 DECLARE_ALIGNED(32, const ymm_reg,  ff_pb_3)    = { 0x0303030303030303ULL, 0x0303030303030303ULL,
  74                                                     0x0303030303030303ULL, 0x0303030303030303ULL };
  75 DECLARE_ALIGNED(32, const xmm_reg,  ff_pb_15)   = { 0x0F0F0F0F0F0F0F0FULL, 0x0F0F0F0F0F0F0F0FULL };
  76 DECLARE_ALIGNED(16, const xmm_reg,  ff_pb_80)   = { 0x8080808080808080ULL, 0x8080808080808080ULL };
  77 DECLARE_ALIGNED(16, const xmm_reg,  ff_pb_FE)   = { 0xFEFEFEFEFEFEFEFEULL, 0xFEFEFEFEFEFEFEFEULL };
  78 DECLARE_ALIGNED(8,  const uint64_t, ff_pb_FC)   =   0xFCFCFCFCFCFCFCFCULL;
  79
  80 DECLARE_ALIGNED(16, const xmm_reg,  ff_ps_neg)  = { 0x8000000080000000ULL, 0x8000000080000000ULL };
  81
  82 DECLARE_ALIGNED(32, const ymm_reg,  ff_pd_1)    = { 0x0000000100000001ULL, 0x0000000100000001ULL,
  83                                                     0x0000000100000001ULL, 0x0000000100000001ULL };
  84 DECLARE_ALIGNED(32, const ymm_reg,  ff_pd_16)   = { 0x0000001000000010ULL, 0x0000001000000010ULL,
  85                                                     0x0000001000000010ULL, 0x0000001000000010ULL };
  86 DECLARE_ALIGNED(32, const ymm_reg,  ff_pd_32)   = { 0x0000002000000020ULL, 0x0000002000000020ULL,
  87                                                     0x0000002000000020ULL, 0x0000002000000020ULL };
  88 DECLARE_ALIGNED(32, const ymm_reg,  ff_pd_65535)= { 0x0000ffff0000ffffULL, 0x0000ffff0000ffffULL,
  89                                                     0x0000ffff0000ffffULL, 0x0000ffff0000ffffULL };
  90
  91 /* simple idct 10 */
  92 #define W1sh2 22725 // W1 = 90901 = 22725<<2 + 1
  93 #define W2sh2 21407 // W2 = 85627 = 21407<<2 - 1
  94 #define W3sh2 19265 // W3 = 77062 = 19265<<2 + 2
  95 #define W4sh2 16384 // W4 = 65535 = 16384<<2 - 1
  96 #define W5sh2 12873 // W5 = 51491 = 12873<<2 - 1
  97 #define W6sh2  8867 // W6 = 35468 =  8867<<2
  98 #define W7sh2  4520 // W7 = 18081 =  4520<<2 + 1
  99
 100 #define TIMES4(a, b)                                                        \
 101      (((b)&0xFFFFLL)<<48)+(((a)&0xFFFFLL)<<32)+(((b)&0xFFFFLL)<<16)+((a)&0xFFFFLL), \
 102      (((b)&0xFFFFLL)<<48)+(((a)&0xFFFFLL)<<32)+(((b)&0xFFFFLL)<<16)+((a)&0xFFFFLL)
 103
 104 #if ARCH_X86_64
 105 DECLARE_ALIGNED(16, const xmm_reg,  ff_w4_plus_w2) = { TIMES4(W4sh2,  W2sh2) };
 106 DECLARE_ALIGNED(16, const xmm_reg,  ff_w4_min_w2)  = { TIMES4(W4sh2, -W2sh2) };
 107 DECLARE_ALIGNED(16, const xmm_reg,  ff_w4_plus_w6) = { TIMES4(W4sh2, +W6sh2) };
 108 DECLARE_ALIGNED(16, const xmm_reg,  ff_w4_min_w6)  = { TIMES4(W4sh2, -W6sh2) };
 109 DECLARE_ALIGNED(16, const xmm_reg,  ff_w1_plus_w3) = { TIMES4(W1sh2, +W3sh2) };
 110 DECLARE_ALIGNED(16, const xmm_reg,  ff_w3_min_w1)  = { TIMES4(W3sh2, -W1sh2) };
 111 DECLARE_ALIGNED(16, const xmm_reg,  ff_w7_plus_w3) = { TIMES4(W7sh2, +W3sh2) };
 112 DECLARE_ALIGNED(16, const xmm_reg,  ff_w3_min_w7)  = { TIMES4(W3sh2, -W7sh2) };
 113 DECLARE_ALIGNED(16, const xmm_reg,  ff_w1_plus_w5) = { TIMES4(W1sh2, +W5sh2) };
 114 DECLARE_ALIGNED(16, const xmm_reg,  ff_w5_min_w1)  = { TIMES4(W5sh2, -W1sh2) };
 115 DECLARE_ALIGNED(16, const xmm_reg,  ff_w5_plus_w7) = { TIMES4(W5sh2, +W7sh2) };
 116 DECLARE_ALIGNED(16, const xmm_reg,  ff_w7_min_w5)  = { TIMES4(W7sh2, -W5sh2) };
 117 #endif