1 ;*****************************************************************************
2 ;* MMX/SSE2-optimized H.264 iDCT
3 ;*****************************************************************************
4 ;* Copyright (C) 2004-2005 Michael Niedermayer, Loren Merritt
5 ;* Copyright (C) 2003-2008 x264 project
7 ;* Authors: Laurent Aimar <fenrir@via.ecp.fr>
8 ;* Loren Merritt <lorenm@u.washington.edu>
9 ;* Holger Lubitz <hal@duncan.ol.sub.de>
10 ;* Min Chen <chenm001.163.com>
12 ;* This file is part of FFmpeg.
14 ;* FFmpeg is free software; you can redistribute it and/or
15 ;* modify it under the terms of the GNU Lesser General Public
16 ;* License as published by the Free Software Foundation; either
17 ;* version 2.1 of the License, or (at your option) any later version.
19 ;* FFmpeg is distributed in the hope that it will be useful,
20 ;* but WITHOUT ANY WARRANTY; without even the implied warranty of
21 ;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 ;* Lesser General Public License for more details.
24 ;* You should have received a copy of the GNU Lesser General Public
25 ;* License along with FFmpeg; if not, write to the Free Software
26 ;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
27 ;*****************************************************************************
29 %include "libavutil/x86/x86util.asm"
33 ; FIXME this table is a duplicate from h264data.h, and will be removed once the tables from, h264 have been split
34 scan8_mem: db 4+ 1*8, 5+ 1*8, 4+ 2*8, 5+ 2*8
35 db 6+ 1*8, 7+ 1*8, 6+ 2*8, 7+ 2*8
36 db 4+ 3*8, 5+ 3*8, 4+ 4*8, 5+ 4*8
37 db 6+ 3*8, 7+ 3*8, 6+ 4*8, 7+ 4*8
38 db 4+ 6*8, 5+ 6*8, 4+ 7*8, 5+ 7*8
39 db 6+ 6*8, 7+ 6*8, 6+ 7*8, 7+ 7*8
40 db 4+ 8*8, 5+ 8*8, 4+ 9*8, 5+ 9*8
41 db 6+ 8*8, 7+ 8*8, 6+ 9*8, 7+ 9*8
42 db 4+11*8, 5+11*8, 4+12*8, 5+12*8
43 db 6+11*8, 7+11*8, 6+12*8, 7+12*8
44 db 4+13*8, 5+13*8, 4+14*8, 5+14*8
45 db 6+13*8, 7+13*8, 6+14*8, 7+14*8
51 %define scan8 scan8_mem
59 ; %1=uint8_t *dst, %2=int16_t *block, %3=int stride
67 IDCT4_1D w, 0, 1, 2, 3, 4, 5
69 TRANSPOSE4x4W 0, 1, 2, 3, 4
71 IDCT4_1D w, 0, 1, 2, 3, 4, 5
74 STORE_DIFFx2 m0, m1, m4, m5, m7, 6, %1, %3
76 STORE_DIFFx2 m2, m3, m4, m5, m7, 6, %1, %3
80 ; ff_h264_idct_add_mmx(uint8_t *dst, int16_t *block, int stride)
81 cglobal h264_idct_add_8_mmx, 3, 3, 0
133 SWAP 7, 6, 4, 5, 2, 3, 1, 0 ; 70315246 -> 01234567
136 %macro IDCT8_1D_FULL 1
143 IDCT8_1D [%1], [%1+ 64]
146 ; %1=int16_t *block, %2=int16_t *dstblock
147 %macro IDCT8_ADD_MMX_START 2
150 TRANSPOSE4x4W 0, 1, 2, 3, 7
156 TRANSPOSE4x4W 4, 5, 6, 7, 3
163 ; %1=uint8_t *dst, %2=int16_t *block, %3=int stride
164 %macro IDCT8_ADD_MMX_END 3
171 STORE_DIFFx2 m0, m1, m5, m6, m7, 6, %1, %3
173 STORE_DIFFx2 m2, m3, m5, m6, m7, 6, %1, %3
178 STORE_DIFFx2 m4, m0, m5, m6, m7, 6, %1, %3
180 STORE_DIFFx2 m1, m2, m5, m6, m7, 6, %1, %3
184 ; ff_h264_idct8_add_mmx(uint8_t *dst, int16_t *block, int stride)
185 cglobal h264_idct8_add_8_mmx, 3, 4, 0
186 %assign pad 128+4-(stack_offset&7)
190 IDCT8_ADD_MMX_START r1 , rsp
191 IDCT8_ADD_MMX_START r1+8, rsp+64
193 IDCT8_ADD_MMX_END r0 , rsp, r2
194 IDCT8_ADD_MMX_END r3 , rsp+8, r2
199 ; %1=uint8_t *dst, %2=int16_t *block, %3=int stride
200 %macro IDCT8_ADD_SSE 4
203 TRANSPOSE8x8W 0, 1, 2, 3, 4, 5, 6, 7, 8
205 TRANSPOSE8x8W 0, 1, 2, 3, 4, 5, 6, 7, [%2], [%2+16]
212 IDCT8_1D [%2], [%2+ 16]
225 STORE_DIFF m0, m6, m7, [%1 ]
226 STORE_DIFF m1, m6, m7, [%1+%3 ]
227 STORE_DIFF m2, m6, m7, [%1+%3*2]
228 STORE_DIFF m3, m6, m7, [%1+%4 ]
237 STORE_DIFF m4, m6, m7, [%1 ]
238 STORE_DIFF m5, m6, m7, [%1+%3 ]
239 STORE_DIFF m0, m6, m7, [%1+%3*2]
240 STORE_DIFF m1, m6, m7, [%1+%4 ]
244 ; ff_h264_idct8_add_sse2(uint8_t *dst, int16_t *block, int stride)
245 cglobal h264_idct8_add_8_sse2, 3, 4, 10
246 IDCT8_ADD_SSE r0, r1, r2, r3
249 %macro DC_ADD_MMXEXT_INIT 2-3
269 %macro DC_ADD_MMXEXT_OP 4
289 ; ff_h264_idct_dc_add_mmxext(uint8_t *dst, int16_t *block, int stride)
290 cglobal h264_idct_dc_add_8_mmxext, 3, 3, 0
291 DC_ADD_MMXEXT_INIT r1, r2
292 DC_ADD_MMXEXT_OP movh, r0, r2, r1
295 ; ff_h264_idct8_dc_add_mmxext(uint8_t *dst, int16_t *block, int stride)
296 cglobal h264_idct8_dc_add_8_mmxext, 3, 3, 0
297 DC_ADD_MMXEXT_INIT r1, r2
298 DC_ADD_MMXEXT_OP mova, r0, r2, r1
300 DC_ADD_MMXEXT_OP mova, r0, r2, r1
303 ; ff_h264_idct_add16_mmx(uint8_t *dst, const int *block_offset,
304 ; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
305 cglobal h264_idct_add16_8_mmx, 5, 7 + npicregs, 0, dst, block_offset, block, stride, nnzc, cntr, coeff, picreg
308 lea picregq, [scan8_mem]
311 movzx r6, byte [scan8+r5]
312 movzx r6, byte [r4+r6]
315 mov r6d, dword [r1+r5*4]
325 ; ff_h264_idct8_add4_mmx(uint8_t *dst, const int *block_offset,
326 ; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
327 cglobal h264_idct8_add4_8_mmx, 5, 7 + npicregs, 0, dst, block_offset, block, stride, nnzc, cntr, coeff, picreg
328 %assign pad 128+4-(stack_offset&7)
333 lea picregq, [scan8_mem]
336 movzx r6, byte [scan8+r5]
337 movzx r6, byte [r4+r6]
340 mov r6d, dword [r1+r5*4]
343 IDCT8_ADD_MMX_START r2 , rsp
344 IDCT8_ADD_MMX_START r2+8, rsp+64
345 IDCT8_ADD_MMX_END r6 , rsp, r3
346 mov r6d, dword [r1+r5*4]
348 IDCT8_ADD_MMX_END r6 , rsp+8, r3
357 ; ff_h264_idct_add16_mmxext(uint8_t *dst, const int *block_offset,
358 ; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
359 cglobal h264_idct_add16_8_mmxext, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
362 lea picregq, [scan8_mem]
365 movzx r6, byte [scan8+r5]
366 movzx r6, byte [r4+r6]
374 DC_ADD_MMXEXT_INIT r2, r3, r6
379 mov dst2d, dword [r1+r5*4]
380 lea dst2q, [r0+dst2q]
381 DC_ADD_MMXEXT_OP movh, dst2q, r3, r6
391 mov r6d, dword [r1+r5*4]
401 ; ff_h264_idct_add16intra_mmx(uint8_t *dst, const int *block_offset,
402 ; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
403 cglobal h264_idct_add16intra_8_mmx, 5, 7 + npicregs, 0, dst, block_offset, block, stride, nnzc, cntr, coeff, picreg
406 lea picregq, [scan8_mem]
409 movzx r6, byte [scan8+r5]
410 movzx r6, byte [r4+r6]
414 mov r6d, dword [r1+r5*4]
424 ; ff_h264_idct_add16intra_mmxext(uint8_t *dst, const int *block_offset,
425 ; DCTELEM *block, int stride,
426 ; const uint8_t nnzc[6*8])
427 cglobal h264_idct_add16intra_8_mmxext, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
430 lea picregq, [scan8_mem]
433 movzx r6, byte [scan8+r5]
434 movzx r6, byte [r4+r6]
437 mov r6d, dword [r1+r5*4]
449 DC_ADD_MMXEXT_INIT r2, r3, r6
454 mov dst2d, dword [r1+r5*4]
456 DC_ADD_MMXEXT_OP movh, dst2q, r3, r6
467 ; ff_h264_idct8_add4_mmxext(uint8_t *dst, const int *block_offset,
468 ; DCTELEM *block, int stride,
469 ; const uint8_t nnzc[6*8])
470 cglobal h264_idct8_add4_8_mmxext, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
471 %assign pad 128+4-(stack_offset&7)
476 lea picregq, [scan8_mem]
479 movzx r6, byte [scan8+r5]
480 movzx r6, byte [r4+r6]
488 DC_ADD_MMXEXT_INIT r2, r3, r6
493 mov dst2d, dword [r1+r5*4]
494 lea dst2q, [r0+dst2q]
495 DC_ADD_MMXEXT_OP mova, dst2q, r3, r6
496 lea dst2q, [dst2q+r3*4]
497 DC_ADD_MMXEXT_OP mova, dst2q, r3, r6
509 mov r6d, dword [r1+r5*4]
512 IDCT8_ADD_MMX_START r2 , rsp
513 IDCT8_ADD_MMX_START r2+8, rsp+64
514 IDCT8_ADD_MMX_END r6 , rsp, r3
515 mov r6d, dword [r1+r5*4]
517 IDCT8_ADD_MMX_END r6 , rsp+8, r3
528 ; ff_h264_idct8_add4_sse2(uint8_t *dst, const int *block_offset,
529 ; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
530 cglobal h264_idct8_add4_8_sse2, 5, 8 + npicregs, 10, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
533 lea picregq, [scan8_mem]
536 movzx r6, byte [scan8+r5]
537 movzx r6, byte [r4+r6]
546 DC_ADD_MMXEXT_INIT r2, r3, r6
551 mov dst2d, dword [r1+r5*4]
553 DC_ADD_MMXEXT_OP mova, dst2q, r3, r6
554 lea dst2q, [dst2q+r3*4]
555 DC_ADD_MMXEXT_OP mova, dst2q, r3, r6
566 mov dst2d, dword [r1+r5*4]
568 IDCT8_ADD_SSE dst2q, r2, r3, r6
580 h264_idct_add8_mmx_plane:
582 movzx r6, byte [scan8+r5]
583 movzx r6, byte [r4+r6]
588 mov r0d, dword [r1+r5*4]
591 mov r0, r1m ; XXX r1m here is actually r0m of the calling func
593 add r0, dword [r1+r5*4]
603 ; ff_h264_idct_add8_mmx(uint8_t **dest, const int *block_offset,
604 ; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
605 cglobal h264_idct_add8_8_mmx, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
609 lea picregq, [scan8_mem]
614 call h264_idct_add8_mmx_plane
622 call h264_idct_add8_mmx_plane
625 h264_idct_add8_mmxext_plane:
627 movzx r6, byte [scan8+r5]
628 movzx r6, byte [r4+r6]
632 mov r0d, dword [r1+r5*4]
635 mov r0, r1m ; XXX r1m here is actually r0m of the calling func
637 add r0, dword [r1+r5*4]
649 DC_ADD_MMXEXT_INIT r2, r3, r6
651 mov r0d, dword [r1+r5*4]
654 mov r0, r1m ; XXX r1m here is actually r0m of the calling func
656 add r0, dword [r1+r5*4]
658 DC_ADD_MMXEXT_OP movh, r0, r3, r6
666 ; ff_h264_idct_add8_mmxext(uint8_t **dest, const int *block_offset,
667 ; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
668 cglobal h264_idct_add8_8_mmxext, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
675 lea picregq, [scan8_mem]
677 call h264_idct_add8_mmxext_plane
685 call h264_idct_add8_mmxext_plane
689 ; r0 = uint8_t *dst, r2 = int16_t *block, r3 = int stride, r6=clobbered
690 h264_idct_dc_add8_mmxext:
691 movd m0, [r2 ] ; 0 0 X D
692 punpcklwd m0, [r2+32] ; x X d D
695 punpcklwd m0, m0 ; d d D D
696 pxor m1, m1 ; 0 0 0 0
697 psubw m1, m0 ; -d-d-D-D
698 packuswb m0, m1 ; -d-d-D-D d d D D
699 pshufw m1, m0, 0xFA ; -d-d-d-d-D-D-D-D
700 punpcklwd m0, m0 ; d d d d D D D D
702 DC_ADD_MMXEXT_OP movq, r0, r3, r6
707 ; r0 = uint8_t *dst (clobbered), r2 = int16_t *block, r3 = int stride
708 h264_add8x4_idct_sse2:
717 IDCT4_1D w,0,1,2,3,4,5
718 TRANSPOSE2x4x4W 0,1,2,3,4
720 IDCT4_1D w,0,1,2,3,4,5
722 STORE_DIFFx2 m0, m1, m4, m5, m7, 6, r0, r3
724 STORE_DIFFx2 m2, m3, m4, m5, m7, 6, r0, r3
727 %macro add16_sse2_cycle 2
728 movzx r0, word [r4+%2]
731 mov r0d, dword [r1+%1*8]
737 call h264_add8x4_idct_sse2
744 ; ff_h264_idct_add16_sse2(uint8_t *dst, const int *block_offset,
745 ; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
746 cglobal h264_idct_add16_8_sse2, 5, 5 + ARCH_X86_64, 8
750 ; unrolling of the loop leads to an average performance gain of
752 add16_sse2_cycle 0, 0xc
753 add16_sse2_cycle 1, 0x14
754 add16_sse2_cycle 2, 0xe
755 add16_sse2_cycle 3, 0x16
756 add16_sse2_cycle 4, 0x1c
757 add16_sse2_cycle 5, 0x24
758 add16_sse2_cycle 6, 0x1e
759 add16_sse2_cycle 7, 0x26
762 %macro add16intra_sse2_cycle 2
763 movzx r0, word [r4+%2]
766 mov r0d, dword [r1+%1*8]
772 call h264_add8x4_idct_sse2
778 mov r0d, dword [r1+%1*8]
784 call h264_idct_dc_add8_mmxext
791 ; ff_h264_idct_add16intra_sse2(uint8_t *dst, const int *block_offset,
792 ; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
793 cglobal h264_idct_add16intra_8_sse2, 5, 7 + ARCH_X86_64, 8
797 add16intra_sse2_cycle 0, 0xc
798 add16intra_sse2_cycle 1, 0x14
799 add16intra_sse2_cycle 2, 0xe
800 add16intra_sse2_cycle 3, 0x16
801 add16intra_sse2_cycle 4, 0x1c
802 add16intra_sse2_cycle 5, 0x24
803 add16intra_sse2_cycle 6, 0x1e
804 add16intra_sse2_cycle 7, 0x26
807 %macro add8_sse2_cycle 2
808 movzx r0, word [r4+%2]
812 mov r0d, dword [r1+(%1&1)*8+64*(1+(%1>>1))]
817 add r0, dword [r1+(%1&1)*8+64*(1+(%1>>1))]
819 call h264_add8x4_idct_sse2
826 mov r0d, dword [r1+(%1&1)*8+64*(1+(%1>>1))]
831 add r0, dword [r1+(%1&1)*8+64*(1+(%1>>1))]
833 call h264_idct_dc_add8_mmxext
842 ; ff_h264_idct_add8_sse2(uint8_t **dest, const int *block_offset,
843 ; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
844 cglobal h264_idct_add8_8_sse2, 5, 7 + ARCH_X86_64, 8
849 add8_sse2_cycle 0, 0x34
850 add8_sse2_cycle 1, 0x3c
856 add8_sse2_cycle 2, 0x5c
857 add8_sse2_cycle 3, 0x64
860 ;void ff_h264_luma_dc_dequant_idct_mmx(DCTELEM *output, DCTELEM *input, int qmul)
863 SUMSUB_BADC w, %4, %3, %2, %1, %5
864 SUMSUB_BADC w, %4, %2, %3, %1, %5
890 %macro STORE_WORDS_MMX 5
902 %macro DEQUANT_STORE_MMX 1
903 DEQUANT_MMX m0, m1, %1
904 STORE_WORDS_MMX m0, 0, 1, 4, 5
905 STORE_WORDS_MMX m1, 2, 3, 6, 7
907 DEQUANT_MMX m2, m3, %1
908 STORE_WORDS_MMX m2, 8, 9, 12, 13
909 STORE_WORDS_MMX m3, 10, 11, 14, 15
912 %macro STORE_WORDS_SSE 9
934 %macro DEQUANT_STORE_SSE2 1
956 STORE_WORDS_SSE xmm0, 0, 1, 4, 5, 2, 3, 6, 7
957 STORE_WORDS_SSE xmm2, 8, 9, 12, 13, 10, 11, 14, 15
960 %macro IDCT_DC_DEQUANT 2
961 cglobal h264_luma_dc_dequant_idct_%1, 3,4,%2
962 ; manually spill XMM registers for Win64 because
963 ; the code here is initialized with INIT_MMX
970 TRANSPOSE4x4W 0,1,2,3,4
973 ; shift, tmp, output, qmul
975 DECLARE_REG_TMP 0,3,1,2
976 ; we can't avoid this, because r0 is the shift register (ecx) on win64
979 DECLARE_REG_TMP 3,1,0,2
981 DECLARE_REG_TMP 1,3,0,2
1004 DEQUANT_STORE_MMX m6
1007 DEQUANT_STORE_SSE2 xmm6
1013 IDCT_DC_DEQUANT mmx, 0
1014 IDCT_DC_DEQUANT sse2, 7