1 ;*****************************************************************************
2 ;* x86inc.asm: x264asm abstraction layer
3 ;*****************************************************************************
4 ;* Copyright (C) 2005-2012 x264 project
6 ;* Authors: Loren Merritt <lorenm@u.washington.edu>
7 ;* Anton Mitrofanov <BugMaster@narod.ru>
8 ;* Jason Garrett-Glaser <darkshikari@gmail.com>
9 ;* Henrik Gramner <hengar-6@student.ltu.se>
11 ;* Permission to use, copy, modify, and/or distribute this software for any
12 ;* purpose with or without fee is hereby granted, provided that the above
13 ;* copyright notice and this permission notice appear in all copies.
15 ;* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
16 ;* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
17 ;* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
18 ;* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
19 ;* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
20 ;* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
21 ;* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 ;*****************************************************************************
24 ; This is a header file for the x264ASM assembly language, which uses
25 ; NASM/YASM syntax combined with a large number of macros to provide easy
26 ; abstraction between different calling conventions (x86_32, win64, linux64).
27 ; It also has various other useful features to simplify writing the kind of
28 ; DSP functions that are most often used in x264.
30 ; Unlike the rest of x264, this file is available under an ISC license, as it
31 ; has significant usefulness outside of x264 and we want it to be available
32 ; to the largest audience possible. Of course, if you modify it for your own
33 ; purposes to add a new feature, we strongly encourage contributing a patch
34 ; as this feature might be useful for others as well. Send patches or ideas
35 ; to x264-devel@videolan.org .
37 %define program_name ff
42 %ifidn __OUTPUT_FORMAT__,win32
44 %elifidn __OUTPUT_FORMAT__,win64
52 %define mangle(x) _ %+ x
57 ; FIXME: All of the 64bit asm functions that take a stride as an argument
58 ; via register, assume that the high dword of that register is filled with 0.
59 ; This is true in practice (since we never do any 64bit arithmetic on strides,
60 ; and x264's strides are all positive), but is not guaranteed by the ABI.
62 ; Name of the .rodata section.
63 ; Kludge: Something on OS X fails to align .rodata even given an align attribute,
64 ; so use a different read-only section.
65 %macro SECTION_RODATA 0-1 16
66 %ifidn __OUTPUT_FORMAT__,macho64
67 SECTION .text align=%1
68 %elifidn __OUTPUT_FORMAT__,macho
69 SECTION .text align=%1
71 %elifidn __OUTPUT_FORMAT__,aout
74 SECTION .rodata align=%1
78 ; aout does not support align=
79 %macro SECTION_TEXT 0-1 16
80 %ifidn __OUTPUT_FORMAT__,aout
83 SECTION .text align=%1
89 %elif ARCH_X86_64 == 0
90 ; x86_32 doesn't require PIC.
91 ; Some distros prefer shared objects to be PIC, but nothing breaks if
92 ; the code contains a few textrels, so we'll skip that complexity.
99 ; Always use long nops (reduces 0x90 spam in disassembly on x86_32)
102 ; Macros to eliminate most code duplication between x86_32 and x86_64:
103 ; Currently this works only for leaf functions which load all their arguments
104 ; into registers at the start, and make no other use of the stack. Luckily that
105 ; covers most of x264's asm.
108 ; %1 = number of arguments. loads them from stack if needed.
109 ; %2 = number of registers used. pushes callee-saved regs if needed.
110 ; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed.
111 ; %4 = list of names to define to registers
112 ; PROLOGUE can also be invoked by adding the same options to cglobal
115 ; cglobal foo, 2,3,0, dst, src, tmp
116 ; declares a function (foo), taking two args (dst and src) and one local variable (tmp)
118 ; TODO Some functions can use some args directly from the stack. If they're the
119 ; last args then you can just not declare them, but if they're in the middle
120 ; we need more flexible macro.
123 ; Pops anything that was pushed by PROLOGUE, and returns.
126 ; Same, but if it doesn't pop anything it becomes a 2-byte ret, for athlons
127 ; which are slow when a normal ret follows a branch.
130 ; rN and rNq are the native-size register holding function argument N
131 ; rNd, rNw, rNb are dword, word, and byte size
132 ; rNm is the original location of arg N (a register or on the stack), dword
133 ; rNmp is native size
135 %macro DECLARE_REG 5-6
143 %elif ARCH_X86_64 ; memory
144 %define r%1m [rsp + stack_offset + %6]
145 %define r%1mp qword r %+ %1m
147 %define r%1m [esp + stack_offset + %6]
148 %define r%1mp dword r %+ %1m
153 %macro DECLARE_REG_SIZE 2
167 DECLARE_REG_SIZE ax, al
168 DECLARE_REG_SIZE bx, bl
169 DECLARE_REG_SIZE cx, cl
170 DECLARE_REG_SIZE dx, dl
171 DECLARE_REG_SIZE si, sil
172 DECLARE_REG_SIZE di, dil
173 DECLARE_REG_SIZE bp, bpl
175 ; t# defines for when per-arch register allocation is more complex than just function arguments
177 %macro DECLARE_REG_TMP 1-*
180 CAT_XDEFINE t, %%i, r%1
186 %macro DECLARE_REG_TMP_SIZE 0-*
188 %define t%1q t%1 %+ q
189 %define t%1d t%1 %+ d
190 %define t%1w t%1 %+ w
191 %define t%1b t%1 %+ b
196 DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14
206 %assign stack_offset stack_offset+gprsize
211 %assign stack_offset stack_offset-gprsize
214 %macro PUSH_IF_USED 1-*
223 %macro POP_IF_USED 1-*
232 %macro LOAD_IF_USED 1-*
235 mov r%1, r %+ %1 %+ mp
244 %assign stack_offset stack_offset+(%2)
251 %assign stack_offset stack_offset-(%2)
261 %macro movsxdifnidn 2
273 %macro DEFINE_ARGS 0-*
277 CAT_UNDEF arg_name %+ %%i, q
278 CAT_UNDEF arg_name %+ %%i, d
279 CAT_UNDEF arg_name %+ %%i, w
280 CAT_UNDEF arg_name %+ %%i, b
281 CAT_UNDEF arg_name %+ %%i, m
282 CAT_UNDEF arg_name %+ %%i, mp
283 CAT_UNDEF arg_name, %%i
288 %xdefine %%stack_offset stack_offset
289 %undef stack_offset ; so that the current value of stack_offset doesn't get baked in by xdefine
292 %xdefine %1q r %+ %%i %+ q
293 %xdefine %1d r %+ %%i %+ d
294 %xdefine %1w r %+ %%i %+ w
295 %xdefine %1b r %+ %%i %+ b
296 %xdefine %1m r %+ %%i %+ m
297 %xdefine %1mp r %+ %%i %+ mp
298 CAT_XDEFINE arg_name, %%i, %1
302 %xdefine stack_offset %%stack_offset
303 %assign n_arg_names %0
306 %if WIN64 ; Windows x64 ;=================================================
308 DECLARE_REG 0, rcx, ecx, cx, cl
309 DECLARE_REG 1, rdx, edx, dx, dl
310 DECLARE_REG 2, R8, R8D, R8W, R8B
311 DECLARE_REG 3, R9, R9D, R9W, R9B
312 DECLARE_REG 4, R10, R10D, R10W, R10B, 40
313 DECLARE_REG 5, R11, R11D, R11W, R11B, 48
314 DECLARE_REG 6, rax, eax, ax, al, 56
315 DECLARE_REG 7, rdi, edi, di, dil, 64
316 DECLARE_REG 8, rsi, esi, si, sil, 72
317 DECLARE_REG 9, rbx, ebx, bx, bl, 80
318 DECLARE_REG 10, rbp, ebp, bp, bpl, 88
319 DECLARE_REG 11, R12, R12D, R12W, R12B, 96
320 DECLARE_REG 12, R13, R13D, R13W, R13B, 104
321 DECLARE_REG 13, R14, R14D, R14W, R14B, 112
322 DECLARE_REG 14, R15, R15D, R15W, R15B, 120
324 %macro PROLOGUE 2-4+ 0 ; #args, #regs, #xmm_regs, arg_names...
327 ASSERT regs_used >= num_args
328 ASSERT regs_used <= 15
329 PUSH_IF_USED 7, 8, 9, 10, 11, 12, 13, 14
331 %assign xmm_regs_used 0
335 LOAD_IF_USED 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
339 %macro WIN64_SPILL_XMM 1
340 %assign xmm_regs_used %1
341 ASSERT xmm_regs_used <= 16
342 %if xmm_regs_used > 6
343 SUB rsp, (xmm_regs_used-6)*16+16
344 %assign %%i xmm_regs_used
345 %rep (xmm_regs_used-6)
347 movdqa [rsp + (%%i-6)*16+(~stack_offset&8)], xmm %+ %%i
352 %macro WIN64_RESTORE_XMM_INTERNAL 1
353 %if xmm_regs_used > 6
354 %assign %%i xmm_regs_used
355 %rep (xmm_regs_used-6)
357 movdqa xmm %+ %%i, [%1 + (%%i-6)*16+(~stack_offset&8)]
359 add %1, (xmm_regs_used-6)*16+16
363 %macro WIN64_RESTORE_XMM 1
364 WIN64_RESTORE_XMM_INTERNAL %1
365 %assign stack_offset stack_offset-(xmm_regs_used-6)*16+16
366 %assign xmm_regs_used 0
370 WIN64_RESTORE_XMM_INTERNAL rsp
371 POP_IF_USED 14, 13, 12, 11, 10, 9, 8, 7
376 %if regs_used > 7 || xmm_regs_used > 6
383 %elif ARCH_X86_64 ; *nix x64 ;=============================================
385 DECLARE_REG 0, rdi, edi, di, dil
386 DECLARE_REG 1, rsi, esi, si, sil
387 DECLARE_REG 2, rdx, edx, dx, dl
388 DECLARE_REG 3, rcx, ecx, cx, cl
389 DECLARE_REG 4, R8, R8D, R8W, R8B
390 DECLARE_REG 5, R9, R9D, R9W, R9B
391 DECLARE_REG 6, rax, eax, ax, al, 8
392 DECLARE_REG 7, R10, R10D, R10W, R10B, 16
393 DECLARE_REG 8, R11, R11D, R11W, R11B, 24
394 DECLARE_REG 9, rbx, ebx, bx, bl, 32
395 DECLARE_REG 10, rbp, ebp, bp, bpl, 40
396 DECLARE_REG 11, R12, R12D, R12W, R12B, 48
397 DECLARE_REG 12, R13, R13D, R13W, R13B, 56
398 DECLARE_REG 13, R14, R14D, R14W, R14B, 64
399 DECLARE_REG 14, R15, R15D, R15W, R15B, 72
401 %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
404 ASSERT regs_used >= num_args
405 ASSERT regs_used <= 15
406 PUSH_IF_USED 9, 10, 11, 12, 13, 14
407 LOAD_IF_USED 6, 7, 8, 9, 10, 11, 12, 13, 14
412 POP_IF_USED 14, 13, 12, 11, 10, 9
424 %else ; X86_32 ;==============================================================
426 DECLARE_REG 0, eax, eax, ax, al, 4
427 DECLARE_REG 1, ecx, ecx, cx, cl, 8
428 DECLARE_REG 2, edx, edx, dx, dl, 12
429 DECLARE_REG 3, ebx, ebx, bx, bl, 16
430 DECLARE_REG 4, esi, esi, si, null, 20
431 DECLARE_REG 5, edi, edi, di, null, 24
432 DECLARE_REG 6, ebp, ebp, bp, null, 28
435 %macro DECLARE_ARG 1-*
437 %define r%1m [esp + stack_offset + 4*%1 + 4]
438 %define r%1mp dword r%1m
443 DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
445 %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
451 ASSERT regs_used >= num_args
452 PUSH_IF_USED 3, 4, 5, 6
453 LOAD_IF_USED 0, 1, 2, 3, 4, 5, 6
458 POP_IF_USED 6, 5, 4, 3
470 %endif ;======================================================================
473 %macro WIN64_SPILL_XMM 1
475 %macro WIN64_RESTORE_XMM 1
479 ;=============================================================================
480 ; arch-independent part
481 ;=============================================================================
483 %assign function_align 16
486 ; Applies any symbol mangling needed for C linkage, and sets up a define such that
487 ; subsequent uses of the function name automatically refer to the mangled version.
488 ; Appends cpuflags to the function name if cpuflags has been specified.
489 %macro cglobal 1-2+ ; name, [PROLOGUE args]
491 ; HACK: work around %+ broken with empty SUFFIX for nasm 2.09.10
495 cglobal_internal %1 %+ SUFFIX
498 ; HACK: work around %+ broken with empty SUFFIX for nasm 2.09.10
500 cglobal_internal %1, %2
502 cglobal_internal %1 %+ SUFFIX, %2
506 %macro cglobal_internal 1-2+
508 %xdefine %1 mangle(program_name %+ _ %+ %1)
509 %xdefine %1.skip_prologue %1 %+ .skip_prologue
510 CAT_XDEFINE cglobaled_, %1, 1
512 %xdefine current_function %1
513 %ifidn __OUTPUT_FORMAT__,elf
514 global %1:function hidden
520 RESET_MM_PERMUTATION ; not really needed, but makes disassembly somewhat nicer
521 %assign stack_offset 0
528 %xdefine %1 mangle(program_name %+ _ %+ %1)
529 CAT_XDEFINE cglobaled_, %1, 1
533 ; like cextern, but without the prefix
534 %macro cextern_naked 1
535 %xdefine %1 mangle(%1)
536 CAT_XDEFINE cglobaled_, %1, 1
541 %xdefine %1 mangle(program_name %+ _ %+ %1)
546 ; This is needed for ELF, otherwise the GNU linker assumes the stack is
547 ; executable by default.
548 %ifidn __OUTPUT_FORMAT__,elf
549 SECTION .note.GNU-stack noalloc noexec nowrite progbits
554 %assign cpuflags_mmx (1<<0)
555 %assign cpuflags_mmx2 (1<<1) | cpuflags_mmx
556 %assign cpuflags_3dnow (1<<2) | cpuflags_mmx
557 %assign cpuflags_3dnow2 (1<<3) | cpuflags_3dnow
558 %assign cpuflags_sse (1<<4) | cpuflags_mmx2
559 %assign cpuflags_sse2 (1<<5) | cpuflags_sse
560 %assign cpuflags_sse2slow (1<<6) | cpuflags_sse2
561 %assign cpuflags_sse3 (1<<7) | cpuflags_sse2
562 %assign cpuflags_ssse3 (1<<8) | cpuflags_sse3
563 %assign cpuflags_sse4 (1<<9) | cpuflags_ssse3
564 %assign cpuflags_sse42 (1<<10)| cpuflags_sse4
565 %assign cpuflags_avx (1<<11)| cpuflags_sse42
566 %assign cpuflags_xop (1<<12)| cpuflags_avx
567 %assign cpuflags_fma4 (1<<13)| cpuflags_avx
569 %assign cpuflags_cache32 (1<<16)
570 %assign cpuflags_cache64 (1<<17)
571 %assign cpuflags_slowctz (1<<18)
572 %assign cpuflags_lzcnt (1<<19)
573 %assign cpuflags_misalign (1<<20)
574 %assign cpuflags_aligned (1<<21) ; not a cpu feature, but a function variant
575 %assign cpuflags_atom (1<<22)
577 %define cpuflag(x) ((cpuflags & (cpuflags_ %+ x)) == (cpuflags_ %+ x))
578 %define notcpuflag(x) ((cpuflags & (cpuflags_ %+ x)) != (cpuflags_ %+ x))
580 ; Takes up to 2 cpuflags from the above list.
581 ; All subsequent functions (up to the next INIT_CPUFLAGS) is built for the specified cpu.
582 ; You shouldn't need to invoke this macro directly, it's a subroutine for INIT_MMX &co.
583 %macro INIT_CPUFLAGS 0-2
586 %assign cpuflags cpuflags_%1
588 %xdefine cpuname %1_%2
589 %assign cpuflags cpuflags | cpuflags_%2
591 %xdefine SUFFIX _ %+ cpuname
593 %assign avx_enabled 1
595 %if mmsize == 16 && notcpuflag(sse2)
598 %define movnta movntps
623 %assign avx_enabled 0
624 %define RESET_MM_PERMUTATION INIT_MMX %1
630 %define movnta movntq
633 CAT_XDEFINE m, %%i, mm %+ %%i
634 CAT_XDEFINE nmm, %%i, %%i
646 %assign avx_enabled 0
647 %define RESET_MM_PERMUTATION INIT_XMM %1
651 %define num_mmregs 16
656 %define movnta movntdq
659 CAT_XDEFINE m, %%i, xmm %+ %%i
660 CAT_XDEFINE nxmm, %%i, %%i
666 ; FIXME: INIT_AVX can be replaced by INIT_XMM avx
669 %assign avx_enabled 1
670 %define PALIGNR PALIGNR_SSSE3
671 %define RESET_MM_PERMUTATION INIT_AVX
675 %assign avx_enabled 1
676 %define RESET_MM_PERMUTATION INIT_YMM %1
680 %define num_mmregs 16
685 %define movnta vmovntps
688 CAT_XDEFINE m, %%i, ymm %+ %%i
689 CAT_XDEFINE nymm, %%i, %%i
697 ; I often want to use macros that permute their arguments. e.g. there's no
698 ; efficient way to implement butterfly or transpose or dct without swapping some
701 ; I would like to not have to manually keep track of the permutations:
702 ; If I insert a permutation in the middle of a function, it should automatically
703 ; change everything that follows. For more complex macros I may also have multiple
704 ; implementations, e.g. the SSE2 and SSSE3 versions may have different permutations.
706 ; Hence these macros. Insert a PERMUTE or some SWAPs at the end of a macro that
707 ; permutes its arguments. It's equivalent to exchanging the contents of the
708 ; registers, except that this way you exchange the register names instead, so it
709 ; doesn't cost any cycles.
711 %macro PERMUTE 2-* ; takes a list of pairs to swap
726 %macro SWAP 2-* ; swaps a single chain (sometimes more concise than pairs)
732 CAT_XDEFINE n, m%1, %1
733 CAT_XDEFINE n, m%2, %2
735 ; If we were called as "SWAP m0,m1" rather than "SWAP 0,1" infer the original numbers here.
736 ; Be careful using this mode in nested macros though, as in some cases there may be
737 ; other copies of m# that have already been dereferenced and don't get updated correctly.
738 %xdefine %%n1 n %+ %1
739 %xdefine %%n2 n %+ %2
740 %xdefine tmp m %+ %%n1
741 CAT_XDEFINE m, %%n1, m %+ %%n2
742 CAT_XDEFINE m, %%n2, tmp
743 CAT_XDEFINE n, m %+ %%n1, %%n1
744 CAT_XDEFINE n, m %+ %%n2, %%n2
751 ; If SAVE_MM_PERMUTATION is placed at the end of a function, then any later
752 ; calls to that function will automatically load the permutation, so values can
753 ; be returned in mmregs.
754 %macro SAVE_MM_PERMUTATION 0-1
758 %xdefine %%f current_function %+ _m
762 CAT_XDEFINE %%f, %%i, m %+ %%i
767 %macro LOAD_MM_PERMUTATION 1 ; name to load from
771 CAT_XDEFINE m, %%i, %1_m %+ %%i
772 CAT_XDEFINE n, m %+ %%i, %%i
778 ; Append cpuflags to the callee's name iff the appended name is known and the plain name isn't
780 ; HACK: work around %+ broken with empty SUFFIX for nasm 2.09.10
784 call_internal %1, %1 %+ SUFFIX
787 %macro call_internal 2
795 LOAD_MM_PERMUTATION %%i
798 ; Substitutions that reduce instruction size but are functionally equivalent
823 ;=============================================================================
824 ; AVX abstraction layer
825 ;=============================================================================
830 CAT_XDEFINE sizeofmm, i, 8
832 CAT_XDEFINE sizeofxmm, i, 16
833 CAT_XDEFINE sizeofymm, i, 32
839 ;%2 == 1 if float, 0 if int
840 ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 3-operand (xmm, xmm, xmm)
841 ;%4 == number of operands given
843 %macro RUN_AVX_INSTR 6-7+
845 %define %%size sizeof%5
847 %define %%size mmsize
853 %define %%regmov movq
855 %define %%regmov movaps
857 %define %%regmov movdqa
862 %if avx_enabled && sizeof%5==16
879 ; 3arg AVX ops with a memory arg can only have it in src2,
880 ; whereas SSE emulation of 3arg prefers to have it in src1 (i.e. the mov).
881 ; So, if the op is symmetric and the wrong one is memory, swap them.
882 %macro RUN_AVX_INSTR1 8
893 %if %%swap && %3 == 0 && %8 == 1
894 RUN_AVX_INSTR %1, %2, %3, %4, %5, %7, %6
896 RUN_AVX_INSTR %1, %2, %3, %4, %5, %6, %7
901 ;%2 == 1 if float, 0 if int
902 ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 3-operand (xmm, xmm, xmm)
903 ;%4 == 1 if symmetric (i.e. doesn't matter which src arg is which), 0 if not
905 %macro %1 2-9 fnord, fnord, fnord, %1, %2, %3, %4
907 RUN_AVX_INSTR %6, %7, %8, 2, %1, %2
909 RUN_AVX_INSTR1 %6, %7, %8, 3, %1, %2, %3, %9
911 RUN_AVX_INSTR %6, %7, %8, 4, %1, %2, %3, %4
913 RUN_AVX_INSTR %6, %7, %8, 5, %1, %2, %3, %4, %5
918 AVX_INSTR addpd, 1, 0, 1
919 AVX_INSTR addps, 1, 0, 1
920 AVX_INSTR addsd, 1, 0, 1
921 AVX_INSTR addss, 1, 0, 1
922 AVX_INSTR addsubpd, 1, 0, 0
923 AVX_INSTR addsubps, 1, 0, 0
924 AVX_INSTR andpd, 1, 0, 1
925 AVX_INSTR andps, 1, 0, 1
926 AVX_INSTR andnpd, 1, 0, 0
927 AVX_INSTR andnps, 1, 0, 0
928 AVX_INSTR blendpd, 1, 0, 0
929 AVX_INSTR blendps, 1, 0, 0
930 AVX_INSTR blendvpd, 1, 0, 0
931 AVX_INSTR blendvps, 1, 0, 0
932 AVX_INSTR cmppd, 1, 0, 0
933 AVX_INSTR cmpps, 1, 0, 0
934 AVX_INSTR cmpsd, 1, 0, 0
935 AVX_INSTR cmpss, 1, 0, 0
936 AVX_INSTR divpd, 1, 0, 0
937 AVX_INSTR divps, 1, 0, 0
938 AVX_INSTR divsd, 1, 0, 0
939 AVX_INSTR divss, 1, 0, 0
940 AVX_INSTR dppd, 1, 1, 0
941 AVX_INSTR dpps, 1, 1, 0
942 AVX_INSTR haddpd, 1, 0, 0
943 AVX_INSTR haddps, 1, 0, 0
944 AVX_INSTR hsubpd, 1, 0, 0
945 AVX_INSTR hsubps, 1, 0, 0
946 AVX_INSTR maxpd, 1, 0, 1
947 AVX_INSTR maxps, 1, 0, 1
948 AVX_INSTR maxsd, 1, 0, 1
949 AVX_INSTR maxss, 1, 0, 1
950 AVX_INSTR minpd, 1, 0, 1
951 AVX_INSTR minps, 1, 0, 1
952 AVX_INSTR minsd, 1, 0, 1
953 AVX_INSTR minss, 1, 0, 1
954 AVX_INSTR movhlps, 1, 0, 0
955 AVX_INSTR movlhps, 1, 0, 0
956 AVX_INSTR movsd, 1, 0, 0
957 AVX_INSTR movss, 1, 0, 0
958 AVX_INSTR mpsadbw, 0, 1, 0
959 AVX_INSTR mulpd, 1, 0, 1
960 AVX_INSTR mulps, 1, 0, 1
961 AVX_INSTR mulsd, 1, 0, 1
962 AVX_INSTR mulss, 1, 0, 1
963 AVX_INSTR orpd, 1, 0, 1
964 AVX_INSTR orps, 1, 0, 1
965 AVX_INSTR packsswb, 0, 0, 0
966 AVX_INSTR packssdw, 0, 0, 0
967 AVX_INSTR packuswb, 0, 0, 0
968 AVX_INSTR packusdw, 0, 0, 0
969 AVX_INSTR paddb, 0, 0, 1
970 AVX_INSTR paddw, 0, 0, 1
971 AVX_INSTR paddd, 0, 0, 1
972 AVX_INSTR paddq, 0, 0, 1
973 AVX_INSTR paddsb, 0, 0, 1
974 AVX_INSTR paddsw, 0, 0, 1
975 AVX_INSTR paddusb, 0, 0, 1
976 AVX_INSTR paddusw, 0, 0, 1
977 AVX_INSTR palignr, 0, 1, 0
978 AVX_INSTR pand, 0, 0, 1
979 AVX_INSTR pandn, 0, 0, 0
980 AVX_INSTR pavgb, 0, 0, 1
981 AVX_INSTR pavgw, 0, 0, 1
982 AVX_INSTR pblendvb, 0, 0, 0
983 AVX_INSTR pblendw, 0, 1, 0
984 AVX_INSTR pcmpestri, 0, 0, 0
985 AVX_INSTR pcmpestrm, 0, 0, 0
986 AVX_INSTR pcmpistri, 0, 0, 0
987 AVX_INSTR pcmpistrm, 0, 0, 0
988 AVX_INSTR pcmpeqb, 0, 0, 1
989 AVX_INSTR pcmpeqw, 0, 0, 1
990 AVX_INSTR pcmpeqd, 0, 0, 1
991 AVX_INSTR pcmpeqq, 0, 0, 1
992 AVX_INSTR pcmpgtb, 0, 0, 0
993 AVX_INSTR pcmpgtw, 0, 0, 0
994 AVX_INSTR pcmpgtd, 0, 0, 0
995 AVX_INSTR pcmpgtq, 0, 0, 0
996 AVX_INSTR phaddw, 0, 0, 0
997 AVX_INSTR phaddd, 0, 0, 0
998 AVX_INSTR phaddsw, 0, 0, 0
999 AVX_INSTR phsubw, 0, 0, 0
1000 AVX_INSTR phsubd, 0, 0, 0
1001 AVX_INSTR phsubsw, 0, 0, 0
1002 AVX_INSTR pmaddwd, 0, 0, 1
1003 AVX_INSTR pmaddubsw, 0, 0, 0
1004 AVX_INSTR pmaxsb, 0, 0, 1
1005 AVX_INSTR pmaxsw, 0, 0, 1
1006 AVX_INSTR pmaxsd, 0, 0, 1
1007 AVX_INSTR pmaxub, 0, 0, 1
1008 AVX_INSTR pmaxuw, 0, 0, 1
1009 AVX_INSTR pmaxud, 0, 0, 1
1010 AVX_INSTR pminsb, 0, 0, 1
1011 AVX_INSTR pminsw, 0, 0, 1
1012 AVX_INSTR pminsd, 0, 0, 1
1013 AVX_INSTR pminub, 0, 0, 1
1014 AVX_INSTR pminuw, 0, 0, 1
1015 AVX_INSTR pminud, 0, 0, 1
1016 AVX_INSTR pmulhuw, 0, 0, 1
1017 AVX_INSTR pmulhrsw, 0, 0, 1
1018 AVX_INSTR pmulhw, 0, 0, 1
1019 AVX_INSTR pmullw, 0, 0, 1
1020 AVX_INSTR pmulld, 0, 0, 1
1021 AVX_INSTR pmuludq, 0, 0, 1
1022 AVX_INSTR pmuldq, 0, 0, 1
1023 AVX_INSTR por, 0, 0, 1
1024 AVX_INSTR psadbw, 0, 0, 1
1025 AVX_INSTR pshufb, 0, 0, 0
1026 AVX_INSTR psignb, 0, 0, 0
1027 AVX_INSTR psignw, 0, 0, 0
1028 AVX_INSTR psignd, 0, 0, 0
1029 AVX_INSTR psllw, 0, 0, 0
1030 AVX_INSTR pslld, 0, 0, 0
1031 AVX_INSTR psllq, 0, 0, 0
1032 AVX_INSTR pslldq, 0, 0, 0
1033 AVX_INSTR psraw, 0, 0, 0
1034 AVX_INSTR psrad, 0, 0, 0
1035 AVX_INSTR psrlw, 0, 0, 0
1036 AVX_INSTR psrld, 0, 0, 0
1037 AVX_INSTR psrlq, 0, 0, 0
1038 AVX_INSTR psrldq, 0, 0, 0
1039 AVX_INSTR psubb, 0, 0, 0
1040 AVX_INSTR psubw, 0, 0, 0
1041 AVX_INSTR psubd, 0, 0, 0
1042 AVX_INSTR psubq, 0, 0, 0
1043 AVX_INSTR psubsb, 0, 0, 0
1044 AVX_INSTR psubsw, 0, 0, 0
1045 AVX_INSTR psubusb, 0, 0, 0
1046 AVX_INSTR psubusw, 0, 0, 0
1047 AVX_INSTR punpckhbw, 0, 0, 0
1048 AVX_INSTR punpckhwd, 0, 0, 0
1049 AVX_INSTR punpckhdq, 0, 0, 0
1050 AVX_INSTR punpckhqdq, 0, 0, 0
1051 AVX_INSTR punpcklbw, 0, 0, 0
1052 AVX_INSTR punpcklwd, 0, 0, 0
1053 AVX_INSTR punpckldq, 0, 0, 0
1054 AVX_INSTR punpcklqdq, 0, 0, 0
1055 AVX_INSTR pxor, 0, 0, 1
1056 AVX_INSTR shufps, 1, 1, 0
1057 AVX_INSTR subpd, 1, 0, 0
1058 AVX_INSTR subps, 1, 0, 0
1059 AVX_INSTR subsd, 1, 0, 0
1060 AVX_INSTR subss, 1, 0, 0
1061 AVX_INSTR unpckhpd, 1, 0, 0
1062 AVX_INSTR unpckhps, 1, 0, 0
1063 AVX_INSTR unpcklpd, 1, 0, 0
1064 AVX_INSTR unpcklps, 1, 0, 0
1065 AVX_INSTR xorpd, 1, 0, 1
1066 AVX_INSTR xorps, 1, 0, 1
1068 ; 3DNow instructions, for sharing code between AVX, SSE and 3DN
1069 AVX_INSTR pfadd, 1, 0, 1
1070 AVX_INSTR pfsub, 1, 0, 0
1071 AVX_INSTR pfmul, 1, 0, 1
1073 ; base-4 constants for shuffles
1076 %assign j ((i>>6)&3)*1000 + ((i>>4)&3)*100 + ((i>>2)&3)*10 + (i&3)
1078 CAT_XDEFINE q000, j, i
1080 CAT_XDEFINE q00, j, i
1082 CAT_XDEFINE q0, j, i
1092 %macro %1 4-7 %1, %2, %3
1102 FMA_INSTR pmacsdd, pmulld, paddd
1103 FMA_INSTR pmacsww, pmullw, paddw
1104 FMA_INSTR pmadcswd, pmaddwd, paddd