1 ;*****************************************************************************
2 ;* x86inc.asm: x264asm abstraction layer
3 ;*****************************************************************************
4 ;* Copyright (C) 2005-2012 x264 project
6 ;* Authors: Loren Merritt <lorenm@u.washington.edu>
7 ;* Anton Mitrofanov <BugMaster@narod.ru>
8 ;* Jason Garrett-Glaser <darkshikari@gmail.com>
9 ;* Henrik Gramner <hengar-6@student.ltu.se>
11 ;* Permission to use, copy, modify, and/or distribute this software for any
12 ;* purpose with or without fee is hereby granted, provided that the above
13 ;* copyright notice and this permission notice appear in all copies.
15 ;* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
16 ;* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
17 ;* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
18 ;* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
19 ;* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
20 ;* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
21 ;* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 ;*****************************************************************************
24 ; This is a header file for the x264ASM assembly language, which uses
25 ; NASM/YASM syntax combined with a large number of macros to provide easy
26 ; abstraction between different calling conventions (x86_32, win64, linux64).
27 ; It also has various other useful features to simplify writing the kind of
28 ; DSP functions that are most often used in x264.
30 ; Unlike the rest of x264, this file is available under an ISC license, as it
31 ; has significant usefulness outside of x264 and we want it to be available
32 ; to the largest audience possible. Of course, if you modify it for your own
33 ; purposes to add a new feature, we strongly encourage contributing a patch
34 ; as this feature might be useful for others as well. Send patches or ideas
35 ; to x264-devel@videolan.org .
37 %define program_name ff
42 %ifidn __OUTPUT_FORMAT__,win32
44 %elifidn __OUTPUT_FORMAT__,win64
52 %define mangle(x) _ %+ x
57 ; FIXME: All of the 64bit asm functions that take a stride as an argument
58 ; via register, assume that the high dword of that register is filled with 0.
59 ; This is true in practice (since we never do any 64bit arithmetic on strides,
60 ; and x264's strides are all positive), but is not guaranteed by the ABI.
62 ; Name of the .rodata section.
63 %macro SECTION_RODATA 0-1 16
64 ; Kludge: Something on OS X fails to align .rodata even given an align
65 ; attribute, so use a different read-only section. This has been fixed in
66 ; yasm 0.8.0 and nasm 2.6.
67 %ifdef __YASM_VERSION_ID__
68 %if __YASM_VERSION_ID__ < 00080000h
69 %define NEED_MACHO_RODATA_KLUDGE
71 %elifdef __NASM_VERSION_ID__
72 %if __NASM_VERSION_ID__ < 02060000h
73 %define NEED_MACHO_RODATA_KLUDGE
77 %ifidn __OUTPUT_FORMAT__,aout
80 %ifndef NEED_MACHO_RODATA_KLUDGE
81 SECTION .rodata align=%1
83 %ifidn __OUTPUT_FORMAT__,macho64
84 SECTION .text align=%1
85 %elifidn __OUTPUT_FORMAT__,macho
86 SECTION .text align=%1
89 SECTION .rodata align=%1
94 %undef NEED_MACHO_RODATA_KLUDGE
97 ; aout does not support align=
98 %macro SECTION_TEXT 0-1 16
99 %ifidn __OUTPUT_FORMAT__,aout
102 SECTION .text align=%1
108 %elif ARCH_X86_64 == 0
109 ; x86_32 doesn't require PIC.
110 ; Some distros prefer shared objects to be PIC, but nothing breaks if
111 ; the code contains a few textrels, so we'll skip that complexity.
118 ; Always use long nops (reduces 0x90 spam in disassembly on x86_32)
119 ; Not supported by NASM (except via smartalign package + ALIGNMODE k8,
120 ; however that fails when used together with the -M option)
125 ; Macros to eliminate most code duplication between x86_32 and x86_64:
126 ; Currently this works only for leaf functions which load all their arguments
127 ; into registers at the start, and make no other use of the stack. Luckily that
128 ; covers most of x264's asm.
131 ; %1 = number of arguments. loads them from stack if needed.
132 ; %2 = number of registers used. pushes callee-saved regs if needed.
133 ; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed.
134 ; %4 = list of names to define to registers
135 ; PROLOGUE can also be invoked by adding the same options to cglobal
138 ; cglobal foo, 2,3,0, dst, src, tmp
139 ; declares a function (foo), taking two args (dst and src) and one local variable (tmp)
141 ; TODO Some functions can use some args directly from the stack. If they're the
142 ; last args then you can just not declare them, but if they're in the middle
143 ; we need more flexible macro.
146 ; Pops anything that was pushed by PROLOGUE, and returns.
149 ; Same, but if it doesn't pop anything it becomes a 2-byte ret, for athlons
150 ; which are slow when a normal ret follows a branch.
153 ; rN and rNq are the native-size register holding function argument N
154 ; rNd, rNw, rNb are dword, word, and byte size
155 ; rNm is the original location of arg N (a register or on the stack), dword
156 ; rNmp is native size
158 %macro DECLARE_REG 5-6
166 %elif ARCH_X86_64 ; memory
167 %define r%1m [rsp + stack_offset + %6]
168 %define r%1mp qword r %+ %1 %+ m
170 %define r%1m [esp + stack_offset + %6]
171 %define r%1mp dword r %+ %1 %+ m
176 %macro DECLARE_REG_SIZE 2
190 DECLARE_REG_SIZE ax, al
191 DECLARE_REG_SIZE bx, bl
192 DECLARE_REG_SIZE cx, cl
193 DECLARE_REG_SIZE dx, dl
194 DECLARE_REG_SIZE si, sil
195 DECLARE_REG_SIZE di, dil
196 DECLARE_REG_SIZE bp, bpl
198 ; t# defines for when per-arch register allocation is more complex than just function arguments
200 %macro DECLARE_REG_TMP 1-*
203 CAT_XDEFINE t, %%i, r%1
209 %macro DECLARE_REG_TMP_SIZE 0-*
211 %define t%1q t%1 %+ q
212 %define t%1d t%1 %+ d
213 %define t%1w t%1 %+ w
214 %define t%1b t%1 %+ b
219 DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14
229 %assign stack_offset stack_offset+gprsize
234 %assign stack_offset stack_offset-gprsize
237 %macro PUSH_IF_USED 1-*
246 %macro POP_IF_USED 1-*
255 %macro LOAD_IF_USED 1-*
258 mov r%1, r %+ %1 %+ mp
267 %assign stack_offset stack_offset+(%2)
274 %assign stack_offset stack_offset-(%2)
284 %macro movsxdifnidn 2
296 %macro DEFINE_ARGS 0-*
300 CAT_UNDEF arg_name %+ %%i, q
301 CAT_UNDEF arg_name %+ %%i, d
302 CAT_UNDEF arg_name %+ %%i, w
303 CAT_UNDEF arg_name %+ %%i, b
304 CAT_UNDEF arg_name %+ %%i, m
305 CAT_UNDEF arg_name %+ %%i, mp
306 CAT_UNDEF arg_name, %%i
311 %xdefine %%stack_offset stack_offset
312 %undef stack_offset ; so that the current value of stack_offset doesn't get baked in by xdefine
315 %xdefine %1q r %+ %%i %+ q
316 %xdefine %1d r %+ %%i %+ d
317 %xdefine %1w r %+ %%i %+ w
318 %xdefine %1b r %+ %%i %+ b
319 %xdefine %1m r %+ %%i %+ m
320 %xdefine %1mp r %+ %%i %+ mp
321 CAT_XDEFINE arg_name, %%i, %1
325 %xdefine stack_offset %%stack_offset
326 %assign n_arg_names %0
329 %if WIN64 ; Windows x64 ;=================================================
331 DECLARE_REG 0, rcx, ecx, cx, cl
332 DECLARE_REG 1, rdx, edx, dx, dl
333 DECLARE_REG 2, R8, R8D, R8W, R8B
334 DECLARE_REG 3, R9, R9D, R9W, R9B
335 DECLARE_REG 4, R10, R10D, R10W, R10B, 40
336 DECLARE_REG 5, R11, R11D, R11W, R11B, 48
337 DECLARE_REG 6, rax, eax, ax, al, 56
338 DECLARE_REG 7, rdi, edi, di, dil, 64
339 DECLARE_REG 8, rsi, esi, si, sil, 72
340 DECLARE_REG 9, rbx, ebx, bx, bl, 80
341 DECLARE_REG 10, rbp, ebp, bp, bpl, 88
342 DECLARE_REG 11, R12, R12D, R12W, R12B, 96
343 DECLARE_REG 12, R13, R13D, R13W, R13B, 104
344 DECLARE_REG 13, R14, R14D, R14W, R14B, 112
345 DECLARE_REG 14, R15, R15D, R15W, R15B, 120
347 %macro PROLOGUE 2-4+ 0 ; #args, #regs, #xmm_regs, arg_names...
350 ASSERT regs_used >= num_args
351 ASSERT regs_used <= 15
352 PUSH_IF_USED 7, 8, 9, 10, 11, 12, 13, 14
354 %assign xmm_regs_used 0
358 LOAD_IF_USED 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
362 %macro WIN64_SPILL_XMM 1
363 %assign xmm_regs_used %1
364 ASSERT xmm_regs_used <= 16
365 %if xmm_regs_used > 6
366 SUB rsp, (xmm_regs_used-6)*16+16
367 %assign %%i xmm_regs_used
368 %rep (xmm_regs_used-6)
370 movdqa [rsp + (%%i-6)*16+(~stack_offset&8)], xmm %+ %%i
375 %macro WIN64_RESTORE_XMM_INTERNAL 1
376 %if xmm_regs_used > 6
377 %assign %%i xmm_regs_used
378 %rep (xmm_regs_used-6)
380 movdqa xmm %+ %%i, [%1 + (%%i-6)*16+(~stack_offset&8)]
382 add %1, (xmm_regs_used-6)*16+16
386 %macro WIN64_RESTORE_XMM 1
387 WIN64_RESTORE_XMM_INTERNAL %1
388 %assign stack_offset stack_offset-(xmm_regs_used-6)*16+16
389 %assign xmm_regs_used 0
393 WIN64_RESTORE_XMM_INTERNAL rsp
394 POP_IF_USED 14, 13, 12, 11, 10, 9, 8, 7
399 %if regs_used > 7 || xmm_regs_used > 6
406 %elif ARCH_X86_64 ; *nix x64 ;=============================================
408 DECLARE_REG 0, rdi, edi, di, dil
409 DECLARE_REG 1, rsi, esi, si, sil
410 DECLARE_REG 2, rdx, edx, dx, dl
411 DECLARE_REG 3, rcx, ecx, cx, cl
412 DECLARE_REG 4, R8, R8D, R8W, R8B
413 DECLARE_REG 5, R9, R9D, R9W, R9B
414 DECLARE_REG 6, rax, eax, ax, al, 8
415 DECLARE_REG 7, R10, R10D, R10W, R10B, 16
416 DECLARE_REG 8, R11, R11D, R11W, R11B, 24
417 DECLARE_REG 9, rbx, ebx, bx, bl, 32
418 DECLARE_REG 10, rbp, ebp, bp, bpl, 40
419 DECLARE_REG 11, R12, R12D, R12W, R12B, 48
420 DECLARE_REG 12, R13, R13D, R13W, R13B, 56
421 DECLARE_REG 13, R14, R14D, R14W, R14B, 64
422 DECLARE_REG 14, R15, R15D, R15W, R15B, 72
424 %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
427 ASSERT regs_used >= num_args
428 ASSERT regs_used <= 15
429 PUSH_IF_USED 9, 10, 11, 12, 13, 14
430 LOAD_IF_USED 6, 7, 8, 9, 10, 11, 12, 13, 14
435 POP_IF_USED 14, 13, 12, 11, 10, 9
447 %else ; X86_32 ;==============================================================
449 DECLARE_REG 0, eax, eax, ax, al, 4
450 DECLARE_REG 1, ecx, ecx, cx, cl, 8
451 DECLARE_REG 2, edx, edx, dx, dl, 12
452 DECLARE_REG 3, ebx, ebx, bx, bl, 16
453 DECLARE_REG 4, esi, esi, si, null, 20
454 DECLARE_REG 5, edi, edi, di, null, 24
455 DECLARE_REG 6, ebp, ebp, bp, null, 28
458 %macro DECLARE_ARG 1-*
460 %define r%1m [esp + stack_offset + 4*%1 + 4]
461 %define r%1mp dword r%1m
466 DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
468 %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
474 ASSERT regs_used >= num_args
475 PUSH_IF_USED 3, 4, 5, 6
476 LOAD_IF_USED 0, 1, 2, 3, 4, 5, 6
481 POP_IF_USED 6, 5, 4, 3
493 %endif ;======================================================================
496 %macro WIN64_SPILL_XMM 1
498 %macro WIN64_RESTORE_XMM 1
502 ;=============================================================================
503 ; arch-independent part
504 ;=============================================================================
506 %assign function_align 16
509 ; Applies any symbol mangling needed for C linkage, and sets up a define such that
510 ; subsequent uses of the function name automatically refer to the mangled version.
511 ; Appends cpuflags to the function name if cpuflags has been specified.
512 %macro cglobal 1-2+ ; name, [PROLOGUE args]
514 ; HACK: work around %+ broken with empty SUFFIX for nasm 2.09.10
518 cglobal_internal %1 %+ SUFFIX
521 ; HACK: work around %+ broken with empty SUFFIX for nasm 2.09.10
523 cglobal_internal %1, %2
525 cglobal_internal %1 %+ SUFFIX, %2
529 %macro cglobal_internal 1-2+
531 %xdefine %1 mangle(program_name %+ _ %+ %1)
532 %xdefine %1.skip_prologue %1 %+ .skip_prologue
533 CAT_XDEFINE cglobaled_, %1, 1
535 %xdefine current_function %1
536 %ifidn __OUTPUT_FORMAT__,elf
537 global %1:function hidden
543 RESET_MM_PERMUTATION ; not really needed, but makes disassembly somewhat nicer
544 %assign stack_offset 0
551 %xdefine %1 mangle(program_name %+ _ %+ %1)
552 CAT_XDEFINE cglobaled_, %1, 1
556 ; like cextern, but without the prefix
557 %macro cextern_naked 1
558 %xdefine %1 mangle(%1)
559 CAT_XDEFINE cglobaled_, %1, 1
564 %xdefine %1 mangle(program_name %+ _ %+ %1)
569 ; This is needed for ELF, otherwise the GNU linker assumes the stack is
570 ; executable by default.
571 %ifidn __OUTPUT_FORMAT__,elf
572 SECTION .note.GNU-stack noalloc noexec nowrite progbits
577 %assign cpuflags_mmx (1<<0)
578 %assign cpuflags_mmx2 (1<<1) | cpuflags_mmx
579 %assign cpuflags_3dnow (1<<2) | cpuflags_mmx
580 %assign cpuflags_3dnow2 (1<<3) | cpuflags_3dnow
581 %assign cpuflags_sse (1<<4) | cpuflags_mmx2
582 %assign cpuflags_sse2 (1<<5) | cpuflags_sse
583 %assign cpuflags_sse2slow (1<<6) | cpuflags_sse2
584 %assign cpuflags_sse3 (1<<7) | cpuflags_sse2
585 %assign cpuflags_ssse3 (1<<8) | cpuflags_sse3
586 %assign cpuflags_sse4 (1<<9) | cpuflags_ssse3
587 %assign cpuflags_sse42 (1<<10)| cpuflags_sse4
588 %assign cpuflags_avx (1<<11)| cpuflags_sse42
589 %assign cpuflags_xop (1<<12)| cpuflags_avx
590 %assign cpuflags_fma4 (1<<13)| cpuflags_avx
592 %assign cpuflags_cache32 (1<<16)
593 %assign cpuflags_cache64 (1<<17)
594 %assign cpuflags_slowctz (1<<18)
595 %assign cpuflags_lzcnt (1<<19)
596 %assign cpuflags_misalign (1<<20)
597 %assign cpuflags_aligned (1<<21) ; not a cpu feature, but a function variant
598 %assign cpuflags_atom (1<<22)
600 %define cpuflag(x) ((cpuflags & (cpuflags_ %+ x)) == (cpuflags_ %+ x))
601 %define notcpuflag(x) ((cpuflags & (cpuflags_ %+ x)) != (cpuflags_ %+ x))
603 ; Takes up to 2 cpuflags from the above list.
604 ; All subsequent functions (up to the next INIT_CPUFLAGS) is built for the specified cpu.
605 ; You shouldn't need to invoke this macro directly, it's a subroutine for INIT_MMX &co.
606 %macro INIT_CPUFLAGS 0-2
609 %assign cpuflags cpuflags_%1
611 %xdefine cpuname %1_%2
612 %assign cpuflags cpuflags | cpuflags_%2
614 %xdefine SUFFIX _ %+ cpuname
616 %assign avx_enabled 1
618 %if mmsize == 16 && notcpuflag(sse2)
621 %define movnta movntps
646 %assign avx_enabled 0
647 %define RESET_MM_PERMUTATION INIT_MMX %1
653 %define movnta movntq
656 CAT_XDEFINE m, %%i, mm %+ %%i
657 CAT_XDEFINE nmm, %%i, %%i
669 %assign avx_enabled 0
670 %define RESET_MM_PERMUTATION INIT_XMM %1
674 %define num_mmregs 16
679 %define movnta movntdq
682 CAT_XDEFINE m, %%i, xmm %+ %%i
683 CAT_XDEFINE nxmm, %%i, %%i
689 ; FIXME: INIT_AVX can be replaced by INIT_XMM avx
692 %assign avx_enabled 1
693 %define PALIGNR PALIGNR_SSSE3
694 %define RESET_MM_PERMUTATION INIT_AVX
698 %assign avx_enabled 1
699 %define RESET_MM_PERMUTATION INIT_YMM %1
703 %define num_mmregs 16
708 %define movnta vmovntps
711 CAT_XDEFINE m, %%i, ymm %+ %%i
712 CAT_XDEFINE nymm, %%i, %%i
720 ; I often want to use macros that permute their arguments. e.g. there's no
721 ; efficient way to implement butterfly or transpose or dct without swapping some
724 ; I would like to not have to manually keep track of the permutations:
725 ; If I insert a permutation in the middle of a function, it should automatically
726 ; change everything that follows. For more complex macros I may also have multiple
727 ; implementations, e.g. the SSE2 and SSSE3 versions may have different permutations.
729 ; Hence these macros. Insert a PERMUTE or some SWAPs at the end of a macro that
730 ; permutes its arguments. It's equivalent to exchanging the contents of the
731 ; registers, except that this way you exchange the register names instead, so it
732 ; doesn't cost any cycles.
734 %macro PERMUTE 2-* ; takes a list of pairs to swap
749 %macro SWAP 2-* ; swaps a single chain (sometimes more concise than pairs)
755 CAT_XDEFINE n, m%1, %1
756 CAT_XDEFINE n, m%2, %2
758 ; If we were called as "SWAP m0,m1" rather than "SWAP 0,1" infer the original numbers here.
759 ; Be careful using this mode in nested macros though, as in some cases there may be
760 ; other copies of m# that have already been dereferenced and don't get updated correctly.
761 %xdefine %%n1 n %+ %1
762 %xdefine %%n2 n %+ %2
763 %xdefine tmp m %+ %%n1
764 CAT_XDEFINE m, %%n1, m %+ %%n2
765 CAT_XDEFINE m, %%n2, tmp
766 CAT_XDEFINE n, m %+ %%n1, %%n1
767 CAT_XDEFINE n, m %+ %%n2, %%n2
774 ; If SAVE_MM_PERMUTATION is placed at the end of a function, then any later
775 ; calls to that function will automatically load the permutation, so values can
776 ; be returned in mmregs.
777 %macro SAVE_MM_PERMUTATION 0-1
781 %xdefine %%f current_function %+ _m
785 CAT_XDEFINE %%f, %%i, m %+ %%i
790 %macro LOAD_MM_PERMUTATION 1 ; name to load from
794 CAT_XDEFINE m, %%i, %1_m %+ %%i
795 CAT_XDEFINE n, m %+ %%i, %%i
801 ; Append cpuflags to the callee's name iff the appended name is known and the plain name isn't
803 ; HACK: work around %+ broken with empty SUFFIX for nasm 2.09.10
807 call_internal %1, %1 %+ SUFFIX
810 %macro call_internal 2
818 LOAD_MM_PERMUTATION %%i
821 ; Substitutions that reduce instruction size but are functionally equivalent
846 ;=============================================================================
847 ; AVX abstraction layer
848 ;=============================================================================
853 CAT_XDEFINE sizeofmm, i, 8
855 CAT_XDEFINE sizeofxmm, i, 16
856 CAT_XDEFINE sizeofymm, i, 32
862 ;%2 == 1 if float, 0 if int
863 ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 2- or 3-operand (xmm, xmm, xmm)
864 ;%4 == number of operands given
866 %macro RUN_AVX_INSTR 6-7+
868 %define %%size sizeof%5
870 %define %%size mmsize
880 %define %%regmov movq
882 %define %%regmov movaps
884 %define %%regmov movdqa
889 %if avx_enabled && sizeof%5==16
906 ; 3arg AVX ops with a memory arg can only have it in src2,
907 ; whereas SSE emulation of 3arg prefers to have it in src1 (i.e. the mov).
908 ; So, if the op is symmetric and the wrong one is memory, swap them.
909 %macro RUN_AVX_INSTR1 8
920 %if %%swap && %3 == 0 && %8 == 1
921 RUN_AVX_INSTR %1, %2, %3, %4, %5, %7, %6
923 RUN_AVX_INSTR %1, %2, %3, %4, %5, %6, %7
928 ;%2 == 1 if float, 0 if int
929 ;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 3-operand (xmm, xmm, xmm)
930 ;%4 == 1 if symmetric (i.e. doesn't matter which src arg is which), 0 if not
932 %macro %1 2-9 fnord, fnord, fnord, %1, %2, %3, %4
934 RUN_AVX_INSTR %6, %7, %8, 2, %1, %2
936 RUN_AVX_INSTR1 %6, %7, %8, 3, %1, %2, %3, %9
938 RUN_AVX_INSTR %6, %7, %8, 4, %1, %2, %3, %4
940 RUN_AVX_INSTR %6, %7, %8, 5, %1, %2, %3, %4, %5
945 AVX_INSTR addpd, 1, 0, 1
946 AVX_INSTR addps, 1, 0, 1
947 AVX_INSTR addsd, 1, 0, 1
948 AVX_INSTR addss, 1, 0, 1
949 AVX_INSTR addsubpd, 1, 0, 0
950 AVX_INSTR addsubps, 1, 0, 0
951 AVX_INSTR andpd, 1, 0, 1
952 AVX_INSTR andps, 1, 0, 1
953 AVX_INSTR andnpd, 1, 0, 0
954 AVX_INSTR andnps, 1, 0, 0
955 AVX_INSTR blendpd, 1, 0, 0
956 AVX_INSTR blendps, 1, 0, 0
957 AVX_INSTR blendvpd, 1, 0, 0
958 AVX_INSTR blendvps, 1, 0, 0
959 AVX_INSTR cmppd, 1, 0, 0
960 AVX_INSTR cmpps, 1, 0, 0
961 AVX_INSTR cmpsd, 1, 0, 0
962 AVX_INSTR cmpss, 1, 0, 0
963 AVX_INSTR cvtdq2ps, 1, 0, 0
964 AVX_INSTR cvtps2dq, 1, 0, 0
965 AVX_INSTR divpd, 1, 0, 0
966 AVX_INSTR divps, 1, 0, 0
967 AVX_INSTR divsd, 1, 0, 0
968 AVX_INSTR divss, 1, 0, 0
969 AVX_INSTR dppd, 1, 1, 0
970 AVX_INSTR dpps, 1, 1, 0
971 AVX_INSTR haddpd, 1, 0, 0
972 AVX_INSTR haddps, 1, 0, 0
973 AVX_INSTR hsubpd, 1, 0, 0
974 AVX_INSTR hsubps, 1, 0, 0
975 AVX_INSTR maxpd, 1, 0, 1
976 AVX_INSTR maxps, 1, 0, 1
977 AVX_INSTR maxsd, 1, 0, 1
978 AVX_INSTR maxss, 1, 0, 1
979 AVX_INSTR minpd, 1, 0, 1
980 AVX_INSTR minps, 1, 0, 1
981 AVX_INSTR minsd, 1, 0, 1
982 AVX_INSTR minss, 1, 0, 1
983 AVX_INSTR movhlps, 1, 0, 0
984 AVX_INSTR movlhps, 1, 0, 0
985 AVX_INSTR movsd, 1, 0, 0
986 AVX_INSTR movss, 1, 0, 0
987 AVX_INSTR mpsadbw, 0, 1, 0
988 AVX_INSTR mulpd, 1, 0, 1
989 AVX_INSTR mulps, 1, 0, 1
990 AVX_INSTR mulsd, 1, 0, 1
991 AVX_INSTR mulss, 1, 0, 1
992 AVX_INSTR orpd, 1, 0, 1
993 AVX_INSTR orps, 1, 0, 1
994 AVX_INSTR packsswb, 0, 0, 0
995 AVX_INSTR packssdw, 0, 0, 0
996 AVX_INSTR packuswb, 0, 0, 0
997 AVX_INSTR packusdw, 0, 0, 0
998 AVX_INSTR paddb, 0, 0, 1
999 AVX_INSTR paddw, 0, 0, 1
1000 AVX_INSTR paddd, 0, 0, 1
1001 AVX_INSTR paddq, 0, 0, 1
1002 AVX_INSTR paddsb, 0, 0, 1
1003 AVX_INSTR paddsw, 0, 0, 1
1004 AVX_INSTR paddusb, 0, 0, 1
1005 AVX_INSTR paddusw, 0, 0, 1
1006 AVX_INSTR palignr, 0, 1, 0
1007 AVX_INSTR pand, 0, 0, 1
1008 AVX_INSTR pandn, 0, 0, 0
1009 AVX_INSTR pavgb, 0, 0, 1
1010 AVX_INSTR pavgw, 0, 0, 1
1011 AVX_INSTR pblendvb, 0, 0, 0
1012 AVX_INSTR pblendw, 0, 1, 0
1013 AVX_INSTR pcmpestri, 0, 0, 0
1014 AVX_INSTR pcmpestrm, 0, 0, 0
1015 AVX_INSTR pcmpistri, 0, 0, 0
1016 AVX_INSTR pcmpistrm, 0, 0, 0
1017 AVX_INSTR pcmpeqb, 0, 0, 1
1018 AVX_INSTR pcmpeqw, 0, 0, 1
1019 AVX_INSTR pcmpeqd, 0, 0, 1
1020 AVX_INSTR pcmpeqq, 0, 0, 1
1021 AVX_INSTR pcmpgtb, 0, 0, 0
1022 AVX_INSTR pcmpgtw, 0, 0, 0
1023 AVX_INSTR pcmpgtd, 0, 0, 0
1024 AVX_INSTR pcmpgtq, 0, 0, 0
1025 AVX_INSTR phaddw, 0, 0, 0
1026 AVX_INSTR phaddd, 0, 0, 0
1027 AVX_INSTR phaddsw, 0, 0, 0
1028 AVX_INSTR phsubw, 0, 0, 0
1029 AVX_INSTR phsubd, 0, 0, 0
1030 AVX_INSTR phsubsw, 0, 0, 0
1031 AVX_INSTR pmaddwd, 0, 0, 1
1032 AVX_INSTR pmaddubsw, 0, 0, 0
1033 AVX_INSTR pmaxsb, 0, 0, 1
1034 AVX_INSTR pmaxsw, 0, 0, 1
1035 AVX_INSTR pmaxsd, 0, 0, 1
1036 AVX_INSTR pmaxub, 0, 0, 1
1037 AVX_INSTR pmaxuw, 0, 0, 1
1038 AVX_INSTR pmaxud, 0, 0, 1
1039 AVX_INSTR pminsb, 0, 0, 1
1040 AVX_INSTR pminsw, 0, 0, 1
1041 AVX_INSTR pminsd, 0, 0, 1
1042 AVX_INSTR pminub, 0, 0, 1
1043 AVX_INSTR pminuw, 0, 0, 1
1044 AVX_INSTR pminud, 0, 0, 1
1045 AVX_INSTR pmulhuw, 0, 0, 1
1046 AVX_INSTR pmulhrsw, 0, 0, 1
1047 AVX_INSTR pmulhw, 0, 0, 1
1048 AVX_INSTR pmullw, 0, 0, 1
1049 AVX_INSTR pmulld, 0, 0, 1
1050 AVX_INSTR pmuludq, 0, 0, 1
1051 AVX_INSTR pmuldq, 0, 0, 1
1052 AVX_INSTR por, 0, 0, 1
1053 AVX_INSTR psadbw, 0, 0, 1
1054 AVX_INSTR pshufb, 0, 0, 0
1055 AVX_INSTR psignb, 0, 0, 0
1056 AVX_INSTR psignw, 0, 0, 0
1057 AVX_INSTR psignd, 0, 0, 0
1058 AVX_INSTR psllw, 0, 0, 0
1059 AVX_INSTR pslld, 0, 0, 0
1060 AVX_INSTR psllq, 0, 0, 0
1061 AVX_INSTR pslldq, 0, 0, 0
1062 AVX_INSTR psraw, 0, 0, 0
1063 AVX_INSTR psrad, 0, 0, 0
1064 AVX_INSTR psrlw, 0, 0, 0
1065 AVX_INSTR psrld, 0, 0, 0
1066 AVX_INSTR psrlq, 0, 0, 0
1067 AVX_INSTR psrldq, 0, 0, 0
1068 AVX_INSTR psubb, 0, 0, 0
1069 AVX_INSTR psubw, 0, 0, 0
1070 AVX_INSTR psubd, 0, 0, 0
1071 AVX_INSTR psubq, 0, 0, 0
1072 AVX_INSTR psubsb, 0, 0, 0
1073 AVX_INSTR psubsw, 0, 0, 0
1074 AVX_INSTR psubusb, 0, 0, 0
1075 AVX_INSTR psubusw, 0, 0, 0
1076 AVX_INSTR punpckhbw, 0, 0, 0
1077 AVX_INSTR punpckhwd, 0, 0, 0
1078 AVX_INSTR punpckhdq, 0, 0, 0
1079 AVX_INSTR punpckhqdq, 0, 0, 0
1080 AVX_INSTR punpcklbw, 0, 0, 0
1081 AVX_INSTR punpcklwd, 0, 0, 0
1082 AVX_INSTR punpckldq, 0, 0, 0
1083 AVX_INSTR punpcklqdq, 0, 0, 0
1084 AVX_INSTR pxor, 0, 0, 1
1085 AVX_INSTR shufps, 1, 1, 0
1086 AVX_INSTR subpd, 1, 0, 0
1087 AVX_INSTR subps, 1, 0, 0
1088 AVX_INSTR subsd, 1, 0, 0
1089 AVX_INSTR subss, 1, 0, 0
1090 AVX_INSTR unpckhpd, 1, 0, 0
1091 AVX_INSTR unpckhps, 1, 0, 0
1092 AVX_INSTR unpcklpd, 1, 0, 0
1093 AVX_INSTR unpcklps, 1, 0, 0
1094 AVX_INSTR xorpd, 1, 0, 1
1095 AVX_INSTR xorps, 1, 0, 1
1097 ; 3DNow instructions, for sharing code between AVX, SSE and 3DN
1098 AVX_INSTR pfadd, 1, 0, 1
1099 AVX_INSTR pfsub, 1, 0, 0
1100 AVX_INSTR pfmul, 1, 0, 1
1102 ; base-4 constants for shuffles
1105 %assign j ((i>>6)&3)*1000 + ((i>>4)&3)*100 + ((i>>2)&3)*10 + (i&3)
1107 CAT_XDEFINE q000, j, i
1109 CAT_XDEFINE q00, j, i
1111 CAT_XDEFINE q0, j, i
1121 %macro %1 4-7 %1, %2, %3
1131 FMA_INSTR pmacsdd, pmulld, paddd
1132 FMA_INSTR pmacsww, pmullw, paddw
1133 FMA_INSTR pmadcswd, pmaddwd, paddd