2 * Copyright (c) 2016 Clément Bœsch <clement stupeflix.com>
3 * Copyright (c) 2016 Matthieu Bouron <matthieu.bouron stupeflix.com>
5 * This file is part of FFmpeg.
7 * FFmpeg is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * FFmpeg is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with FFmpeg; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
22 #include "libavutil/arm/asm.S"
24 function ff_hscale_8_to_15_neon, export=1
27 ldr r4, [sp, #104] @ filter
28 ldr r5, [sp, #108] @ filterPos
29 ldr r6, [sp, #112] @ filterSize
30 add r10, r4, r6, lsl #1 @ filter2 = filter + filterSize * 2
31 1: ldr r8, [r5], #4 @ filterPos[0]
32 ldr r9, [r5], #4 @ filterPos[1]
33 vmov.s32 q4, #0 @ val accumulator
34 vmov.s32 q5, #0 @ val accumulator
35 mov r7, r6 @ tmpfilterSize = filterSize
37 2: add r11, r0, r8 @ srcp + filterPos[0]
38 add r12, r0, r9 @ srcp + filterPos[1]
39 vld1.8 d0, [r11] @ srcp[filterPos[0] + {0..7}]
40 vld1.8 d2, [r12] @ srcp[filterPos[1] + {0..7}]
41 vld1.16 {q2}, [r4]! @ load 8x16-bit filter values
42 vld1.16 {q3}, [r10]! @ load 8x16-bit filter values
43 vmovl.u8 q0, d0 @ unpack src values to 16-bit
44 vmovl.u8 q1, d2 @ unpack src values to 16-bit
45 vmull.s16 q8, d0, d4 @ srcp[filterPos[0] + {0..7}] * filter[{0..7}] (part 1)
46 vmull.s16 q9, d1, d5 @ srcp[filterPos[0] + {0..7}] * filter[{0..7}] (part 2)
47 vmull.s16 q10, d2, d6 @ srcp[filterPos[1] + {0..7}] * filter[{0..7}] (part 1)
48 vmull.s16 q11, d3, d7 @ srcp[filterPos[1] + {0..7}] * filter[{0..7}] (part 2)
49 vpadd.s32 d16, d16, d17 @ horizontal pair adding of the 8x32-bit multiplied values into 4x32-bit (part 1)
50 vpadd.s32 d17, d18, d19 @ horizontal pair adding of the 8x32-bit multiplied values into 4x32-bit (part 2)
51 vpadd.s32 d20, d20, d21 @ horizontal pair adding of the 8x32-bit multiplied values into 4x32-bit (part 1)
52 vpadd.s32 d21, d22, d23 @ horizontal pair adding of the 8x32-bit multiplied values into 4x32-bit (part 2)
53 vadd.s32 q4, q8 @ update val accumulator
54 vadd.s32 q5, q10 @ update val accumulator
55 add r0, #8 @ srcp += 8
56 subs r7, #8 @ tmpfilterSize -= 8
57 bgt 2b @ loop until tmpfilterSize is consumed
58 mov r4, r10 @ filter = filter2
59 add r10, r10, r6, lsl #1 @ filter2 += filterSize * 2
60 vpadd.s32 d8, d8, d9 @ horizontal pair adding of the 8x32-bit sums into 4x32-bit (part 1)
61 vpadd.s32 d9, d10, d11 @ horizontal pair adding of the 8x32-bit sums into 4x32-bit (part 2)
62 vpadd.s32 d8, d8, d9 @ horizontal pair adding of the 4x32-bit sums into 2x32-bit
63 vqshrn.s32 d8, q4, #7 @ shift and clip the 2x16-bit final values
64 vst1.32 {d8[0]},[r1]! @ write destination
65 subs r2, #2 @ dstW -= 2
66 bgt 1b @ loop until end of line