1 /* ======================================================================== */
2 /* ========================= LICENSING & COPYRIGHT ======================== */
3 /* ======================================================================== */
8 * A portable Motorola M680x0 processor emulation engine.
9 * Copyright Karl Stenerud. All rights reserved.
11 * Permission is hereby granted, free of charge, to any person obtaining a copy
12 * of this software and associated documentation files (the "Software"), to deal
13 * in the Software without restriction, including without limitation the rights
14 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
15 * copies of the Software, and to permit persons to whom the Software is
16 * furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice shall be included in
19 * all copies or substantial portions of the Software.
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
24 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
26 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
33 #ifndef M68KCPU__HEADER
34 #define M68KCPU__HEADER
48 /* ======================================================================== */
49 /* ==================== ARCHITECTURE-DEPENDANT DEFINES ==================== */
50 /* ======================================================================== */
52 /* Check for > 32bit sizes */
53 #if UINT_MAX > 0xffffffff
54 #define M68K_INT_GT_32_BIT 1
56 #define M68K_INT_GT_32_BIT 0
59 /* Data types used in this emulation core */
71 typedef signed char sint8; /* ASG: changed from char to signed char */
72 typedef signed short sint16;
73 typedef signed int sint32; /* AWJ: changed from long to int */
74 typedef unsigned char uint8;
75 typedef unsigned short uint16;
76 typedef unsigned int uint32; /* AWJ: changed from long to int */
78 /* signed and unsigned int must be at least 32 bits wide */
79 typedef signed int sint;
80 typedef unsigned int uint;
84 typedef signed long long sint64;
85 typedef unsigned long long uint64;
87 typedef sint32 sint64;
88 typedef uint32 uint64;
89 #endif /* M68K_USE_64_BIT */
91 /* U64 and S64 are used to wrap long integer constants. */
93 #define U64(val) val##ULL
94 #define S64(val) val##LL
100 #include "softfloat/milieu.h"
101 #include "softfloat/softfloat.h"
104 /* Allow for architectures that don't have 8-bit sizes */
105 #if UCHAR_MAX == 0xff
106 #define MAKE_INT_8(A) (sint8)(A)
109 #define sint8 signed int
111 #define uint8 unsigned int
112 static inline sint MAKE_INT_8(uint value)
114 return (value & 0x80) ? value | ~0xff : value & 0xff;
116 #endif /* UCHAR_MAX == 0xff */
119 /* Allow for architectures that don't have 16-bit sizes */
120 #if USHRT_MAX == 0xffff
121 #define MAKE_INT_16(A) (sint16)(A)
124 #define sint16 signed int
126 #define uint16 unsigned int
127 static inline sint MAKE_INT_16(uint value)
129 return (value & 0x8000) ? value | ~0xffff : value & 0xffff;
131 #endif /* USHRT_MAX == 0xffff */
134 /* Allow for architectures that don't have 32-bit sizes */
135 #if UINT_MAX == 0xffffffff
136 #define MAKE_INT_32(A) (sint32)(A)
139 #define sint32 signed int
141 #define uint32 unsigned int
142 static inline sint MAKE_INT_32(uint value)
144 return (value & 0x80000000) ? value | ~0xffffffff : value & 0xffffffff;
146 #endif /* UINT_MAX == 0xffffffff */
148 /* ======================================================================== */
149 /* ============================ GENERAL DEFINES =========================== */
150 /* ======================================================================== */
153 #define MMU_ATC_ENTRIES 22 // 68851 has 64, 030 has 22
155 /* instruction cache constants */
156 #define M68K_IC_SIZE 128
158 /* Exception Vectors handled by emulation */
159 #define EXCEPTION_RESET 0
160 #define EXCEPTION_BUS_ERROR 2 /* This one is not emulated! */
161 #define EXCEPTION_ADDRESS_ERROR 3 /* This one is partially emulated (doesn't stack a proper frame yet) */
162 #define EXCEPTION_ILLEGAL_INSTRUCTION 4
163 #define EXCEPTION_ZERO_DIVIDE 5
164 #define EXCEPTION_CHK 6
165 #define EXCEPTION_TRAPV 7
166 #define EXCEPTION_PRIVILEGE_VIOLATION 8
167 #define EXCEPTION_TRACE 9
168 #define EXCEPTION_1010 10
169 #define EXCEPTION_1111 11
170 #define EXCEPTION_FORMAT_ERROR 14
171 #define EXCEPTION_UNINITIALIZED_INTERRUPT 15
172 #define EXCEPTION_SPURIOUS_INTERRUPT 24
173 #define EXCEPTION_INTERRUPT_AUTOVECTOR 24
174 #define EXCEPTION_TRAP_BASE 32
175 #define EXCEPTION_MMU_CONFIGURATION 56 // only on 020/030
177 /* Function codes set by CPU during data/address bus activity */
178 #define FUNCTION_CODE_USER_DATA 1
179 #define FUNCTION_CODE_USER_PROGRAM 2
180 #define FUNCTION_CODE_SUPERVISOR_DATA 5
181 #define FUNCTION_CODE_SUPERVISOR_PROGRAM 6
182 #define FUNCTION_CODE_CPU_SPACE 7
184 /* CPU types for deciding what to emulate */
185 #define CPU_TYPE_000 (0x00000001)
186 #define CPU_TYPE_008 (0x00000002)
187 #define CPU_TYPE_010 (0x00000004)
188 #define CPU_TYPE_EC020 (0x00000008)
189 #define CPU_TYPE_020 (0x00000010)
190 #define CPU_TYPE_EC030 (0x00000020)
191 #define CPU_TYPE_030 (0x00000040)
192 #define CPU_TYPE_EC040 (0x00000080)
193 #define CPU_TYPE_LC040 (0x00000100)
194 #define CPU_TYPE_040 (0x00000200)
195 #define CPU_TYPE_SCC070 (0x00000400)
197 /* Different ways to stop the CPU */
198 #define STOP_LEVEL_STOP 1
199 #define STOP_LEVEL_HALT 2
201 /* Used for 68000 address error processing */
202 #define INSTRUCTION_YES 0
203 #define INSTRUCTION_NO 0x08
204 #define MODE_READ 0x10
207 #define RUN_MODE_NORMAL 0
208 #define RUN_MODE_BERR_AERR_RESET_WSF 1 // writing the stack frame
209 #define RUN_MODE_BERR_AERR_RESET 2 // stack frame done
211 #define M68K_CACR_IBE 0x10 // Instruction Burst Enable
212 #define M68K_CACR_CI 0x08 // Clear Instruction Cache
213 #define M68K_CACR_CEI 0x04 // Clear Entry in Instruction Cache
214 #define M68K_CACR_FI 0x02 // Freeze Instruction Cache
215 #define M68K_CACR_EI 0x01 // Enable Instruction Cache
218 #define NULL ((void*)0)
221 /* ======================================================================== */
222 /* ================================ MACROS ================================ */
223 /* ======================================================================== */
226 /* ---------------------------- General Macros ---------------------------- */
228 /* Bit Isolation Macros */
229 #define BIT_0(A) ((A) & 0x00000001)
230 #define BIT_1(A) ((A) & 0x00000002)
231 #define BIT_2(A) ((A) & 0x00000004)
232 #define BIT_3(A) ((A) & 0x00000008)
233 #define BIT_4(A) ((A) & 0x00000010)
234 #define BIT_5(A) ((A) & 0x00000020)
235 #define BIT_6(A) ((A) & 0x00000040)
236 #define BIT_7(A) ((A) & 0x00000080)
237 #define BIT_8(A) ((A) & 0x00000100)
238 #define BIT_9(A) ((A) & 0x00000200)
239 #define BIT_A(A) ((A) & 0x00000400)
240 #define BIT_B(A) ((A) & 0x00000800)
241 #define BIT_C(A) ((A) & 0x00001000)
242 #define BIT_D(A) ((A) & 0x00002000)
243 #define BIT_E(A) ((A) & 0x00004000)
244 #define BIT_F(A) ((A) & 0x00008000)
245 #define BIT_10(A) ((A) & 0x00010000)
246 #define BIT_11(A) ((A) & 0x00020000)
247 #define BIT_12(A) ((A) & 0x00040000)
248 #define BIT_13(A) ((A) & 0x00080000)
249 #define BIT_14(A) ((A) & 0x00100000)
250 #define BIT_15(A) ((A) & 0x00200000)
251 #define BIT_16(A) ((A) & 0x00400000)
252 #define BIT_17(A) ((A) & 0x00800000)
253 #define BIT_18(A) ((A) & 0x01000000)
254 #define BIT_19(A) ((A) & 0x02000000)
255 #define BIT_1A(A) ((A) & 0x04000000)
256 #define BIT_1B(A) ((A) & 0x08000000)
257 #define BIT_1C(A) ((A) & 0x10000000)
258 #define BIT_1D(A) ((A) & 0x20000000)
259 #define BIT_1E(A) ((A) & 0x40000000)
260 #define BIT_1F(A) ((A) & 0x80000000)
262 /* Get the most significant bit for specific sizes */
263 #define GET_MSB_8(A) ((A) & 0x80)
264 #define GET_MSB_9(A) ((A) & 0x100)
265 #define GET_MSB_16(A) ((A) & 0x8000)
266 #define GET_MSB_17(A) ((A) & 0x10000)
267 #define GET_MSB_32(A) ((A) & 0x80000000)
269 #define GET_MSB_33(A) ((A) & 0x100000000)
270 #endif /* M68K_USE_64_BIT */
272 /* Isolate nibbles */
273 #define LOW_NIBBLE(A) ((A) & 0x0f)
274 #define HIGH_NIBBLE(A) ((A) & 0xf0)
276 /* These are used to isolate 8, 16, and 32 bit sizes */
277 #define MASK_OUT_ABOVE_2(A) ((A) & 3)
278 #define MASK_OUT_ABOVE_8(A) ((A) & 0xff)
279 #define MASK_OUT_ABOVE_16(A) ((A) & 0xffff)
280 #define MASK_OUT_BELOW_2(A) ((A) & ~3)
281 #define MASK_OUT_BELOW_8(A) ((A) & ~0xff)
282 #define MASK_OUT_BELOW_16(A) ((A) & ~0xffff)
284 /* No need to mask if we are 32 bit */
285 #if M68K_INT_GT_32_BIT || M68K_USE_64_BIT
286 #define MASK_OUT_ABOVE_32(A) ((A) & 0xffffffff)
287 #define MASK_OUT_BELOW_32(A) ((A) & ~0xffffffff)
289 #define MASK_OUT_ABOVE_32(A) (A)
290 #define MASK_OUT_BELOW_32(A) 0
291 #endif /* M68K_INT_GT_32_BIT || M68K_USE_64_BIT */
293 /* Simulate address lines of 68k family */
294 #define ADDRESS_68K(A) ((A)&CPU_ADDRESS_MASK)
297 /* Shift & Rotate Macros. */
298 #define LSL(A, C) ((A) << (C))
299 #define LSR(A, C) ((A) >> (C))
301 /* Some > 32-bit optimizations */
302 #if M68K_INT_GT_32_BIT
303 /* Shift left and right */
304 #define LSR_32(A, C) ((A) >> (C))
305 #define LSL_32(A, C) ((A) << (C))
307 /* We have to do this because the morons at ANSI decided that shifts
308 * by >= data size are undefined.
310 #define LSR_32(A, C) ((C) < 32 ? (A) >> (C) : 0)
311 #define LSL_32(A, C) ((C) < 32 ? (A) << (C) : 0)
312 #endif /* M68K_INT_GT_32_BIT */
315 #define LSL_32_64(A, C) ((A) << (C))
316 #define LSR_32_64(A, C) ((A) >> (C))
317 #define ROL_33_64(A, C) (LSL_32_64(A, C) | LSR_32_64(A, 33-(C)))
318 #define ROR_33_64(A, C) (LSR_32_64(A, C) | LSL_32_64(A, 33-(C)))
319 #endif /* M68K_USE_64_BIT */
321 #define ROL_8(A, C) MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C)))
322 #define ROL_9(A, C) (LSL(A, C) | LSR(A, 9-(C)))
323 #define ROL_16(A, C) MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C)))
324 #define ROL_17(A, C) (LSL(A, C) | LSR(A, 17-(C)))
325 #define ROL_32(A, C) MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C)))
326 #define ROL_33(A, C) (LSL_32(A, C) | LSR_32(A, 33-(C)))
328 #define ROR_8(A, C) MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C)))
329 #define ROR_9(A, C) (LSR(A, C) | LSL(A, 9-(C)))
330 #define ROR_16(A, C) MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C)))
331 #define ROR_17(A, C) (LSR(A, C) | LSL(A, 17-(C)))
332 #define ROR_32(A, C) MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C)))
333 #define ROR_33(A, C) (LSR_32(A, C) | LSL_32(A, 33-(C)))
337 /* ------------------------------ CPU Access ------------------------------ */
339 /* Access the CPU registers */
340 #define CPU_TYPE m68ki_cpu.cpu_type
342 #define REG_DA m68ki_cpu.dar /* easy access to data and address regs */
343 #define REG_DA_SAVE m68ki_cpu.dar_save
344 #define REG_D m68ki_cpu.dar
345 #define REG_A (m68ki_cpu.dar+8)
346 #define REG_PPC m68ki_cpu.ppc
347 #define REG_PC m68ki_cpu.pc
348 #define REG_SP_BASE m68ki_cpu.sp
349 #define REG_USP m68ki_cpu.sp[0]
350 #define REG_ISP m68ki_cpu.sp[4]
351 #define REG_MSP m68ki_cpu.sp[6]
352 #define REG_SP m68ki_cpu.dar[15]
353 #define REG_VBR m68ki_cpu.vbr
354 #define REG_SFC m68ki_cpu.sfc
355 #define REG_DFC m68ki_cpu.dfc
356 #define REG_CACR m68ki_cpu.cacr
357 #define REG_CAAR m68ki_cpu.caar
358 #define REG_IR m68ki_cpu.ir
360 #define REG_FP m68ki_cpu.fpr
361 #define REG_FPCR m68ki_cpu.fpcr
362 #define REG_FPSR m68ki_cpu.fpsr
363 #define REG_FPIAR m68ki_cpu.fpiar
365 #define FLAG_T1 m68ki_cpu.t1_flag
366 #define FLAG_T0 m68ki_cpu.t0_flag
367 #define FLAG_S m68ki_cpu.s_flag
368 #define FLAG_M m68ki_cpu.m_flag
369 #define FLAG_X m68ki_cpu.x_flag
370 #define FLAG_N m68ki_cpu.n_flag
371 #define FLAG_Z m68ki_cpu.not_z_flag
372 #define FLAG_V m68ki_cpu.v_flag
373 #define FLAG_C m68ki_cpu.c_flag
374 #define FLAG_INT_MASK m68ki_cpu.int_mask
376 #define CPU_INT_LEVEL m68ki_cpu.int_level /* ASG: changed from CPU_INTS_PENDING */
377 #define CPU_STOPPED m68ki_cpu.stopped
378 #define CPU_PREF_ADDR m68ki_cpu.pref_addr
379 #define CPU_PREF_DATA m68ki_cpu.pref_data
380 #define CPU_ADDRESS_MASK m68ki_cpu.address_mask
381 #define CPU_SR_MASK m68ki_cpu.sr_mask
382 #define CPU_INSTR_MODE m68ki_cpu.instr_mode
383 #define CPU_RUN_MODE m68ki_cpu.run_mode
385 #define CYC_INSTRUCTION m68ki_cpu.cyc_instruction
386 #define CYC_EXCEPTION m68ki_cpu.cyc_exception
387 #define CYC_BCC_NOTAKE_B m68ki_cpu.cyc_bcc_notake_b
388 #define CYC_BCC_NOTAKE_W m68ki_cpu.cyc_bcc_notake_w
389 #define CYC_DBCC_F_NOEXP m68ki_cpu.cyc_dbcc_f_noexp
390 #define CYC_DBCC_F_EXP m68ki_cpu.cyc_dbcc_f_exp
391 #define CYC_SCC_R_TRUE m68ki_cpu.cyc_scc_r_true
392 #define CYC_MOVEM_W m68ki_cpu.cyc_movem_w
393 #define CYC_MOVEM_L m68ki_cpu.cyc_movem_l
394 #define CYC_SHIFT m68ki_cpu.cyc_shift
395 #define CYC_RESET m68ki_cpu.cyc_reset
396 #define HAS_PMMU m68ki_cpu.has_pmmu
397 #define HAS_FPU m68ki_cpu.has_fpu
398 #define PMMU_ENABLED m68ki_cpu.pmmu_enabled
399 #define RESET_CYCLES m68ki_cpu.reset_cycles
402 #define CALLBACK_INT_ACK m68ki_cpu.int_ack_callback
403 #define CALLBACK_BKPT_ACK m68ki_cpu.bkpt_ack_callback
404 #define CALLBACK_RESET_INSTR m68ki_cpu.reset_instr_callback
405 #define CALLBACK_CMPILD_INSTR m68ki_cpu.cmpild_instr_callback
406 #define CALLBACK_RTE_INSTR m68ki_cpu.rte_instr_callback
407 #define CALLBACK_TAS_INSTR m68ki_cpu.tas_instr_callback
408 #define CALLBACK_ILLG_INSTR m68ki_cpu.illg_instr_callback
409 #define CALLBACK_PC_CHANGED m68ki_cpu.pc_changed_callback
410 #define CALLBACK_SET_FC m68ki_cpu.set_fc_callback
411 #define CALLBACK_INSTR_HOOK m68ki_cpu.instr_hook_callback
415 /* ----------------------------- Configuration ---------------------------- */
417 /* These defines are dependant on the configuration defines in m68kconf.h */
419 /* Disable certain comparisons if we're not using all CPU types */
421 #define CPU_TYPE_IS_040_PLUS(A) ((A) & (CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_LC040))
422 #define CPU_TYPE_IS_040_LESS(A) 1
424 #define CPU_TYPE_IS_040_PLUS(A) 0
425 #define CPU_TYPE_IS_040_LESS(A) 1
429 #define CPU_TYPE_IS_030_PLUS(A) ((A) & (CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_LC040))
430 #define CPU_TYPE_IS_030_LESS(A) 1
432 #define CPU_TYPE_IS_030_PLUS(A) 0
433 #define CPU_TYPE_IS_030_LESS(A) 1
437 #define CPU_TYPE_IS_020_PLUS(A) ((A) & (CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_LC040))
438 #define CPU_TYPE_IS_020_LESS(A) 1
440 #define CPU_TYPE_IS_020_PLUS(A) 0
441 #define CPU_TYPE_IS_020_LESS(A) 1
444 #if M68K_EMULATE_EC020
445 #define CPU_TYPE_IS_EC020_PLUS(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_LC040))
446 #define CPU_TYPE_IS_EC020_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_010 | CPU_TYPE_EC020))
448 #define CPU_TYPE_IS_EC020_PLUS(A) CPU_TYPE_IS_020_PLUS(A)
449 #define CPU_TYPE_IS_EC020_LESS(A) CPU_TYPE_IS_020_LESS(A)
453 #define CPU_TYPE_IS_010(A) ((A) == CPU_TYPE_010)
454 #define CPU_TYPE_IS_010_PLUS(A) ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_LC040))
455 #define CPU_TYPE_IS_010_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010))
457 #define CPU_TYPE_IS_010(A) 0
458 #define CPU_TYPE_IS_010_PLUS(A) CPU_TYPE_IS_EC020_PLUS(A)
459 #define CPU_TYPE_IS_010_LESS(A) CPU_TYPE_IS_EC020_LESS(A)
462 #if M68K_EMULATE_020 || M68K_EMULATE_EC020
463 #define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020))
465 #define CPU_TYPE_IS_020_VARIANT(A) 0
468 #if M68K_EMULATE_040 || M68K_EMULATE_020 || M68K_EMULATE_EC020 || M68K_EMULATE_010
469 #define CPU_TYPE_IS_000(A) ((A) == CPU_TYPE_000)
471 #define CPU_TYPE_IS_000(A) 1
475 #if !M68K_SEPARATE_READS
476 #define m68k_read_immediate_16(A) m68ki_read_program_16(A)
477 #define m68k_read_immediate_32(A) m68ki_read_program_32(A)
479 #define m68k_read_pcrelative_8(A) m68ki_read_program_8(A)
480 #define m68k_read_pcrelative_16(A) m68ki_read_program_16(A)
481 #define m68k_read_pcrelative_32(A) m68ki_read_program_32(A)
482 #endif /* M68K_SEPARATE_READS */
485 /* Enable or disable callback functions */
486 #if M68K_EMULATE_INT_ACK
487 #if M68K_EMULATE_INT_ACK == OPT_SPECIFY_HANDLER
488 #define m68ki_int_ack(A) M68K_INT_ACK_CALLBACK(A)
490 #define m68ki_int_ack(A) CALLBACK_INT_ACK(A)
493 /* Default action is to used autovector mode, which is most common */
494 #define m68ki_int_ack(A) M68K_INT_ACK_AUTOVECTOR
495 #endif /* M68K_EMULATE_INT_ACK */
497 #if M68K_EMULATE_BKPT_ACK
498 #if M68K_EMULATE_BKPT_ACK == OPT_SPECIFY_HANDLER
499 #define m68ki_bkpt_ack(A) M68K_BKPT_ACK_CALLBACK(A)
501 #define m68ki_bkpt_ack(A) CALLBACK_BKPT_ACK(A)
504 #define m68ki_bkpt_ack(A)
505 #endif /* M68K_EMULATE_BKPT_ACK */
507 #if M68K_EMULATE_RESET
508 #if M68K_EMULATE_RESET == OPT_SPECIFY_HANDLER
509 #define m68ki_output_reset() M68K_RESET_CALLBACK()
511 #define m68ki_output_reset() CALLBACK_RESET_INSTR()
514 #define m68ki_output_reset()
515 #endif /* M68K_EMULATE_RESET */
517 #if M68K_CMPILD_HAS_CALLBACK
518 #if M68K_CMPILD_HAS_CALLBACK == OPT_SPECIFY_HANDLER
519 #define m68ki_cmpild_callback(v,r) M68K_CMPILD_CALLBACK(v,r)
521 #define m68ki_cmpild_callback(v,r) CALLBACK_CMPILD_INSTR(v,r)
524 #define m68ki_cmpild_callback(v,r)
525 #endif /* M68K_CMPILD_HAS_CALLBACK */
527 #if M68K_RTE_HAS_CALLBACK
528 #if M68K_RTE_HAS_CALLBACK == OPT_SPECIFY_HANDLER
529 #define m68ki_rte_callback() M68K_RTE_CALLBACK()
531 #define m68ki_rte_callback() CALLBACK_RTE_INSTR()
534 #define m68ki_rte_callback()
535 #endif /* M68K_RTE_HAS_CALLBACK */
537 #if M68K_TAS_HAS_CALLBACK
538 #if M68K_TAS_HAS_CALLBACK == OPT_SPECIFY_HANDLER
539 #define m68ki_tas_callback() M68K_TAS_CALLBACK()
541 #define m68ki_tas_callback() CALLBACK_TAS_INSTR()
544 #define m68ki_tas_callback() 1
545 #endif /* M68K_TAS_HAS_CALLBACK */
547 #if M68K_ILLG_HAS_CALLBACK
548 #if M68K_ILLG_HAS_CALLBACK == OPT_SPECIFY_HANDLER
549 #define m68ki_illg_callback(opcode) M68K_ILLG_CALLBACK(opcode)
551 #define m68ki_illg_callback(opcode) CALLBACK_ILLG_INSTR(opcode)
554 #define m68ki_illg_callback(opcode) 0 // Default is 0 = not handled, exception will occur
555 #endif /* M68K_ILLG_HAS_CALLBACK */
557 #if M68K_INSTRUCTION_HOOK
558 #if M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER
559 #define m68ki_instr_hook(pc) M68K_INSTRUCTION_CALLBACK(pc)
561 #define m68ki_instr_hook(pc) CALLBACK_INSTR_HOOK(pc)
564 #define m68ki_instr_hook(pc)
565 #endif /* M68K_INSTRUCTION_HOOK */
568 #if M68K_MONITOR_PC == OPT_SPECIFY_HANDLER
569 #define m68ki_pc_changed(A) M68K_SET_PC_CALLBACK(ADDRESS_68K(A))
571 #define m68ki_pc_changed(A) CALLBACK_PC_CHANGED(ADDRESS_68K(A))
574 #define m68ki_pc_changed(A)
575 #endif /* M68K_MONITOR_PC */
578 /* Enable or disable function code emulation */
580 #if M68K_EMULATE_FC == OPT_SPECIFY_HANDLER
581 #define m68ki_set_fc(A) M68K_SET_FC_CALLBACK(A)
583 #define m68ki_set_fc(A) CALLBACK_SET_FC(A)
585 #define m68ki_use_data_space() m68ki_address_space = FUNCTION_CODE_USER_DATA
586 #define m68ki_use_program_space() m68ki_address_space = FUNCTION_CODE_USER_PROGRAM
587 #define m68ki_get_address_space() m68ki_address_space
589 #define m68ki_set_fc(A)
590 #define m68ki_use_data_space()
591 #define m68ki_use_program_space()
592 #define m68ki_get_address_space() FUNCTION_CODE_USER_DATA
593 #endif /* M68K_EMULATE_FC */
596 /* Enable or disable trace emulation */
597 #if M68K_EMULATE_TRACE
598 /* Initiates trace checking before each instruction (t1) */
599 #define m68ki_trace_t1() m68ki_tracing = FLAG_T1
600 /* adds t0 to trace checking if we encounter change of flow */
601 #define m68ki_trace_t0() m68ki_tracing |= FLAG_T0
602 /* Clear all tracing */
603 #define m68ki_clear_trace() m68ki_tracing = 0
604 /* Cause a trace exception if we are tracing */
605 #define m68ki_exception_if_trace() if(m68ki_tracing) m68ki_exception_trace()
607 #define m68ki_trace_t1()
608 #define m68ki_trace_t0()
609 #define m68ki_clear_trace()
610 #define m68ki_exception_if_trace()
611 #endif /* M68K_EMULATE_TRACE */
616 #if M68K_EMULATE_ADDRESS_ERROR
619 /* sigjmp() on Mac OS X and *BSD in general saves signal contexts and is super-slow, use sigsetjmp() to tell it not to */
621 extern sigjmp_buf m68ki_aerr_trap;
622 #define m68ki_set_address_error_trap(m68k) \
623 if(sigsetjmp(m68ki_aerr_trap, 0) != 0) \
625 m68ki_exception_address_error(m68k); \
628 if (m68ki_remaining_cycles > 0) \
629 m68ki_remaining_cycles = 0; \
630 return m68ki_initial_cycles; \
634 #define m68ki_check_address_error(ADDR, WRITE_MODE, FC) \
637 m68ki_aerr_address = ADDR; \
638 m68ki_aerr_write_mode = WRITE_MODE; \
639 m68ki_aerr_fc = FC; \
640 siglongjmp(m68ki_aerr_trap, 1); \
643 extern jmp_buf m68ki_aerr_trap;
644 #define m68ki_set_address_error_trap() \
645 if(setjmp(m68ki_aerr_trap) != 0) \
647 m68ki_exception_address_error(); \
651 return m68ki_initial_cycles; \
653 /* ensure we don't re-enter execution loop after an
654 address error if there's no more cycles remaining */ \
655 if(GET_CYCLES() <= 0) \
657 /* return how many clocks we used */ \
658 return m68ki_initial_cycles - GET_CYCLES(); \
662 #define m68ki_check_address_error(ADDR, WRITE_MODE, FC) \
665 m68ki_aerr_address = ADDR; \
666 m68ki_aerr_write_mode = WRITE_MODE; \
667 m68ki_aerr_fc = FC; \
668 longjmp(m68ki_aerr_trap, 1); \
671 #define m68ki_bus_error(ADDR,WRITE_MODE) m68ki_aerr_address=ADDR;m68ki_aerr_write_mode=WRITE_MODE;m68ki_exception_bus_error()
673 #define m68ki_check_address_error_010_less(ADDR, WRITE_MODE, FC) \
674 if (CPU_TYPE_IS_010_LESS(CPU_TYPE)) \
676 m68ki_check_address_error(ADDR, WRITE_MODE, FC) \
679 #define m68ki_set_address_error_trap()
680 #define m68ki_check_address_error(ADDR, WRITE_MODE, FC)
681 #define m68ki_check_address_error_010_less(ADDR, WRITE_MODE, FC)
682 #endif /* M68K_ADDRESS_ERROR */
687 // extern FILE* M68K_LOG_FILEHANDLE;
688 extern const char *const m68ki_cpu_names[];
690 #define M68K_DO_LOG(A) do{printf("*************");printf A;}while(0) //if(M68K_LOG_FILEHANDLE) fprintf A
691 #if M68K_LOG_1010_1111
692 #define M68K_DO_LOG_EMU(A) printf A //if(M68K_LOG_FILEHANDLE) fprintf A
694 #define M68K_DO_LOG_EMU(A)
697 #define M68K_DO_LOG(A)
698 #define M68K_DO_LOG_EMU(A)
703 /* -------------------------- EA / Operand Access ------------------------- */
706 * The general instruction format follows this pattern:
707 * .... XXX. .... .YYY
708 * where XXX is register X and YYY is register Y
710 /* Data Register Isolation */
711 #define DX (REG_D[(REG_IR >> 9) & 7])
712 #define DY (REG_D[REG_IR & 7])
713 /* Address Register Isolation */
714 #define AX (REG_A[(REG_IR >> 9) & 7])
715 #define AY (REG_A[REG_IR & 7])
718 /* Effective Address Calculations */
719 #define EA_AY_AI_8() AY /* address register indirect */
720 #define EA_AY_AI_16() EA_AY_AI_8()
721 #define EA_AY_AI_32() EA_AY_AI_8()
722 #define EA_AY_PI_8() (AY++) /* postincrement (size = byte) */
723 #define EA_AY_PI_16() ((AY+=2)-2) /* postincrement (size = word) */
724 #define EA_AY_PI_32() ((AY+=4)-4) /* postincrement (size = long) */
725 #define EA_AY_PD_8() (--AY) /* predecrement (size = byte) */
726 #define EA_AY_PD_16() (AY-=2) /* predecrement (size = word) */
727 #define EA_AY_PD_32() (AY-=4) /* predecrement (size = long) */
728 #define EA_AY_DI_8() (AY+MAKE_INT_16(m68ki_read_imm_16())) /* displacement */
729 #define EA_AY_DI_16() EA_AY_DI_8()
730 #define EA_AY_DI_32() EA_AY_DI_8()
731 #define EA_AY_IX_8() m68ki_get_ea_ix(AY) /* indirect + index */
732 #define EA_AY_IX_16() EA_AY_IX_8()
733 #define EA_AY_IX_32() EA_AY_IX_8()
735 #define EA_AX_AI_8() AX
736 #define EA_AX_AI_16() EA_AX_AI_8()
737 #define EA_AX_AI_32() EA_AX_AI_8()
738 #define EA_AX_PI_8() (AX++)
739 #define EA_AX_PI_16() ((AX+=2)-2)
740 #define EA_AX_PI_32() ((AX+=4)-4)
741 #define EA_AX_PD_8() (--AX)
742 #define EA_AX_PD_16() (AX-=2)
743 #define EA_AX_PD_32() (AX-=4)
744 #define EA_AX_DI_8() (AX+MAKE_INT_16(m68ki_read_imm_16()))
745 #define EA_AX_DI_16() EA_AX_DI_8()
746 #define EA_AX_DI_32() EA_AX_DI_8()
747 #define EA_AX_IX_8() m68ki_get_ea_ix(AX)
748 #define EA_AX_IX_16() EA_AX_IX_8()
749 #define EA_AX_IX_32() EA_AX_IX_8()
751 #define EA_A7_PI_8() ((REG_A[7]+=2)-2)
752 #define EA_A7_PD_8() (REG_A[7]-=2)
754 #define EA_AW_8() MAKE_INT_16(m68ki_read_imm_16()) /* absolute word */
755 #define EA_AW_16() EA_AW_8()
756 #define EA_AW_32() EA_AW_8()
757 #define EA_AL_8() m68ki_read_imm_32() /* absolute long */
758 #define EA_AL_16() EA_AL_8()
759 #define EA_AL_32() EA_AL_8()
760 #define EA_PCDI_8() m68ki_get_ea_pcdi() /* pc indirect + displacement */
761 #define EA_PCDI_16() EA_PCDI_8()
762 #define EA_PCDI_32() EA_PCDI_8()
763 #define EA_PCIX_8() m68ki_get_ea_pcix() /* pc indirect + index */
764 #define EA_PCIX_16() EA_PCIX_8()
765 #define EA_PCIX_32() EA_PCIX_8()
768 #define OPER_I_8() m68ki_read_imm_8()
769 #define OPER_I_16() m68ki_read_imm_16()
770 #define OPER_I_32() m68ki_read_imm_32()
774 /* --------------------------- Status Register ---------------------------- */
776 /* Flag Calculation Macros */
777 #define CFLAG_8(A) (A)
778 #define CFLAG_16(A) ((A)>>8)
780 #if M68K_INT_GT_32_BIT
781 #define CFLAG_ADD_32(S, D, R) ((R)>>24)
782 #define CFLAG_SUB_32(S, D, R) ((R)>>24)
784 #define CFLAG_ADD_32(S, D, R) (((S & D) | (~R & (S | D)))>>23)
785 #define CFLAG_SUB_32(S, D, R) (((S & R) | (~D & (S | R)))>>23)
786 #endif /* M68K_INT_GT_32_BIT */
788 #define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R))
789 #define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8)
790 #define VFLAG_ADD_32(S, D, R) (((S^R) & (D^R))>>24)
792 #define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D))
793 #define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8)
794 #define VFLAG_SUB_32(S, D, R) (((S^D) & (R^D))>>24)
796 #define NFLAG_8(A) (A)
797 #define NFLAG_16(A) ((A)>>8)
798 #define NFLAG_32(A) ((A)>>24)
799 #define NFLAG_64(A) ((A)>>56)
801 #define ZFLAG_8(A) MASK_OUT_ABOVE_8(A)
802 #define ZFLAG_16(A) MASK_OUT_ABOVE_16(A)
803 #define ZFLAG_32(A) MASK_OUT_ABOVE_32(A)
807 #define NFLAG_SET 0x80
808 #define NFLAG_CLEAR 0
809 #define CFLAG_SET 0x100
810 #define CFLAG_CLEAR 0
811 #define XFLAG_SET 0x100
812 #define XFLAG_CLEAR 0
813 #define VFLAG_SET 0x80
814 #define VFLAG_CLEAR 0
816 #define ZFLAG_CLEAR 0xffffffff
819 #define SFLAG_CLEAR 0
821 #define MFLAG_CLEAR 0
823 /* Turn flag values into 1 or 0 */
824 #define XFLAG_AS_1() ((FLAG_X>>8)&1)
825 #define NFLAG_AS_1() ((FLAG_N>>7)&1)
826 #define VFLAG_AS_1() ((FLAG_V>>7)&1)
827 #define ZFLAG_AS_1() (!FLAG_Z)
828 #define CFLAG_AS_1() ((FLAG_C>>8)&1)
832 #define COND_CS() (FLAG_C&0x100)
833 #define COND_CC() (!COND_CS())
834 #define COND_VS() (FLAG_V&0x80)
835 #define COND_VC() (!COND_VS())
836 #define COND_NE() FLAG_Z
837 #define COND_EQ() (!COND_NE())
838 #define COND_MI() (FLAG_N&0x80)
839 #define COND_PL() (!COND_MI())
840 #define COND_LT() ((FLAG_N^FLAG_V)&0x80)
841 #define COND_GE() (!COND_LT())
842 #define COND_HI() (COND_CC() && COND_NE())
843 #define COND_LS() (COND_CS() || COND_EQ())
844 #define COND_GT() (COND_GE() && COND_NE())
845 #define COND_LE() (COND_LT() || COND_EQ())
847 /* Reversed conditions */
848 #define COND_NOT_CS() COND_CC()
849 #define COND_NOT_CC() COND_CS()
850 #define COND_NOT_VS() COND_VC()
851 #define COND_NOT_VC() COND_VS()
852 #define COND_NOT_NE() COND_EQ()
853 #define COND_NOT_EQ() COND_NE()
854 #define COND_NOT_MI() COND_PL()
855 #define COND_NOT_PL() COND_MI()
856 #define COND_NOT_LT() COND_GE()
857 #define COND_NOT_GE() COND_LT()
858 #define COND_NOT_HI() COND_LS()
859 #define COND_NOT_LS() COND_HI()
860 #define COND_NOT_GT() COND_LE()
861 #define COND_NOT_LE() COND_GT()
863 /* Not real conditions, but here for convenience */
864 #define COND_XS() (FLAG_X&0x100)
865 #define COND_XC() (!COND_XS)
868 /* Get the condition code register */
869 #define m68ki_get_ccr() ((COND_XS() >> 4) | \
875 /* Get the status register */
876 #define m68ki_get_sr() ( FLAG_T1 | \
885 /* ---------------------------- Cycle Counting ---------------------------- */
887 #define ADD_CYCLES(A) m68ki_remaining_cycles += (A)
888 #define USE_CYCLES(A) m68ki_remaining_cycles -= (A)
889 #define SET_CYCLES(A) m68ki_remaining_cycles = A
890 #define GET_CYCLES() m68ki_remaining_cycles
891 #define USE_ALL_CYCLES() m68ki_remaining_cycles %= CYC_INSTRUCTION[REG_IR]
895 /* ----------------------------- Read / Write ----------------------------- */
897 /* Read from the current address space */
898 #define m68ki_read_8(A) m68ki_read_8_fc (A, FLAG_S | m68ki_get_address_space())
899 #define m68ki_read_16(A) m68ki_read_16_fc(A, FLAG_S | m68ki_get_address_space())
900 #define m68ki_read_32(A) m68ki_read_32_fc(A, FLAG_S | m68ki_get_address_space())
902 /* Write to the current data space */
903 #define m68ki_write_8(A, V) m68ki_write_8_fc (A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
904 #define m68ki_write_16(A, V) m68ki_write_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
905 #define m68ki_write_32(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
907 #if M68K_SIMULATE_PD_WRITES
908 #define m68ki_write_32_pd(A, V) m68ki_write_32_pd_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
910 #define m68ki_write_32_pd(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
913 /* Map PC-relative reads */
914 #define m68ki_read_pcrel_8(A) m68k_read_pcrelative_8(A)
915 #define m68ki_read_pcrel_16(A) m68k_read_pcrelative_16(A)
916 #define m68ki_read_pcrel_32(A) m68k_read_pcrelative_32(A)
918 /* Read from the program space */
919 #define m68ki_read_program_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
920 #define m68ki_read_program_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
921 #define m68ki_read_program_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
923 /* Read from the data space */
924 #define m68ki_read_data_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
925 #define m68ki_read_data_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
926 #define m68ki_read_data_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
930 /* ======================================================================== */
931 /* =============================== PROTOTYPES ============================= */
932 /* ======================================================================== */
942 uint cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */
943 uint dar[16]; /* Data and Address Registers */
944 uint dar_save[16]; /* Saved Data and Address Registers (pushed onto the
945 stack when a bus error occurs)*/
946 uint ppc; /* Previous program counter */
947 uint pc; /* Program Counter */
948 uint sp[7]; /* User, Interrupt, and Master Stack Pointers */
949 uint vbr; /* Vector Base Register (m68010+) */
950 uint sfc; /* Source Function Code Register (m68010+) */
951 uint dfc; /* Destination Function Code Register (m68010+) */
952 uint cacr; /* Cache Control Register (m68020, unemulated) */
953 uint caar; /* Cache Address Register (m68020, unemulated) */
954 uint ir; /* Instruction Register */
955 floatx80 fpr[8]; /* FPU Data Register (m68030/040) */
956 uint fpiar; /* FPU Instruction Address Register (m68040) */
957 uint fpsr; /* FPU Status Register (m68040) */
958 uint fpcr; /* FPU Control Register (m68040) */
959 uint t1_flag; /* Trace 1 */
960 uint t0_flag; /* Trace 0 */
961 uint s_flag; /* Supervisor */
962 uint m_flag; /* Master/Interrupt state */
963 uint x_flag; /* Extend */
964 uint n_flag; /* Negative */
965 uint not_z_flag; /* Zero, inverted for speedups */
966 uint v_flag; /* Overflow */
967 uint c_flag; /* Carry */
968 uint int_mask; /* I0-I2 */
969 uint int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
970 uint stopped; /* Stopped state */
971 uint pref_addr; /* Last prefetch address */
972 uint pref_data; /* Data in the prefetch queue */
973 uint address_mask; /* Available address pins */
974 uint sr_mask; /* Implemented status register bits */
975 uint instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
976 uint run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
977 int has_pmmu; /* Indicates if a PMMU available (yes on 030, 040, no on EC030) */
978 int has_fpu; /* Indicates if a FPU available */
979 int pmmu_enabled; /* Indicates if the PMMU is enabled */
980 int fpu_just_reset; /* Indicates the FPU was just reset */
983 /* Clocks required for instructions / exceptions */
984 uint cyc_bcc_notake_b;
985 uint cyc_bcc_notake_w;
986 uint cyc_dbcc_f_noexp;
994 /* Virtual IRQ lines state */
999 uint mmu_crp_aptr, mmu_crp_limit;
1000 uint mmu_srp_aptr, mmu_srp_limit;
1004 uint mmu_urp_aptr; /* 040 only */
1006 uint mmu_atc_tag[MMU_ATC_ENTRIES], mmu_atc_data[MMU_ATC_ENTRIES];
1008 uint mmu_tt0, mmu_tt1;
1009 uint mmu_itt0, mmu_itt1, mmu_dtt0, mmu_dtt1;
1010 uint mmu_acr0, mmu_acr1, mmu_acr2, mmu_acr3;
1011 uint mmu_last_page_entry, mmu_last_page_entry_addr;
1013 uint16 mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */
1014 uint16 mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */
1015 uint16 mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */
1016 uint8 mmu_tmp_sz; /* temporary hack: size for mmu */
1018 uint mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */
1019 uint16 mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */
1020 uint16 mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */
1021 uint16 mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */
1022 uint16 mmu_tmp_buserror_sz; /* temporary hack: (first) bus error size` */
1024 uint8 mmu_tablewalk; /* set when MMU walks page tables */
1025 uint mmu_last_logical_addr;
1026 uint ic_address[M68K_IC_SIZE]; /* instruction cache address data */
1027 uint ic_data[M68K_IC_SIZE]; /* instruction cache content data */
1028 uint8 ic_valid[M68K_IC_SIZE]; /* instruction cache valid flags */
1030 const uint8* cyc_instruction;
1031 const uint8* cyc_exception;
1033 /* Callbacks to host */
1034 int (*int_ack_callback)(int int_line); /* Interrupt Acknowledge */
1035 void (*bkpt_ack_callback)(unsigned int data); /* Breakpoint Acknowledge */
1036 void (*reset_instr_callback)(void); /* Called when a RESET instruction is encountered */
1037 void (*cmpild_instr_callback)(unsigned int, int); /* Called when a CMPI.L #v, Dn instruction is encountered */
1038 void (*rte_instr_callback)(void); /* Called when a RTE instruction is encountered */
1039 int (*tas_instr_callback)(void); /* Called when a TAS instruction is encountered, allows / disallows writeback */
1040 int (*illg_instr_callback)(int); /* Called when an illegal instruction is encountered, allows handling */
1041 void (*pc_changed_callback)(unsigned int new_pc); /* Called when the PC changes by a large amount */
1042 void (*set_fc_callback)(unsigned int new_fc); /* Called when the CPU function code changes */
1043 void (*instr_hook_callback)(unsigned int pc); /* Called every instruction cycle prior to execution */
1048 extern m68ki_cpu_core m68ki_cpu;
1049 extern sint m68ki_remaining_cycles;
1050 extern uint m68ki_tracing;
1051 extern const uint8 m68ki_shift_8_table[];
1052 extern const uint16 m68ki_shift_16_table[];
1053 extern const uint m68ki_shift_32_table[];
1054 extern const uint8 m68ki_exception_cycle_table[][256];
1055 extern uint m68ki_address_space;
1056 extern const uint8 m68ki_ea_idx_cycle_table[];
1058 extern uint m68ki_aerr_address;
1059 extern uint m68ki_aerr_write_mode;
1060 extern uint m68ki_aerr_fc;
1062 /* Forward declarations to keep some of the macros happy */
1063 static inline uint m68ki_read_16_fc (uint address, uint fc);
1064 static inline uint m68ki_read_32_fc (uint address, uint fc);
1065 static inline uint m68ki_get_ea_ix(uint An);
1066 static inline void m68ki_check_interrupts(void); /* ASG: check for interrupts */
1068 /* quick disassembly (used for logging) */
1069 char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type);
1072 /* ======================================================================== */
1073 /* =========================== UTILITY FUNCTIONS ========================== */
1074 /* ======================================================================== */
1077 /* ---------------------------- Read Immediate ---------------------------- */
1079 extern unsigned char read_ranges;
1080 extern unsigned int read_addr[8];
1081 extern unsigned int read_upper[8];
1082 extern unsigned char *read_data[8];
1083 extern unsigned char write_ranges;
1084 extern unsigned int write_addr[8];
1085 extern unsigned int write_upper[8];
1086 extern unsigned char *write_data[8];
1088 // clear the instruction cache
1089 inline void m68ki_ic_clear()
1092 for (i=0; i< M68K_IC_SIZE; i++) {
1093 m68ki_cpu.ic_address[i] = ~0;
1097 extern uint32 pmmu_translate_addr(uint32 addr_in, const uint16 rw);
1099 // read immediate word using the instruction cache
1101 static inline uint32 m68ki_ic_readimm16(uint32 address)
1103 if (m68ki_cpu.cacr & M68K_CACR_EI)
1105 // 68020 series I-cache (MC68020 User's Manual, Section 4 - On-Chip Cache Memory)
1106 if (CPU_TYPE & (CPU_TYPE_EC020 | CPU_TYPE_020))
1108 uint32 tag = (address >> 8) | (m68ki_cpu.s_flag ? 0x1000000 : 0);
1109 int idx = (address >> 2) & 0x3f; // 1-of-64 select
1111 // do a cache fill if the line is invalid or the tags don't match
1112 if ((!m68ki_cpu.ic_valid[idx]) || (m68ki_cpu.ic_address[idx] != tag))
1114 // if the cache is frozen, don't update it
1115 if (m68ki_cpu.cacr & M68K_CACR_FI)
1117 return m68k_read_immediate_16(address);
1120 uint32 data = m68ki_read_32(address & ~3);
1122 //printf("m68k: doing cache fill at %08x (tag %08x idx %d)\n", address, tag, idx);
1124 // if no buserror occurred, validate the tag
1125 if (!m68ki_cpu.mmu_tmp_buserror_occurred)
1127 m68ki_cpu.ic_address[idx] = tag;
1128 m68ki_cpu.ic_data[idx] = data;
1129 m68ki_cpu.ic_valid[idx] = 1;
1133 return m68k_read_immediate_16(address);
1137 // at this point, the cache is guaranteed to be valid, either as
1138 // a hit or because we just filled it.
1141 return m68ki_cpu.ic_data[idx] & 0xffff;
1145 return m68ki_cpu.ic_data[idx] >> 16;
1149 return m68k_read_immediate_16(address);
1152 /* Handles all immediate reads, does address error check, function code setting,
1153 * and prefetching if they are enabled in m68kconf.h
1155 static inline uint m68ki_read_imm_16(void)
1157 uint32_t address = ADDRESS_68K(REG_PC);
1158 for (int i = 0; i < read_ranges; i++) {
1159 if(address >= read_addr[i] && address < read_upper[i]) {
1161 return be16toh(((unsigned short *)(read_data[i] + (address - read_addr[i])))[0]);
1165 m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1166 m68ki_cpu.mmu_tmp_fc = FLAG_S | FUNCTION_CODE_USER_PROGRAM;
1167 m68ki_cpu.mmu_tmp_rw = 1;
1168 m68ki_cpu.mmu_tmp_sz = M68K_SZ_WORD;
1169 m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1171 #if M68K_EMULATE_PREFETCH
1174 if(REG_PC != CPU_PREF_ADDR)
1176 CPU_PREF_DATA = m68ki_ic_readimm16(REG_PC);
1177 CPU_PREF_ADDR = m68ki_cpu.mmu_tmp_buserror_occurred ? ((uint32)~0) : REG_PC;
1179 result = MASK_OUT_ABOVE_16(CPU_PREF_DATA);
1181 if (!m68ki_cpu.mmu_tmp_buserror_occurred) {
1182 // prefetch only if no bus error occurred in opcode fetch
1183 CPU_PREF_DATA = m68ki_ic_readimm16(REG_PC);
1184 CPU_PREF_ADDR = m68ki_cpu.mmu_tmp_buserror_occurred ? ((uint32)~0) : REG_PC;
1185 // ignore bus error on prefetch
1186 m68ki_cpu.mmu_tmp_buserror_occurred = 0;
1192 uint32_t address = ADDRESS_68K(REG_PC);
1195 for (int i = 0; i < read_ranges; i++) {
1196 if(address >= read_addr[i] && address < read_upper[i]) {
1197 return be16toh(((unsigned short *)(read_data[i] + (address - read_addr[i])))[0]);
1201 return m68k_read_immediate_16(address);
1202 #endif /* M68K_EMULATE_PREFETCH */
1205 static inline uint m68ki_read_imm_8(void)
1207 /* map read immediate 8 to read immediate 16 */
1208 return MASK_OUT_ABOVE_8(m68ki_read_imm_16());
1211 static inline uint m68ki_read_imm_32(void)
1213 #if M68K_SEPARATE_READS
1214 #if M68K_EMULATE_PMMU
1215 // if (PMMU_ENABLED)
1216 // address = pmmu_translate_addr(address,1);
1219 uint32_t address = ADDRESS_68K(REG_PC);
1220 for (int i = 0; i < read_ranges; i++) {
1221 if(address >= read_addr[i] && address < read_upper[i]) {
1223 return be32toh(((unsigned int *)(read_data[i] + (address - read_addr[i])))[0]);
1227 #if M68K_EMULATE_PREFETCH
1230 m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1231 m68ki_cpu.mmu_tmp_fc = FLAG_S | FUNCTION_CODE_USER_PROGRAM;
1232 m68ki_cpu.mmu_tmp_rw = 1;
1233 m68ki_cpu.mmu_tmp_sz = M68K_SZ_LONG;
1234 m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1236 if(REG_PC != CPU_PREF_ADDR)
1238 CPU_PREF_ADDR = REG_PC;
1239 CPU_PREF_DATA = m68ki_ic_readimm16(ADDRESS_68K(CPU_PREF_ADDR));
1241 temp_val = MASK_OUT_ABOVE_16(CPU_PREF_DATA);
1243 CPU_PREF_ADDR = REG_PC;
1244 CPU_PREF_DATA = m68ki_ic_readimm16(ADDRESS_68K(CPU_PREF_ADDR));
1246 temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | MASK_OUT_ABOVE_16(CPU_PREF_DATA));
1248 CPU_PREF_DATA = m68ki_ic_readimm16(REG_PC);
1249 CPU_PREF_ADDR = m68ki_cpu.mmu_tmp_buserror_occurred ? ((uint32)~0) : REG_PC;
1253 m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1254 m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1255 uint32_t address = ADDRESS_68K(REG_PC);
1257 for (int i = 0; i < read_ranges; i++) {
1258 if(address >= read_addr[i] && address < read_upper[i]) {
1259 return be32toh(((unsigned int *)(read_data[i] + (address - read_addr[i])))[0]);
1263 return m68k_read_immediate_32(address);
1264 #endif /* M68K_EMULATE_PREFETCH */
1267 /* ------------------------- Top level read/write ------------------------- */
1269 /* Handles all memory accesses (except for immediate reads if they are
1270 * configured to use separate functions in m68kconf.h).
1271 * All memory accesses must go through these top level functions.
1272 * These functions will also check for address error and set the function
1273 * code if they are enabled in m68kconf.h.
1276 static inline uint m68ki_read_8_fc(uint address, uint fc)
1279 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1280 m68ki_cpu.mmu_tmp_fc = fc;
1281 m68ki_cpu.mmu_tmp_rw = 1;
1282 m68ki_cpu.mmu_tmp_sz = M68K_SZ_BYTE;
1284 #if M68K_EMULATE_PMMU
1286 address = pmmu_translate_addr(address,1);
1289 for (int i = 0; i < read_ranges; i++) {
1290 if(address >= read_addr[i] && address < read_upper[i]) {
1291 return read_data[i][address - read_addr[i]];
1295 return m68k_read_memory_8(ADDRESS_68K(address));
1297 static inline uint m68ki_read_16_fc(uint address, uint fc)
1299 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1300 m68ki_cpu.mmu_tmp_fc = fc;
1301 m68ki_cpu.mmu_tmp_rw = 1;
1302 m68ki_cpu.mmu_tmp_sz = M68K_SZ_WORD;
1303 m68ki_check_address_error_010_less(address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
1305 #if M68K_EMULATE_PMMU
1307 address = pmmu_translate_addr(address,1);
1310 for (int i = 0; i < read_ranges; i++) {
1311 if(address >= read_addr[i] && address < read_upper[i]) {
1312 return be16toh(((unsigned short *)(read_data[i] + (address - read_addr[i])))[0]);
1316 return m68k_read_memory_16(ADDRESS_68K(address));
1318 static inline uint m68ki_read_32_fc(uint address, uint fc)
1320 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1321 m68ki_cpu.mmu_tmp_fc = fc;
1322 m68ki_cpu.mmu_tmp_rw = 1;
1323 m68ki_cpu.mmu_tmp_sz = M68K_SZ_LONG;
1324 m68ki_check_address_error_010_less(address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
1326 #if M68K_EMULATE_PMMU
1328 address = pmmu_translate_addr(address,1);
1331 for (int i = 0; i < read_ranges; i++) {
1332 if(address >= read_addr[i] && address < read_upper[i]) {
1333 return be32toh(((unsigned int *)(read_data[i] + (address - read_addr[i])))[0]);
1337 return m68k_read_memory_32(ADDRESS_68K(address));
1340 static inline void m68ki_write_8_fc(uint address, uint fc, uint value)
1342 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1343 m68ki_cpu.mmu_tmp_fc = fc;
1344 m68ki_cpu.mmu_tmp_rw = 0;
1345 m68ki_cpu.mmu_tmp_sz = M68K_SZ_BYTE;
1347 #if M68K_EMULATE_PMMU
1349 address = pmmu_translate_addr(address,0);
1352 for (int i = 0; i < write_ranges; i++) {
1353 if(address >= write_addr[i] && address < write_upper[i]) {
1354 write_data[i][address - write_addr[i]] = (unsigned char)value;
1359 m68k_write_memory_8(ADDRESS_68K(address), value);
1361 static inline void m68ki_write_16_fc(uint address, uint fc, uint value)
1363 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1364 m68ki_cpu.mmu_tmp_fc = fc;
1365 m68ki_cpu.mmu_tmp_rw = 0;
1366 m68ki_cpu.mmu_tmp_sz = M68K_SZ_WORD;
1367 m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1369 #if M68K_EMULATE_PMMU
1371 address = pmmu_translate_addr(address,0);
1374 for (int i = 0; i < write_ranges; i++) {
1375 if(address >= write_addr[i] && address < write_upper[i]) {
1376 ((short *)(write_data[i] + (address - write_addr[i])))[0] = htobe16(value);
1381 m68k_write_memory_16(ADDRESS_68K(address), value);
1383 static inline void m68ki_write_32_fc(uint address, uint fc, uint value)
1385 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1386 m68ki_cpu.mmu_tmp_fc = fc;
1387 m68ki_cpu.mmu_tmp_rw = 0;
1388 m68ki_cpu.mmu_tmp_sz = M68K_SZ_LONG;
1389 m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1391 #if M68K_EMULATE_PMMU
1393 address = pmmu_translate_addr(address,0);
1396 for (int i = 0; i < write_ranges; i++) {
1397 if(address >= write_addr[i] && address < write_upper[i]) {
1398 ((int *)(write_data[i] + (address - write_addr[i])))[0] = htobe32(value);
1403 m68k_write_memory_32(ADDRESS_68K(address), value);
1406 #if M68K_SIMULATE_PD_WRITES
1407 /* Special call to simulate undocumented 68k behavior when move.l with a
1408 * predecrement destination mode is executed.
1409 * A real 68k first writes the high word to [address+2], and then writes the
1410 * low word to [address].
1412 static inline void m68ki_write_32_pd_fc(uint address, uint fc, uint value)
1414 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1415 m68ki_cpu.mmu_tmp_fc = fc;
1416 m68ki_cpu.mmu_tmp_rw = 0;
1417 m68ki_cpu.mmu_tmp_sz = M68K_SZ_LONG;
1418 m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1420 #if M68K_EMULATE_PMMU
1422 address = pmmu_translate_addr(address,0);
1425 m68k_write_memory_32_pd(ADDRESS_68K(address), value);
1429 /* --------------------- Effective Address Calculation -------------------- */
1431 /* The program counter relative addressing modes cause operands to be
1432 * retrieved from program space, not data space.
1434 static inline uint m68ki_get_ea_pcdi(void)
1436 uint old_pc = REG_PC;
1437 m68ki_use_program_space(); /* auto-disable */
1438 return old_pc + MAKE_INT_16(m68ki_read_imm_16());
1442 static inline uint m68ki_get_ea_pcix(void)
1444 m68ki_use_program_space(); /* auto-disable */
1445 return m68ki_get_ea_ix(REG_PC);
1448 /* Indexed addressing modes are encoded as follows:
1450 * Base instruction format:
1451 * F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0
1452 * x x x x x x x x x x | 1 1 0 | BASE REGISTER (An)
1454 * Base instruction format for destination EA in move instructions:
1455 * F E D C | B A 9 | 8 7 6 | 5 4 3 2 1 0
1456 * x x x x | BASE REG | 1 1 0 | X X X X X X (An)
1458 * Brief extension format:
1459 * F | E D C | B | A 9 | 8 | 7 6 5 4 3 2 1 0
1460 * D/A | REGISTER | W/L | SCALE | 0 | DISPLACEMENT
1462 * Full extension format:
1463 * F E D C B A 9 8 7 6 5 4 3 2 1 0
1464 * D/A | REGISTER | W/L | SCALE | 1 | BS | IS | BD SIZE | 0 | I/IS
1465 * BASE DISPLACEMENT (0, 16, 32 bit) (bd)
1466 * OUTER DISPLACEMENT (0, 16, 32 bit) (od)
1468 * D/A: 0 = Dn, 1 = An (Xn)
1469 * W/L: 0 = W (sign extend), 1 = L (.SIZE)
1470 * SCALE: 00=1, 01=2, 10=4, 11=8 (*SCALE)
1471 * BS: 0=add base reg, 1=suppress base reg (An suppressed)
1472 * IS: 0=add index, 1=suppress index (Xn suppressed)
1473 * BD SIZE: 00=reserved, 01=NULL, 10=Word, 11=Long (size of bd)
1476 * 0 000 No Memory Indirect
1477 * 0 001 indir prex with null outer
1478 * 0 010 indir prex with word outer
1479 * 0 011 indir prex with long outer
1481 * 0 101 indir postx with null outer
1482 * 0 110 indir postx with word outer
1483 * 0 111 indir postx with long outer
1484 * 1 000 no memory indirect
1485 * 1 001 mem indir with null outer
1486 * 1 010 mem indir with word outer
1487 * 1 011 mem indir with long outer
1488 * 1 100-111 reserved
1490 static inline uint m68ki_get_ea_ix(uint An)
1492 /* An = base register */
1493 uint extension = m68ki_read_imm_16();
1494 uint Xn = 0; /* Index register */
1495 uint bd = 0; /* Base Displacement */
1496 uint od = 0; /* Outer Displacement */
1498 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
1500 /* Calculate index */
1501 Xn = REG_DA[extension>>12]; /* Xn */
1502 if(!BIT_B(extension)) /* W/L */
1503 Xn = MAKE_INT_16(Xn);
1505 /* Add base register and displacement and return */
1506 return An + Xn + MAKE_INT_8(extension);
1509 /* Brief extension format */
1510 if(!BIT_8(extension))
1512 /* Calculate index */
1513 Xn = REG_DA[extension>>12]; /* Xn */
1514 if(!BIT_B(extension)) /* W/L */
1515 Xn = MAKE_INT_16(Xn);
1516 /* Add scale if proper CPU type */
1517 if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
1518 Xn <<= (extension>>9) & 3; /* SCALE */
1520 /* Add base register and displacement and return */
1521 return An + Xn + MAKE_INT_8(extension);
1524 /* Full extension format */
1526 USE_CYCLES(m68ki_ea_idx_cycle_table[extension&0x3f]);
1528 /* Check if base register is present */
1529 if(BIT_7(extension)) /* BS */
1532 /* Check if index is present */
1533 if(!BIT_6(extension)) /* IS */
1535 Xn = REG_DA[extension>>12]; /* Xn */
1536 if(!BIT_B(extension)) /* W/L */
1537 Xn = MAKE_INT_16(Xn);
1538 Xn <<= (extension>>9) & 3; /* SCALE */
1541 /* Check if base displacement is present */
1542 if(BIT_5(extension)) /* BD SIZE */
1543 bd = BIT_4(extension) ? m68ki_read_imm_32() : (uint32)MAKE_INT_16(m68ki_read_imm_16());
1545 /* If no indirect action, we are done */
1546 if(!(extension&7)) /* No Memory Indirect */
1547 return An + bd + Xn;
1549 /* Check if outer displacement is present */
1550 if(BIT_1(extension)) /* I/IS: od */
1551 od = BIT_0(extension) ? m68ki_read_imm_32() : (uint32)MAKE_INT_16(m68ki_read_imm_16());
1554 if(BIT_2(extension)) /* I/IS: 0 = preindex, 1 = postindex */
1555 return m68ki_read_32(An + bd) + Xn + od;
1558 return m68ki_read_32(An + bd + Xn) + od;
1562 /* Fetch operands */
1563 static inline uint OPER_AY_AI_8(void) {uint ea = EA_AY_AI_8(); return m68ki_read_8(ea); }
1564 static inline uint OPER_AY_AI_16(void) {uint ea = EA_AY_AI_16(); return m68ki_read_16(ea);}
1565 static inline uint OPER_AY_AI_32(void) {uint ea = EA_AY_AI_32(); return m68ki_read_32(ea);}
1566 static inline uint OPER_AY_PI_8(void) {uint ea = EA_AY_PI_8(); return m68ki_read_8(ea); }
1567 static inline uint OPER_AY_PI_16(void) {uint ea = EA_AY_PI_16(); return m68ki_read_16(ea);}
1568 static inline uint OPER_AY_PI_32(void) {uint ea = EA_AY_PI_32(); return m68ki_read_32(ea);}
1569 static inline uint OPER_AY_PD_8(void) {uint ea = EA_AY_PD_8(); return m68ki_read_8(ea); }
1570 static inline uint OPER_AY_PD_16(void) {uint ea = EA_AY_PD_16(); return m68ki_read_16(ea);}
1571 static inline uint OPER_AY_PD_32(void) {uint ea = EA_AY_PD_32(); return m68ki_read_32(ea);}
1572 static inline uint OPER_AY_DI_8(void) {uint ea = EA_AY_DI_8(); return m68ki_read_8(ea); }
1573 static inline uint OPER_AY_DI_16(void) {uint ea = EA_AY_DI_16(); return m68ki_read_16(ea);}
1574 static inline uint OPER_AY_DI_32(void) {uint ea = EA_AY_DI_32(); return m68ki_read_32(ea);}
1575 static inline uint OPER_AY_IX_8(void) {uint ea = EA_AY_IX_8(); return m68ki_read_8(ea); }
1576 static inline uint OPER_AY_IX_16(void) {uint ea = EA_AY_IX_16(); return m68ki_read_16(ea);}
1577 static inline uint OPER_AY_IX_32(void) {uint ea = EA_AY_IX_32(); return m68ki_read_32(ea);}
1579 static inline uint OPER_AX_AI_8(void) {uint ea = EA_AX_AI_8(); return m68ki_read_8(ea); }
1580 static inline uint OPER_AX_AI_16(void) {uint ea = EA_AX_AI_16(); return m68ki_read_16(ea);}
1581 static inline uint OPER_AX_AI_32(void) {uint ea = EA_AX_AI_32(); return m68ki_read_32(ea);}
1582 static inline uint OPER_AX_PI_8(void) {uint ea = EA_AX_PI_8(); return m68ki_read_8(ea); }
1583 static inline uint OPER_AX_PI_16(void) {uint ea = EA_AX_PI_16(); return m68ki_read_16(ea);}
1584 static inline uint OPER_AX_PI_32(void) {uint ea = EA_AX_PI_32(); return m68ki_read_32(ea);}
1585 static inline uint OPER_AX_PD_8(void) {uint ea = EA_AX_PD_8(); return m68ki_read_8(ea); }
1586 static inline uint OPER_AX_PD_16(void) {uint ea = EA_AX_PD_16(); return m68ki_read_16(ea);}
1587 static inline uint OPER_AX_PD_32(void) {uint ea = EA_AX_PD_32(); return m68ki_read_32(ea);}
1588 static inline uint OPER_AX_DI_8(void) {uint ea = EA_AX_DI_8(); return m68ki_read_8(ea); }
1589 static inline uint OPER_AX_DI_16(void) {uint ea = EA_AX_DI_16(); return m68ki_read_16(ea);}
1590 static inline uint OPER_AX_DI_32(void) {uint ea = EA_AX_DI_32(); return m68ki_read_32(ea);}
1591 static inline uint OPER_AX_IX_8(void) {uint ea = EA_AX_IX_8(); return m68ki_read_8(ea); }
1592 static inline uint OPER_AX_IX_16(void) {uint ea = EA_AX_IX_16(); return m68ki_read_16(ea);}
1593 static inline uint OPER_AX_IX_32(void) {uint ea = EA_AX_IX_32(); return m68ki_read_32(ea);}
1595 static inline uint OPER_A7_PI_8(void) {uint ea = EA_A7_PI_8(); return m68ki_read_8(ea); }
1596 static inline uint OPER_A7_PD_8(void) {uint ea = EA_A7_PD_8(); return m68ki_read_8(ea); }
1598 static inline uint OPER_AW_8(void) {uint ea = EA_AW_8(); return m68ki_read_8(ea); }
1599 static inline uint OPER_AW_16(void) {uint ea = EA_AW_16(); return m68ki_read_16(ea);}
1600 static inline uint OPER_AW_32(void) {uint ea = EA_AW_32(); return m68ki_read_32(ea);}
1601 static inline uint OPER_AL_8(void) {uint ea = EA_AL_8(); return m68ki_read_8(ea); }
1602 static inline uint OPER_AL_16(void) {uint ea = EA_AL_16(); return m68ki_read_16(ea);}
1603 static inline uint OPER_AL_32(void) {uint ea = EA_AL_32(); return m68ki_read_32(ea);}
1604 static inline uint OPER_PCDI_8(void) {uint ea = EA_PCDI_8(); return m68ki_read_pcrel_8(ea); }
1605 static inline uint OPER_PCDI_16(void) {uint ea = EA_PCDI_16(); return m68ki_read_pcrel_16(ea);}
1606 static inline uint OPER_PCDI_32(void) {uint ea = EA_PCDI_32(); return m68ki_read_pcrel_32(ea);}
1607 static inline uint OPER_PCIX_8(void) {uint ea = EA_PCIX_8(); return m68ki_read_pcrel_8(ea); }
1608 static inline uint OPER_PCIX_16(void) {uint ea = EA_PCIX_16(); return m68ki_read_pcrel_16(ea);}
1609 static inline uint OPER_PCIX_32(void) {uint ea = EA_PCIX_32(); return m68ki_read_pcrel_32(ea);}
1613 /* ---------------------------- Stack Functions --------------------------- */
1615 /* Push/pull data from the stack */
1616 static inline void m68ki_push_16(uint value)
1618 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
1619 m68ki_write_16(REG_SP, value);
1622 static inline void m68ki_push_32(uint value)
1624 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
1625 m68ki_write_32(REG_SP, value);
1628 static inline uint m68ki_pull_16(void)
1630 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
1631 return m68ki_read_16(REG_SP-2);
1634 static inline uint m68ki_pull_32(void)
1636 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
1637 return m68ki_read_32(REG_SP-4);
1641 /* Increment/decrement the stack as if doing a push/pull but
1642 * don't do any memory access.
1644 static inline void m68ki_fake_push_16(void)
1646 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
1649 static inline void m68ki_fake_push_32(void)
1651 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
1654 static inline void m68ki_fake_pull_16(void)
1656 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
1659 static inline void m68ki_fake_pull_32(void)
1661 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
1665 /* ----------------------------- Program Flow ----------------------------- */
1667 /* Jump to a new program location or vector.
1668 * These functions will also call the pc_changed callback if it was enabled
1671 static inline void m68ki_jump(uint new_pc)
1674 m68ki_pc_changed(REG_PC);
1677 static inline void m68ki_jump_vector(uint vector)
1679 REG_PC = (vector<<2) + REG_VBR;
1680 REG_PC = m68ki_read_data_32(REG_PC);
1681 m68ki_pc_changed(REG_PC);
1685 /* Branch to a new memory location.
1686 * The 32-bit branch will call pc_changed if it was enabled in m68kconf.h.
1687 * So far I've found no problems with not calling pc_changed for 8 or 16
1690 static inline void m68ki_branch_8(uint offset)
1692 REG_PC += MAKE_INT_8(offset);
1695 static inline void m68ki_branch_16(uint offset)
1697 REG_PC += MAKE_INT_16(offset);
1700 static inline void m68ki_branch_32(uint offset)
1703 m68ki_pc_changed(REG_PC);
1706 /* ---------------------------- Status Register --------------------------- */
1708 /* Set the S flag and change the active stack pointer.
1709 * Note that value MUST be 4 or 0.
1711 static inline void m68ki_set_s_flag(uint value)
1713 /* Backup the old stack pointer */
1714 REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
1715 /* Set the S flag */
1717 /* Set the new stack pointer */
1718 REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
1721 /* Set the S and M flags and change the active stack pointer.
1722 * Note that value MUST be 0, 2, 4, or 6 (bit2 = S, bit1 = M).
1724 static inline void m68ki_set_sm_flag(uint value)
1726 /* Backup the old stack pointer */
1727 REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
1728 /* Set the S and M flags */
1729 FLAG_S = value & SFLAG_SET;
1730 FLAG_M = value & MFLAG_SET;
1731 /* Set the new stack pointer */
1732 REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
1735 /* Set the S and M flags. Don't touch the stack pointer. */
1736 static inline void m68ki_set_sm_flag_nosp(uint value)
1738 /* Set the S and M flags */
1739 FLAG_S = value & SFLAG_SET;
1740 FLAG_M = value & MFLAG_SET;
1744 /* Set the condition code register */
1745 static inline void m68ki_set_ccr(uint value)
1747 FLAG_X = BIT_4(value) << 4;
1748 FLAG_N = BIT_3(value) << 4;
1749 FLAG_Z = !BIT_2(value);
1750 FLAG_V = BIT_1(value) << 6;
1751 FLAG_C = BIT_0(value) << 8;
1754 /* Set the status register but don't check for interrupts */
1755 static inline void m68ki_set_sr_noint(uint value)
1757 /* Mask out the "unimplemented" bits */
1758 value &= CPU_SR_MASK;
1760 /* Now set the status register */
1761 FLAG_T1 = BIT_F(value);
1762 FLAG_T0 = BIT_E(value);
1763 FLAG_INT_MASK = value & 0x0700;
1764 m68ki_set_ccr(value);
1765 m68ki_set_sm_flag((value >> 11) & 6);
1768 /* Set the status register but don't check for interrupts nor
1769 * change the stack pointer
1771 static inline void m68ki_set_sr_noint_nosp(uint value)
1773 /* Mask out the "unimplemented" bits */
1774 value &= CPU_SR_MASK;
1776 /* Now set the status register */
1777 FLAG_T1 = BIT_F(value);
1778 FLAG_T0 = BIT_E(value);
1779 FLAG_INT_MASK = value & 0x0700;
1780 m68ki_set_ccr(value);
1781 m68ki_set_sm_flag_nosp((value >> 11) & 6);
1784 /* Set the status register and check for interrupts */
1785 static inline void m68ki_set_sr(uint value)
1787 m68ki_set_sr_noint(value);
1788 m68ki_check_interrupts();
1792 /* ------------------------- Exception Processing ------------------------- */
1794 /* Initiate exception processing */
1795 static inline uint m68ki_init_exception(void)
1797 /* Save the old status register */
1798 uint sr = m68ki_get_sr();
1800 /* Turn off trace flag, clear pending traces */
1801 FLAG_T1 = FLAG_T0 = 0;
1802 m68ki_clear_trace();
1803 /* Enter supervisor mode */
1804 m68ki_set_s_flag(SFLAG_SET);
1809 /* 3 word stack frame (68000 only) */
1810 static inline void m68ki_stack_frame_3word(uint pc, uint sr)
1816 /* Format 0 stack frame.
1817 * This is the standard stack frame for 68010+.
1819 static inline void m68ki_stack_frame_0000(uint pc, uint sr, uint vector)
1821 /* Stack a 3-word frame if we are 68000 */
1822 if(CPU_TYPE == CPU_TYPE_000)
1824 m68ki_stack_frame_3word(pc, sr);
1827 m68ki_push_16(vector<<2);
1832 /* Format 1 stack frame (68020).
1833 * For 68020, this is the 4 word throwaway frame.
1835 static inline void m68ki_stack_frame_0001(uint pc, uint sr, uint vector)
1837 m68ki_push_16(0x1000 | (vector<<2));
1842 /* Format 2 stack frame.
1843 * This is used only by 68020 for trap exceptions.
1845 static inline void m68ki_stack_frame_0010(uint sr, uint vector)
1847 m68ki_push_32(REG_PPC);
1848 m68ki_push_16(0x2000 | (vector<<2));
1849 m68ki_push_32(REG_PC);
1854 /* Bus error stack frame (68000 only).
1856 static inline void m68ki_stack_frame_buserr(uint sr)
1858 m68ki_push_32(REG_PC);
1860 m68ki_push_16(REG_IR);
1861 m68ki_push_32(m68ki_aerr_address); /* access address */
1862 /* 0 0 0 0 0 0 0 0 0 0 0 R/W I/N FC
1863 * R/W 0 = write, 1 = read
1864 * I/N 0 = instruction, 1 = not
1865 * FC 3-bit function code
1867 m68ki_push_16(m68ki_aerr_write_mode | CPU_INSTR_MODE | m68ki_aerr_fc);
1870 /* Format 8 stack frame (68010).
1871 * 68010 only. This is the 29 word bus/address error frame.
1873 static inline void m68ki_stack_frame_1000(uint pc, uint sr, uint vector)
1877 * INTERNAL INFORMATION, 16 WORDS
1879 m68ki_fake_push_32();
1880 m68ki_fake_push_32();
1881 m68ki_fake_push_32();
1882 m68ki_fake_push_32();
1883 m68ki_fake_push_32();
1884 m68ki_fake_push_32();
1885 m68ki_fake_push_32();
1886 m68ki_fake_push_32();
1888 /* INSTRUCTION INPUT BUFFER */
1891 /* UNUSED, RESERVED (not written) */
1892 m68ki_fake_push_16();
1894 /* DATA INPUT BUFFER */
1897 /* UNUSED, RESERVED (not written) */
1898 m68ki_fake_push_16();
1900 /* DATA OUTPUT BUFFER */
1903 /* UNUSED, RESERVED (not written) */
1904 m68ki_fake_push_16();
1909 /* SPECIAL STATUS WORD */
1912 /* 1000, VECTOR OFFSET */
1913 m68ki_push_16(0x8000 | (vector<<2));
1915 /* PROGRAM COUNTER */
1918 /* STATUS REGISTER */
1922 /* Format A stack frame (short bus fault).
1923 * This is used only by 68020 for bus fault and address error
1924 * if the error happens at an instruction boundary.
1925 * PC stacked is address of next instruction.
1927 static inline void m68ki_stack_frame_1010(uint sr, uint vector, uint pc, uint fault_address)
1929 int orig_rw = m68ki_cpu.mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
1930 int orig_fc = m68ki_cpu.mmu_tmp_buserror_fc;
1931 int orig_sz = m68ki_cpu.mmu_tmp_buserror_sz;
1933 /* INTERNAL REGISTER */
1936 /* INTERNAL REGISTER */
1939 /* DATA OUTPUT BUFFER (2 words) */
1942 /* INTERNAL REGISTER */
1945 /* INTERNAL REGISTER */
1948 /* DATA CYCLE FAULT ADDRESS (2 words) */
1949 m68ki_push_32(fault_address);
1951 /* INSTRUCTION PIPE STAGE B */
1954 /* INSTRUCTION PIPE STAGE C */
1957 /* SPECIAL STATUS REGISTER */
1958 // set bit for: Rerun Faulted bus Cycle, or run pending prefetch
1960 m68ki_push_16(0x0100 | orig_fc | orig_rw<<6 | orig_sz<<4);
1962 /* INTERNAL REGISTER */
1965 /* 1010, VECTOR OFFSET */
1966 m68ki_push_16(0xa000 | (vector<<2));
1968 /* PROGRAM COUNTER */
1971 /* STATUS REGISTER */
1975 /* Format B stack frame (long bus fault).
1976 * This is used only by 68020 for bus fault and address error
1977 * if the error happens during instruction execution.
1978 * PC stacked is address of instruction in progress.
1980 static inline void m68ki_stack_frame_1011(uint sr, uint vector, uint pc, uint fault_address)
1982 int orig_rw = m68ki_cpu.mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
1983 int orig_fc = m68ki_cpu.mmu_tmp_buserror_fc;
1984 int orig_sz = m68ki_cpu.mmu_tmp_buserror_sz;
1985 /* INTERNAL REGISTERS (18 words) */
1996 /* VERSION# (4 bits), INTERNAL INFORMATION */
1999 /* INTERNAL REGISTERS (3 words) */
2003 /* DATA INTPUT BUFFER (2 words) */
2006 /* INTERNAL REGISTERS (2 words) */
2009 /* STAGE B ADDRESS (2 words) */
2012 /* INTERNAL REGISTER (4 words) */
2016 /* DATA OUTPUT BUFFER (2 words) */
2019 /* INTERNAL REGISTER */
2022 /* INTERNAL REGISTER */
2025 /* DATA CYCLE FAULT ADDRESS (2 words) */
2026 m68ki_push_32(fault_address);
2028 /* INSTRUCTION PIPE STAGE B */
2031 /* INSTRUCTION PIPE STAGE C */
2034 /* SPECIAL STATUS REGISTER */
2035 m68ki_push_16(0x0100 | orig_fc | (orig_rw<<6) | (orig_sz<<4));
2037 /* INTERNAL REGISTER */
2040 /* 1011, VECTOR OFFSET */
2041 m68ki_push_16(0xb000 | (vector<<2));
2043 /* PROGRAM COUNTER */
2046 /* STATUS REGISTER */
2050 /* Type 7 stack frame (access fault).
2051 * This is used by the 68040 for bus fault and mmu trap
2054 static inline void m68ki_stack_frame_0111(uint sr, uint vector, uint pc, uint fault_address, uint8 in_mmu)
2056 int orig_rw = m68ki_cpu.mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
2057 int orig_fc = m68ki_cpu.mmu_tmp_buserror_fc;
2059 /* INTERNAL REGISTERS (18 words) */
2070 /* FAULT ADDRESS (2 words) */
2071 m68ki_push_32(fault_address);
2073 /* INTERNAL REGISTERS (3 words) */
2077 /* SPECIAL STATUS REGISTER (1 word) */
2078 m68ki_push_16((in_mmu ? 0x400 : 0) | orig_fc | (orig_rw<<8));
2080 /* EFFECTIVE ADDRESS (2 words) */
2081 m68ki_push_32(fault_address);
2083 /* 0111, VECTOR OFFSET (1 word) */
2084 m68ki_push_16(0x7000 | (vector<<2));
2086 /* PROGRAM COUNTER (2 words) */
2089 /* STATUS REGISTER (1 word) */
2093 /* Used for Group 2 exceptions.
2094 * These stack a type 2 frame on the 020.
2096 static inline void m68ki_exception_trap(uint vector)
2098 uint sr = m68ki_init_exception();
2100 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
2101 m68ki_stack_frame_0000(REG_PC, sr, vector);
2103 m68ki_stack_frame_0010(sr, vector);
2105 m68ki_jump_vector(vector);
2107 /* Use up some clock cycles and undo the instruction's cycles */
2108 USE_CYCLES(CYC_EXCEPTION[vector] - CYC_INSTRUCTION[REG_IR]);
2111 /* Trap#n stacks a 0 frame but behaves like group2 otherwise */
2112 static inline void m68ki_exception_trapN(uint vector)
2114 uint sr = m68ki_init_exception();
2115 m68ki_stack_frame_0000(REG_PC, sr, vector);
2116 m68ki_jump_vector(vector);
2118 /* Use up some clock cycles and undo the instruction's cycles */
2119 USE_CYCLES(CYC_EXCEPTION[vector] - CYC_INSTRUCTION[REG_IR]);
2122 /* Exception for trace mode */
2123 static inline void m68ki_exception_trace(void)
2125 uint sr = m68ki_init_exception();
2127 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
2129 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
2130 if(CPU_TYPE_IS_000(CPU_TYPE))
2132 CPU_INSTR_MODE = INSTRUCTION_NO;
2134 #endif /* M68K_EMULATE_ADDRESS_ERROR */
2135 m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_TRACE);
2138 m68ki_stack_frame_0010(sr, EXCEPTION_TRACE);
2140 m68ki_jump_vector(EXCEPTION_TRACE);
2142 /* Trace nullifies a STOP instruction */
2143 CPU_STOPPED &= ~STOP_LEVEL_STOP;
2145 /* Use up some clock cycles */
2146 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_TRACE]);
2149 /* Exception for privilege violation */
2150 static inline void m68ki_exception_privilege_violation(void)
2152 uint sr = m68ki_init_exception();
2154 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
2155 if(CPU_TYPE_IS_000(CPU_TYPE))
2157 CPU_INSTR_MODE = INSTRUCTION_NO;
2159 #endif /* M68K_EMULATE_ADDRESS_ERROR */
2161 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_PRIVILEGE_VIOLATION);
2162 m68ki_jump_vector(EXCEPTION_PRIVILEGE_VIOLATION);
2164 /* Use up some clock cycles and undo the instruction's cycles */
2165 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_PRIVILEGE_VIOLATION] - CYC_INSTRUCTION[REG_IR]);
2168 extern jmp_buf m68ki_bus_error_jmp_buf;
2170 #define m68ki_check_bus_error_trap() setjmp(m68ki_bus_error_jmp_buf)
2172 /* Exception for bus error */
2173 static inline void m68ki_exception_bus_error(void)
2177 /* If we were processing a bus error, address error, or reset,
2178 * this is a catastrophic failure.
2181 if(CPU_RUN_MODE == RUN_MODE_BERR_AERR_RESET)
2183 m68k_read_memory_8(0x00ffff01);
2184 CPU_STOPPED = STOP_LEVEL_HALT;
2187 CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET;
2189 /* Use up some clock cycles and undo the instruction's cycles */
2190 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_BUS_ERROR] - CYC_INSTRUCTION[REG_IR]);
2192 for (i = 15; i >= 0; i--){
2193 REG_DA[i] = REG_DA_SAVE[i];
2196 uint sr = m68ki_init_exception();
2197 m68ki_stack_frame_1000(REG_PPC, sr, EXCEPTION_BUS_ERROR);
2199 m68ki_jump_vector(EXCEPTION_BUS_ERROR);
2200 longjmp(m68ki_bus_error_jmp_buf, 1);
2203 extern int cpu_log_enabled;
2205 /* Exception for A-Line instructions */
2206 static inline void m68ki_exception_1010(void)
2209 #if M68K_LOG_1010_1111 == OPT_ON
2210 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1010 instruction %04x (%s)\n",
2211 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
2212 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC),CPU_TYPE)));
2215 sr = m68ki_init_exception();
2216 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_1010);
2217 m68ki_jump_vector(EXCEPTION_1010);
2219 /* Use up some clock cycles and undo the instruction's cycles */
2220 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1010] - CYC_INSTRUCTION[REG_IR]);
2223 /* Exception for F-Line instructions */
2224 static inline void m68ki_exception_1111(void)
2228 #if M68K_LOG_1010_1111 == OPT_ON
2229 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1111 instruction %04x (%s)\n",
2230 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
2231 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC),CPU_TYPE)));
2234 sr = m68ki_init_exception();
2235 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_1111);
2236 m68ki_jump_vector(EXCEPTION_1111);
2238 /* Use up some clock cycles and undo the instruction's cycles */
2239 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1111] - CYC_INSTRUCTION[REG_IR]);
2242 #if M68K_ILLG_HAS_CALLBACK == OPT_SPECIFY_HANDLER
2243 extern int m68ki_illg_callback(int);
2246 /* Exception for illegal instructions */
2247 static inline void m68ki_exception_illegal(void)
2251 M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: illegal instruction %04x (%s)\n",
2252 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
2253 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC),CPU_TYPE)));
2254 if (m68ki_illg_callback(REG_IR))
2257 sr = m68ki_init_exception();
2259 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
2260 if(CPU_TYPE_IS_000(CPU_TYPE))
2262 CPU_INSTR_MODE = INSTRUCTION_NO;
2264 #endif /* M68K_EMULATE_ADDRESS_ERROR */
2266 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_ILLEGAL_INSTRUCTION);
2267 m68ki_jump_vector(EXCEPTION_ILLEGAL_INSTRUCTION);
2269 /* Use up some clock cycles and undo the instruction's cycles */
2270 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ILLEGAL_INSTRUCTION] - CYC_INSTRUCTION[REG_IR]);
2273 /* Exception for format errror in RTE */
2274 static inline void m68ki_exception_format_error(void)
2276 uint sr = m68ki_init_exception();
2277 m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_FORMAT_ERROR);
2278 m68ki_jump_vector(EXCEPTION_FORMAT_ERROR);
2280 /* Use up some clock cycles and undo the instruction's cycles */
2281 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_FORMAT_ERROR] - CYC_INSTRUCTION[REG_IR]);
2284 /* Exception for address error */
2285 static inline void m68ki_exception_address_error(void)
2287 uint32 sr = m68ki_init_exception();
2289 /* If we were processing a bus error, address error, or reset,
2290 * this is a catastrophic failure.
2293 if(CPU_RUN_MODE == RUN_MODE_BERR_AERR_RESET_WSF)
2295 m68k_read_memory_8(0x00ffff01);
2296 CPU_STOPPED = STOP_LEVEL_HALT;
2300 CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET_WSF;
2302 if (CPU_TYPE_IS_000(CPU_TYPE))
2304 /* Note: This is implemented for 68000 only! */
2305 m68ki_stack_frame_buserr(sr);
2307 else if (CPU_TYPE_IS_010(CPU_TYPE))
2309 /* only the 68010 throws this unique type-1000 frame */
2310 m68ki_stack_frame_1000(REG_PPC, sr, EXCEPTION_BUS_ERROR);
2312 else if (m68ki_cpu.mmu_tmp_buserror_address == REG_PPC)
2314 m68ki_stack_frame_1010(sr, EXCEPTION_BUS_ERROR, REG_PPC, m68ki_cpu.mmu_tmp_buserror_address);
2318 m68ki_stack_frame_1011(sr, EXCEPTION_BUS_ERROR, REG_PPC, m68ki_cpu.mmu_tmp_buserror_address);
2321 m68ki_jump_vector(EXCEPTION_ADDRESS_ERROR);
2323 m68ki_cpu.run_mode = RUN_MODE_BERR_AERR_RESET;
2325 /* Use up some clock cycles. Note that we don't need to undo the
2326 instruction's cycles here as we've longjmp:ed directly from the
2327 instruction handler without passing the part of the excecute loop
2328 that deducts instruction cycles */
2329 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ADDRESS_ERROR]);
2333 /* Service an interrupt request and start exception processing */
2334 static inline void m68ki_exception_interrupt(uint int_level)
2340 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
2341 if(CPU_TYPE_IS_000(CPU_TYPE))
2343 CPU_INSTR_MODE = INSTRUCTION_NO;
2345 #endif /* M68K_EMULATE_ADDRESS_ERROR */
2347 /* Turn off the stopped state */
2348 CPU_STOPPED &= ~STOP_LEVEL_STOP;
2350 /* If we are halted, don't do anything */
2354 /* Acknowledge the interrupt */
2355 vector = m68ki_int_ack(int_level);
2357 /* Get the interrupt vector */
2358 if(vector == M68K_INT_ACK_AUTOVECTOR)
2359 /* Use the autovectors. This is the most commonly used implementation */
2360 vector = EXCEPTION_INTERRUPT_AUTOVECTOR+int_level;
2361 else if(vector == M68K_INT_ACK_SPURIOUS)
2362 /* Called if no devices respond to the interrupt acknowledge */
2363 vector = EXCEPTION_SPURIOUS_INTERRUPT;
2364 else if(vector > 255)
2366 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: Interrupt acknowledge returned invalid vector $%x\n",
2367 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC), vector));
2371 /* Start exception processing */
2372 sr = m68ki_init_exception();
2374 /* Set the interrupt mask to the level of the one being serviced */
2375 FLAG_INT_MASK = int_level<<8;
2377 /* Get the new PC */
2378 new_pc = m68ki_read_data_32((vector<<2) + REG_VBR);
2380 /* If vector is uninitialized, call the uninitialized interrupt vector */
2382 new_pc = m68ki_read_data_32((EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + REG_VBR);
2384 /* Generate a stack frame */
2385 m68ki_stack_frame_0000(REG_PC, sr, vector);
2386 if(FLAG_M && CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
2388 /* Create throwaway frame */
2389 m68ki_set_sm_flag(FLAG_S); /* clear M */
2390 sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */
2391 m68ki_stack_frame_0001(REG_PC, sr, vector);
2396 /* Defer cycle counting until later */
2397 USE_CYCLES(CYC_EXCEPTION[vector]);
2399 #if !M68K_EMULATE_INT_ACK
2400 /* Automatically clear IRQ if we are not using an acknowledge scheme */
2402 #endif /* M68K_EMULATE_INT_ACK */
2406 /* ASG: Check for interrupts */
2407 static inline void m68ki_check_interrupts(void)
2409 if(m68ki_cpu.nmi_pending)
2411 m68ki_cpu.nmi_pending = FALSE;
2412 m68ki_exception_interrupt(7);
2414 else if(CPU_INT_LEVEL > FLAG_INT_MASK)
2415 m68ki_exception_interrupt(CPU_INT_LEVEL>>8);
2420 /* ======================================================================== */
2421 /* ============================== END OF FILE ============================= */
2422 /* ======================================================================== */
2428 #endif /* M68KCPU__HEADER */