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iRTG initial implementation
[pistorm] / platforms / amiga / rtg / rtg.c
1 // SPDX-License-Identifier: MIT
2
3 #include <stdint.h>
4 #include <endian.h>
5 #include <stdio.h>
6 #include <stdlib.h>
7 #include <string.h>
8 #include <time.h>
9 #include "irtg_structs.h"
10 #include "config_file/config_file.h"
11 #include "rtg.h"
12
13 #include "m68k.h"
14
15 uint8_t rtg_u8[4];
16 uint16_t rtg_x[8], rtg_y[8];
17 uint16_t rtg_user[8];
18 uint16_t rtg_format;
19 uint32_t rtg_address[8];
20 uint32_t rtg_address_adj[8];
21 uint32_t rtg_rgb[8];
22
23 static uint8_t display_enabled = 0xFF;
24
25 uint16_t rtg_display_width, rtg_display_height;
26 uint16_t rtg_display_format;
27 uint16_t rtg_pitch, rtg_total_rows;
28 uint16_t rtg_offset_x, rtg_offset_y;
29
30 uint8_t *rtg_mem; // FIXME
31
32 uint32_t framebuffer_addr = 0;
33 uint32_t framebuffer_addr_adj = 0;
34
35 static void handle_rtg_command(uint32_t cmd);
36 static void handle_irtg_command(uint32_t cmd);
37
38 uint8_t realtime_graphics_debug = 0;
39 extern int cpu_emulation_running;
40 extern struct emulator_config *cfg;
41 extern uint8_t rtg_on;
42
43 //#define DEBUG_RTG
44
45 #ifdef DEBUG_RTG
46 /*static const char *op_type_names[OP_TYPE_NUM] = {
47     "BYTE",
48     "WORD",
49     "LONGWORD",
50     "MEM",
51 };*/
52
53 /*static const char *rtg_format_names[RTGFMT_NUM] = {
54     "8BPP CLUT",
55     "16BPP RGB (565)",
56     "32BPP RGB (RGBA)",
57     "15BPP RGB (555)",
58 };*/
59 #define DEBUG printf
60 #else
61 #define DEBUG(...)
62 #endif
63
64 int init_rtg_data(struct emulator_config *cfg_) {
65     rtg_mem = calloc(1, 40 * SIZE_MEGA);
66     if (!rtg_mem) {
67         printf("Failed to allocate RTG video memory.\n");
68         return 0;
69     }
70
71     m68k_add_ram_range(PIGFX_RTG_BASE + PIGFX_REG_SIZE, 32 * SIZE_MEGA - PIGFX_REG_SIZE, rtg_mem);
72     add_mapping(cfg_, MAPTYPE_RAM_NOALLOC, PIGFX_RTG_BASE + PIGFX_REG_SIZE, 40 * SIZE_MEGA - PIGFX_REG_SIZE, -1, (char *)rtg_mem, "rtg_mem", 0);
73     return 1;
74 }
75
76 void shutdown_rtg() {
77     printf("[RTG] Shutting down RTG.\n");
78     if (rtg_on) {
79         rtg_on = 0;
80     }
81     if (rtg_mem) {
82         
83         free(rtg_mem);
84         rtg_mem = NULL;
85     }
86 }
87
88 unsigned int rtg_get_fb() {
89     return PIGFX_RTG_BASE + PIGFX_REG_SIZE + framebuffer_addr_adj;
90 }
91
92 unsigned int rtg_read(uint32_t address, uint8_t mode) {
93     //printf("%s read from RTG: %.8X\n", op_type_names[mode], address);
94     if (address == RTG_COMMAND) {
95         return 0xFFCF;
96     }
97     if (address >= PIGFX_REG_SIZE) {
98         if (rtg_mem && (address - PIGFX_REG_SIZE) < PIGFX_UPPER) {
99             switch (mode) {
100                 case OP_TYPE_BYTE:
101                     return (rtg_mem[address - PIGFX_REG_SIZE]);
102                     break;
103                 case OP_TYPE_WORD:
104                     return be16toh(*(( uint16_t *) (&rtg_mem[address - PIGFX_REG_SIZE])));
105                     break;
106                 case OP_TYPE_LONGWORD:
107                     return be32toh(*(( uint32_t *) (&rtg_mem[address - PIGFX_REG_SIZE])));
108                     break;
109                 default:
110                     return 0;
111             }
112         }
113     }
114
115     return 0;
116 }
117
118 struct timespec diff(struct timespec start, struct timespec end)
119 {
120     struct timespec temp;
121     if ((end.tv_nsec-start.tv_nsec)<0) {
122         temp.tv_sec = end.tv_sec-start.tv_sec-1;
123         temp.tv_nsec = 1000000000+end.tv_nsec-start.tv_nsec;
124     } else {
125         temp.tv_sec = end.tv_sec-start.tv_sec;
126         temp.tv_nsec = end.tv_nsec-start.tv_nsec;
127     }
128     return temp;
129 }
130
131 #define CHKREG(a, b) case a: b = value; break;
132
133 void rtg_write(uint32_t address, uint32_t value, uint8_t mode) {
134     //printf("%s write to RTG: %.8X (%.8X)\n", op_type_names[mode], address, value);
135     if (address >= PIGFX_REG_SIZE) {
136         /*if ((address - PIGFX_REG_SIZE) < framebuffer_addr) {// || (address - PIGFX_REG_SIZE) > framebuffer_addr + ((rtg_display_width << rtg_display_format) * rtg_display_height)) {
137             printf("Write to RTG memory outside frame buffer %.8X (%.8X).\n", (address - PIGFX_REG_SIZE), framebuffer_addr);
138         }*/
139         if (rtg_mem && (address - PIGFX_REG_SIZE) < PIGFX_UPPER) {
140             switch (mode) {
141                 case OP_TYPE_BYTE:
142                     rtg_mem[address - PIGFX_REG_SIZE] = value;
143                     break;
144                 case OP_TYPE_WORD:
145                     *(( uint16_t *) (&rtg_mem[address - PIGFX_REG_SIZE])) = htobe16(value);
146                     break;
147                 case OP_TYPE_LONGWORD:
148                     *(( uint32_t *) (&rtg_mem[address - PIGFX_REG_SIZE])) = htobe32(value);
149                     break;
150                 default:
151                     return;
152             }
153         }
154     } else if (address == RTG_DEBUGME) {
155         printf("RTG DEBUGME WRITE: %d.\n", value);
156     } else {
157         switch (mode) {
158             case OP_TYPE_BYTE:
159                 switch (address) {
160                     CHKREG(RTG_U81, rtg_u8[0]);
161                     CHKREG(RTG_U82, rtg_u8[1]);
162                     CHKREG(RTG_U83, rtg_u8[2]);
163                     CHKREG(RTG_U84, rtg_u8[3]);
164                 }
165                 break;
166             case OP_TYPE_WORD:
167                 switch (address) {
168                     CHKREG(RTG_X1, rtg_x[0]);
169                     CHKREG(RTG_X2, rtg_x[1]);
170                     CHKREG(RTG_X3, rtg_x[2]);
171                     CHKREG(RTG_X4, rtg_x[3]);
172                     CHKREG(RTG_X5, rtg_x[4]);
173                     CHKREG(RTG_Y1, rtg_y[0]);
174                     CHKREG(RTG_Y2, rtg_y[1]);
175                     CHKREG(RTG_Y3, rtg_y[2]);
176                     CHKREG(RTG_Y4, rtg_y[3]);
177                     CHKREG(RTG_Y5, rtg_y[4]);
178                     CHKREG(RTG_U1, rtg_user[0]);
179                     CHKREG(RTG_U2, rtg_user[1]);
180                     CHKREG(RTG_FORMAT, rtg_format);
181                     case RTG_COMMAND:
182                         handle_rtg_command(value);
183                         break;
184                     case IRTG_COMMAND:
185                         handle_irtg_command(value);
186                         break;
187                 }
188                 break;
189             case OP_TYPE_LONGWORD:
190                 switch (address) {
191                     case RTG_ADDR1:
192                         rtg_address[0] = value;
193                         rtg_address_adj[0] = value - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
194                         break;
195                     case RTG_ADDR2:
196                         rtg_address[1] = value;
197                         rtg_address_adj[1] = value - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
198                         break;
199                     CHKREG(RTG_ADDR3, rtg_address[2]);
200                     CHKREG(RTG_ADDR4, rtg_address[3]);
201                     CHKREG(RTG_RGB1, rtg_rgb[0]);
202                     CHKREG(RTG_RGB2, rtg_rgb[1]);
203                 }
204                 break;
205         }
206     }
207
208     return;
209 }
210
211 #define gdebug(a) if (realtime_graphics_debug) { printf(a); m68k_end_timeslice(); cpu_emulation_running = 0; }
212 #define M68KR(a) m68k_get_reg(NULL, a)
213 #define RGBF_D7 rgbf_to_rtg[M68KR(M68K_REG_D7)]
214 #define CMD_PITCH be16toh(r->BytesPerRow)
215
216 static struct P96RenderInfo *r;
217 static struct P96BoardInfo *b;
218 static struct P96Line *ln;
219 static uint8_t cmd_mask;
220
221 static void handle_irtg_command(uint32_t cmd) {
222     b = (struct P96BoardInfo *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A0));
223     r = (struct P96RenderInfo *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A1));
224
225     switch (cmd) {
226         case RTGCMD_SETPAN: {
227             // A0: struct BoardInfo *b, A1: UBYTE *addr, D0 UWORD width, D1: WORD x_offset, D2: WORD y_offset, D7: RGBFTYPE format
228 #ifdef DEBUG_RTG
229             if (realtime_graphics_debug) {
230                 printf("iSetPanning begin\n");
231                 printf("IRTGCmd SetPanning\n");
232                 printf("IRTGCmd x: %d y: %d w: %d (%d)\n", M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D0) << RGBF_D7, M68KR(M68K_REG_D0));
233                 printf("BoardInfo: %.8X Addr: %.8X\n", M68KR(M68K_REG_A0), M68KR(M68K_REG_A1));
234                 printf("BoardInfo Xoffs: %d Yoffs: %d\n", be16toh(b->XOffset), be16toh(b->YOffset));
235             }
236 #endif
237             if (!b) break;
238
239             b->XOffset = (int16_t)htobe16(M68KR(M68K_REG_D1));
240             b->YOffset = (int16_t)htobe16(M68KR(M68K_REG_D2));
241
242             rtg_offset_x = M68KR(M68K_REG_D1);
243             rtg_offset_y = M68KR(M68K_REG_D2);
244             rtg_pitch = (M68KR(M68K_REG_D0) << RGBF_D7);
245             framebuffer_addr = M68KR(M68K_REG_A1) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
246             framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << RGBF_D7) + (rtg_offset_y * rtg_pitch);
247
248 #ifdef DEBUG_RTG
249             if (realtime_graphics_debug) {
250                 printf("RTG OffsetX/Y: %d/%d\n", rtg_offset_x, rtg_offset_y);
251                 printf("RTG Pitch: %d\n", rtg_pitch);
252                 printf("RTG FBAddr/Adj: %.8X (%.8X)/%.8X\n", framebuffer_addr, M68KR(M68K_REG_A1), framebuffer_addr_adj);
253                 printf("iSetPanning End\n");
254             }
255 #endif
256
257             break;
258         }
259         case RTGCMD_DRAWLINE: {
260             // A0: struct BoardInfo *b, A1: RenderInfo *r A2: struct Line *l, D0: UBYTE mask, D7: RGBFTYPE format
261             gdebug("iDrawLine begin\n");
262             ln = (struct P96Line *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
263
264             if (!ln || !r) break;
265
266             cmd_mask = (uint8_t)M68KR(M68K_REG_D0);
267             rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
268
269             if (cmd_mask == 0xFF && be16toh(ln->LinePtrn) == 0xFFFF) {
270                 rtg_drawline_solid(be16toh(ln->X), be16toh(ln->Y), be16toh(ln->dX), be16toh(ln->dY),
271                                    be16toh(ln->Length), be32toh(ln->FgPen), CMD_PITCH, RGBF_D7);
272             } else {
273                 rtg_drawline(be16toh(ln->X), be16toh(ln->Y), be16toh(ln->dX), be16toh(ln->dY),
274                              be16toh(ln->Length), be16toh(ln->LinePtrn), be16toh(ln->PatternShift),
275                              be32toh(ln->FgPen), be32toh(ln->BgPen), CMD_PITCH,
276                              RGBF_D7, cmd_mask, ln->DrawMode);
277             }
278             gdebug("iDrawLine end\n");
279             break;
280         }
281         case RTGCMD_FILLRECT: {
282             // A0: BoardInfo *b, A1: RenderInfo *r
283             // D0 WORD x, D1: WORD y, D2: WORD w, D3: WORD h
284             // D4: ULONG color, D5: UBYTE mask, D7: RGBFTYPE format
285             gdebug("iFillRect begin\n");
286 #ifdef DEBUG_RTG
287             if (realtime_graphics_debug) {
288                 DEBUG("X1/X2: %d/%d-> X2/Y2: %d/%d\n", (int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3));
289                 DEBUG("R: %.8X B: %.8X\n", M68KR(M68K_REG_A0), M68KR(M68K_REG_A1));
290             }
291 #endif
292
293             if (!b || !r) break;
294
295             cmd_mask = (uint8_t)M68KR(M68K_REG_D5);
296             rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
297
298             if (cmd_mask == 0xFF) {
299                 rtg_fillrect_solid((int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3),
300                                    M68KR(M68K_REG_D4), CMD_PITCH, RGBF_D7);
301             } else {
302                 rtg_fillrect((int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3),
303                              M68KR(M68K_REG_D4), CMD_PITCH, RGBF_D7, cmd_mask);
304             }
305             gdebug("iFillRect end\n");
306             break;
307         }
308         case RTGCMD_INVERTRECT: {
309             // A0: BoardInfo *b, A1: RenderInfo *r
310             // D0 WORD x, D1: WORD y, D2: WORD w, D3: WORD h
311             // D4: UBYTE mask, D7: RGBFTYPE format
312             gdebug("iInvertRect begin\n");
313             if (!b || !r) break;
314
315             cmd_mask = (uint8_t)M68KR(M68K_REG_D4);
316             rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
317
318             rtg_invertrect((int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3), CMD_PITCH, RGBF_D7, cmd_mask);
319             gdebug("iInvertRect end\n");
320             break;
321         }
322         case RTGCMD_BLITRECT: {
323             // A0: BoardInfo *b, A1: RenderInfo *r)
324             // D0: WORD x, D1: WORD y, D2: WORD dx, D3: WORD dy, D4: WORD w, D5: WORD h,
325             // D6: UBYTE mask, D7: RGBFTYPE format
326             gdebug("iBlitRect begin\n");
327
328             cmd_mask = (uint8_t)M68KR(M68K_REG_D6);
329             rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
330
331             if (cmd_mask == 0xFF) {
332                 rtg_blitrect_solid(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), M68KR(M68K_REG_D4), M68KR(M68K_REG_D5), CMD_PITCH, RGBF_D7);
333             } else {
334                 rtg_blitrect(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), M68KR(M68K_REG_D4), M68KR(M68K_REG_D5), CMD_PITCH, RGBF_D7, cmd_mask);
335             }
336
337             gdebug("iBlitRect end\n");
338             break;
339         }
340         case RTGCMD_BLITRECT_NOMASK_COMPLETE: {
341             // A0: BoardInfo *b, A1: RenderInfo *rs, A2: RenderInfo *rt,
342             // D0: WORD x, D1: WORD y, D2: WORD dx, D3: WORD dy, D4: WORD w, D5: WORD h,
343             // D6: UBYTE minterm, D7: RGBFTYPE format
344             gdebug("iBlitRectNoMaskComplete begin\n");
345
346             uint8_t minterm = (uint8_t)M68KR(M68K_REG_D6);
347             struct P96RenderInfo *rt = (struct P96RenderInfo *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
348
349             uint32_t src_addr = be32toh(r->_p_Memory);
350             uint32_t dst_addr = be32toh(rt->_p_Memory);
351
352             rtg_blitrect_nomask_complete(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), M68KR(M68K_REG_D4), M68KR(M68K_REG_D5),
353                                          CMD_PITCH, be16toh(rt->BytesPerRow), src_addr, dst_addr, RGBF_D7, minterm);
354
355             gdebug("iBlitRectNoMaskComplete end\n");
356             break;
357         }
358         default:
359             printf("[!!!IRTG] Unnkonw/unhandled iRTG command %d.\n", cmd);
360             break;
361     }
362 }
363
364 static void handle_rtg_command(uint32_t cmd) {
365   //printf("Handling RTG command %d (%.8X)\n", cmd, cmd);
366     switch (cmd) {
367         case RTGCMD_SETGC:
368             rtg_display_format = rtg_format;
369             rtg_display_width = rtg_x[0];
370             rtg_display_height = rtg_y[0];
371             if (rtg_u8[0]) {
372                 //rtg_pitch = rtg_display_width << rtg_format;
373                 framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << rtg_display_format) + (rtg_offset_y * rtg_pitch);
374                 rtg_total_rows = rtg_y[1];
375             }
376             else {
377                 //rtg_pitch = rtg_display_width << rtg_format;
378                 framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << rtg_display_format) + (rtg_offset_y * rtg_pitch);
379                 rtg_total_rows = rtg_y[1];
380             }
381             //printf("Set RTG mode:\n");
382             //printf("%dx%d pixels\n", rtg_display_width, rtg_display_height);
383             //printf("Pixel format: %s\n", rtg_format_names[rtg_display_format]);
384             break;
385         case RTGCMD_SETPAN:
386             //printf("Command: SetPan.\n");
387             rtg_offset_x = rtg_x[1];
388             rtg_offset_y = rtg_y[1];
389             rtg_pitch = (rtg_x[0] << rtg_display_format);
390             framebuffer_addr = rtg_address[0] - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
391             framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << rtg_display_format) + (rtg_offset_y * rtg_pitch);
392             break;
393         case RTGCMD_SETCLUT: {
394             //printf("Command: SetCLUT.\n");
395             //printf("Set palette entry %d to %d, %d, %d\n", rtg_u8[0], rtg_u8[1], rtg_u8[2], rtg_u8[3]);
396             //printf("Set palette entry %d to 32-bit palette color: %.8X\n", rtg_u8[0], rtg_rgb[0]);
397             rtg_set_clut_entry(rtg_u8[0], rtg_rgb[0]);
398             break;
399         }
400         case RTGCMD_SETDISPLAY:
401             //printf("RTG SetDisplay %s\n", (rtg_u8[1]) ? "enabled" : "disabled");
402             // I remeber wrongs.
403             //printf("Command: SetDisplay.\n");
404             break;
405         case RTGCMD_ENABLE:
406         case RTGCMD_SETSWITCH:
407             //printf("RTG SetSwitch %s\n", ((rtg_x[0]) & 0x01) ? "enabled" : "disabled");
408             //printf("LAL: %.4X\n", rtg_x[0]);
409             if (display_enabled != ((rtg_x[0]) & 0x01)) {
410                 display_enabled = ((rtg_x[0]) & 0x01);
411                 if (display_enabled) {
412                     rtg_init_display();
413                 }
414                 else
415                     rtg_shutdown_display();
416             }
417             break;
418         case RTGCMD_FILLRECT:
419             if (rtg_u8[0] == 0xFF || rtg_format != RTGFMT_8BIT) {
420                 rtg_fillrect_solid(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_rgb[0], rtg_x[2], rtg_format);
421                 gdebug("FillRect Solid\n");
422             }
423             else {
424                 rtg_fillrect(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_rgb[0], rtg_x[2], rtg_format, rtg_u8[0]);
425                 gdebug("FillRect Masked\n");
426             }
427             break;
428         case RTGCMD_INVERTRECT:
429             rtg_invertrect(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_format, rtg_u8[0]);
430             gdebug("InvertRect\n");
431             break;
432         case RTGCMD_BLITRECT:
433             if (rtg_u8[0] == 0xFF || rtg_format != RTGFMT_8BIT) {
434                 rtg_blitrect_solid(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[3], rtg_format);
435                 gdebug("BlitRect Solid\n");
436             }
437             else {
438                 rtg_blitrect(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[3], rtg_format, rtg_u8[0]);
439                 gdebug("BlitRect Masked\n");
440             }
441             break;
442         case RTGCMD_BLITRECT_NOMASK_COMPLETE:
443             rtg_blitrect_nomask_complete(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[3], rtg_x[4], rtg_address[0], rtg_address[1], rtg_format, rtg_u8[0]);
444             gdebug("BlitRectNoMaskComplete\n");
445             break;
446         case RTGCMD_BLITPATTERN:
447             rtg_blitpattern(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_address[0], rtg_rgb[0], rtg_rgb[1], rtg_x[3], rtg_format, rtg_x[2], rtg_y[2], rtg_u8[0], rtg_u8[1], rtg_u8[2]);
448             gdebug("BlitPattern\n");
449             return;
450         case RTGCMD_BLITTEMPLATE:
451             rtg_blittemplate(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_address[0], rtg_rgb[0], rtg_rgb[1], rtg_x[3], rtg_x[4], rtg_format, rtg_x[2], rtg_u8[0], rtg_u8[1]);
452             gdebug("BlitTemplate\n");
453             break;
454         case RTGCMD_DRAWLINE:
455             if (rtg_u8[0] == 0xFF && rtg_y[2] == 0xFFFF)
456                 rtg_drawline_solid(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_rgb[0], rtg_x[3], rtg_format);
457             else
458                 rtg_drawline(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[4], rtg_rgb[0], rtg_rgb[1], rtg_x[3], rtg_format, rtg_u8[0], rtg_u8[1]);
459             gdebug("DrawLine\n");
460             break;
461         case RTGCMD_P2C:
462             rtg_p2c(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_u8[1], rtg_u8[2], rtg_u8[0], (rtg_user[0] >> 0x8), rtg_x[4], (uint8_t *)&rtg_mem[rtg_address_adj[1]]);
463             gdebug("Planar2Chunky\n");
464             break;
465         case RTGCMD_P2D:
466             rtg_p2d(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_u8[1], rtg_u8[2], rtg_u8[0], (rtg_user[0] >> 0x8), rtg_x[4], (uint8_t *)&rtg_mem[rtg_address_adj[1]]);
467             gdebug("Planar2Direct\n");
468             break;
469         case RTGCMD_SETSPRITE:
470             rtg_enable_mouse_cursor();
471             gdebug("SetSprite\n");
472             break;
473         case RTGCMD_SETSPRITECOLOR:
474             rtg_set_cursor_clut_entry(rtg_u8[0], rtg_u8[1], rtg_u8[2], rtg_u8[3]);
475             gdebug("SetSpriteColor\n");
476             break;
477         case RTGCMD_SETSPRITEPOS:
478             rtg_set_mouse_cursor_pos((int16_t)rtg_x[0], (int16_t)rtg_y[0]);
479             gdebug("SetSpritePos\n");
480             break;
481         case RTGCMD_SETSPRITEIMAGE:
482             rtg_set_mouse_cursor_image(&rtg_mem[rtg_address_adj[1]], rtg_u8[0], rtg_u8[1]);
483             gdebug("SetSpriteImage\n");
484             break;
485         case RTGCMD_DEBUGME:
486             printf ("[RTG] DebugMe!\n");
487             break;
488         default:
489             printf("[!!!RTG] Unknown/unhandled RTG command %d ($%.4X)\n", cmd, cmd);
490             break;
491     }
492 }