1 // SPDX-License-Identifier: MIT
9 #include "config_file/config_file.h"
10 #include "gpio/ps_protocol.h"
11 #include "platforms/amiga/rtg/irtg_structs.h"
16 void rtg_p2c_ex(int16_t sx, int16_t sy, int16_t dx, int16_t dy, int16_t w, int16_t h, uint8_t minterm, struct BitMap *bm, uint8_t mask, uint16_t dst_pitch, uint16_t src_pitch);
19 uint16_t rtg_x[8], rtg_y[8];
22 uint32_t rtg_address[8];
23 uint32_t rtg_address_adj[8];
26 uint8_t display_enabled = 0xFF;
28 uint16_t rtg_display_width, rtg_display_height;
29 uint16_t rtg_display_format;
30 uint16_t rtg_pitch, rtg_total_rows;
31 uint16_t rtg_offset_x, rtg_offset_y;
33 uint8_t *rtg_mem; // FIXME
35 uint32_t framebuffer_addr = 0;
36 uint32_t framebuffer_addr_adj = 0;
38 static void handle_rtg_command(uint32_t cmd);
39 static void handle_irtg_command(uint32_t cmd);
41 uint8_t realtime_graphics_debug = 0;
42 extern int cpu_emulation_running;
43 extern struct emulator_config *cfg;
44 extern uint8_t rtg_on, rtg_enabled, rtg_output_in_vblank;
49 /*static const char *op_type_names[OP_TYPE_NUM] = {
56 static const char *rtg_format_names[RTGFMT_NUM] = {
67 int init_rtg_data(struct emulator_config *cfg_) {
68 rtg_mem = calloc(1, 40 * SIZE_MEGA);
70 printf("Failed to allocate RTG video memory.\n");
74 m68k_add_ram_range(PIGFX_RTG_BASE + PIGFX_REG_SIZE, 32 * SIZE_MEGA - PIGFX_REG_SIZE, rtg_mem);
75 add_mapping(cfg_, MAPTYPE_RAM_NOALLOC, PIGFX_RTG_BASE + PIGFX_REG_SIZE, 40 * SIZE_MEGA - PIGFX_REG_SIZE, -1, (char *)rtg_mem, "rtg_mem", 0);
80 printf("[RTG] Shutting down RTG.\n");
82 display_enabled = 0xFF;
91 unsigned int rtg_get_fb() {
92 return PIGFX_RTG_BASE + PIGFX_REG_SIZE + framebuffer_addr_adj;
95 uint8_t wait_vblank = 0;
96 uint32_t wait_rtg_frame = 0;
97 extern uint32_t cur_rtg_frame;
99 unsigned int rtg_read(uint32_t address, uint8_t mode) {
100 //printf("%s read from RTG: %.8X\n", op_type_names[mode], address);
101 if (address >= PIGFX_REG_SIZE) {
102 if (rtg_mem && (address - PIGFX_REG_SIZE) < PIGFX_UPPER) {
105 return (rtg_mem[address - PIGFX_REG_SIZE]);
108 return be16toh(*(( uint16_t *) (&rtg_mem[address - PIGFX_REG_SIZE])));
110 case OP_TYPE_LONGWORD:
111 return be32toh(*(( uint32_t *) (&rtg_mem[address - PIGFX_REG_SIZE])));
120 return rtg_enabled ? 0xFFCF : 0x0000;
123 if (!wait_vblank && cur_rtg_frame != wait_rtg_frame) {
124 wait_rtg_frame = cur_rtg_frame;
125 if (wait_rtg_frame == 0) {
126 wait_rtg_frame = cur_rtg_frame;
128 if (wait_rtg_frame == 0)
129 printf("Wait RTG frame was zero!\n");
132 if (cur_rtg_frame != wait_rtg_frame && wait_vblank) {
141 return !rtg_on || rtg_output_in_vblank;
149 struct timespec diff(struct timespec start, struct timespec end)
151 struct timespec temp;
152 if ((end.tv_nsec-start.tv_nsec)<0) {
153 temp.tv_sec = end.tv_sec-start.tv_sec-1;
154 temp.tv_nsec = 1000000000+end.tv_nsec-start.tv_nsec;
156 temp.tv_sec = end.tv_sec-start.tv_sec;
157 temp.tv_nsec = end.tv_nsec-start.tv_nsec;
162 #define CHKREG(a, b) case a: b = value; break;
164 void rtg_write(uint32_t address, uint32_t value, uint8_t mode) {
165 //printf("%s write to RTG: %.8X (%.8X)\n", op_type_names[mode], address, value);
166 if (address >= PIGFX_REG_SIZE) {
167 /*if ((address - PIGFX_REG_SIZE) < framebuffer_addr) {// || (address - PIGFX_REG_SIZE) > framebuffer_addr + ((rtg_display_width << rtg_display_format) * rtg_display_height)) {
168 printf("Write to RTG memory outside frame buffer %.8X (%.8X).\n", (address - PIGFX_REG_SIZE), framebuffer_addr);
170 if (rtg_mem && (address - PIGFX_REG_SIZE) < PIGFX_UPPER) {
173 rtg_mem[address - PIGFX_REG_SIZE] = value;
176 *(( uint16_t *) (&rtg_mem[address - PIGFX_REG_SIZE])) = htobe16(value);
178 case OP_TYPE_LONGWORD:
179 *(( uint32_t *) (&rtg_mem[address - PIGFX_REG_SIZE])) = htobe32(value);
185 } else if (address == RTG_DEBUGME) {
186 printf("RTG DEBUGME WRITE: %d.\n", value);
191 CHKREG(RTG_U81, rtg_u8[0]);
192 CHKREG(RTG_U82, rtg_u8[1]);
193 CHKREG(RTG_U83, rtg_u8[2]);
194 CHKREG(RTG_U84, rtg_u8[3]);
199 CHKREG(RTG_X1, rtg_x[0]);
200 CHKREG(RTG_X2, rtg_x[1]);
201 CHKREG(RTG_X3, rtg_x[2]);
202 CHKREG(RTG_X4, rtg_x[3]);
203 CHKREG(RTG_X5, rtg_x[4]);
204 CHKREG(RTG_Y1, rtg_y[0]);
205 CHKREG(RTG_Y2, rtg_y[1]);
206 CHKREG(RTG_Y3, rtg_y[2]);
207 CHKREG(RTG_Y4, rtg_y[3]);
208 CHKREG(RTG_Y5, rtg_y[4]);
209 CHKREG(RTG_U1, rtg_user[0]);
210 CHKREG(RTG_U2, rtg_user[1]);
211 CHKREG(RTG_FORMAT, rtg_format);
213 handle_rtg_command(value);
216 handle_irtg_command(value);
220 case OP_TYPE_LONGWORD:
223 rtg_address[0] = value;
224 rtg_address_adj[0] = value - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
227 rtg_address[1] = value;
228 rtg_address_adj[1] = value - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
230 CHKREG(RTG_ADDR3, rtg_address[2]);
231 CHKREG(RTG_ADDR4, rtg_address[3]);
232 CHKREG(RTG_RGB1, rtg_rgb[0]);
233 CHKREG(RTG_RGB2, rtg_rgb[1]);
242 #define gdebug(a) if (realtime_graphics_debug) { printf(a); m68k_end_timeslice(); cpu_emulation_running = 0; }
243 #define M68KR(a) m68k_get_reg(NULL, a)
244 #define RGBF_D7 rgbf_to_rtg[M68KR(M68K_REG_D7)]
245 #define CMD_PITCH be16toh(r->BytesPerRow)
247 static struct P96RenderInfo *r;
248 static struct P96BoardInfo *b;
249 static struct P96Line *ln;
250 static uint8_t cmd_mask;
252 static void handle_irtg_command(uint32_t cmd) {
253 b = (struct P96BoardInfo *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A0));
254 r = (struct P96RenderInfo *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A1));
257 case RTGCMD_SETPAN: {
258 // A0: struct BoardInfo *b, A1: UBYTE *addr, D0 UWORD width, D1: WORD x_offset, D2: WORD y_offset, D7: RGBFTYPE format
260 if (realtime_graphics_debug) {
261 printf("iSetPanning begin\n");
262 printf("IRTGCmd SetPanning\n");
263 printf("IRTGCmd x: %d y: %d w: %d (%d)\n", M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D0) << RGBF_D7, M68KR(M68K_REG_D0));
264 printf("BoardInfo: %.8X Addr: %.8X\n", M68KR(M68K_REG_A0), M68KR(M68K_REG_A1));
265 printf("BoardInfo Xoffs: %d Yoffs: %d\n", be16toh(b->XOffset), be16toh(b->YOffset));
270 b->XOffset = (int16_t)htobe16(M68KR(M68K_REG_D1));
271 b->YOffset = (int16_t)htobe16(M68KR(M68K_REG_D2));
273 rtg_offset_x = M68KR(M68K_REG_D1);
274 rtg_offset_y = M68KR(M68K_REG_D2);
275 rtg_pitch = (M68KR(M68K_REG_D0) << RGBF_D7);
276 framebuffer_addr = M68KR(M68K_REG_A1) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
277 framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << RGBF_D7) + (rtg_offset_y * rtg_pitch);
280 if (realtime_graphics_debug) {
281 printf("RTG OffsetX/Y: %d/%d\n", rtg_offset_x, rtg_offset_y);
282 printf("RTG Pitch: %d\n", rtg_pitch);
283 printf("RTG FBAddr/Adj: %.8X (%.8X)/%.8X\n", framebuffer_addr, M68KR(M68K_REG_A1), framebuffer_addr_adj);
284 printf("iSetPanning End\n");
290 case RTGCMD_DRAWLINE: {
291 // A0: struct BoardInfo *b, A1: RenderInfo *r A2: struct Line *l, D0: UBYTE mask, D7: RGBFTYPE format
292 gdebug("iDrawLine begin\n");
293 ln = (struct P96Line *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
295 if (!ln || !r) break;
297 cmd_mask = (uint8_t)M68KR(M68K_REG_D0);
298 rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
300 if (cmd_mask == 0xFF && be16toh(ln->LinePtrn) == 0xFFFF) {
301 rtg_drawline_solid(be16toh(ln->X), be16toh(ln->Y), be16toh(ln->dX), be16toh(ln->dY),
302 be16toh(ln->Length), be32toh(ln->FgPen), CMD_PITCH, RGBF_D7);
304 rtg_drawline(be16toh(ln->X), be16toh(ln->Y), be16toh(ln->dX), be16toh(ln->dY),
305 be16toh(ln->Length), be16toh(ln->LinePtrn), be16toh(ln->PatternShift),
306 be32toh(ln->FgPen), be32toh(ln->BgPen), CMD_PITCH,
307 RGBF_D7, cmd_mask, ln->DrawMode);
309 gdebug("iDrawLine end\n");
312 case RTGCMD_FILLRECT: {
313 // A0: BoardInfo *b, A1: RenderInfo *r
314 // D0 WORD x, D1: WORD y, D2: WORD w, D3: WORD h
315 // D4: ULONG color, D5: UBYTE mask, D7: RGBFTYPE format
316 gdebug("iFillRect begin\n");
318 if (realtime_graphics_debug) {
319 DEBUG("X1/X2: %d/%d-> X2/Y2: %d/%d\n", (int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3));
320 DEBUG("R: %.8X B: %.8X\n", M68KR(M68K_REG_A0), M68KR(M68K_REG_A1));
326 cmd_mask = (uint8_t)M68KR(M68K_REG_D5);
327 rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
329 if (cmd_mask == 0xFF) {
330 rtg_fillrect_solid((int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3),
331 M68KR(M68K_REG_D4), CMD_PITCH, RGBF_D7);
333 rtg_fillrect((int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3),
334 M68KR(M68K_REG_D4), CMD_PITCH, RGBF_D7, cmd_mask);
336 gdebug("iFillRect end\n");
339 case RTGCMD_INVERTRECT: {
340 // A0: BoardInfo *b, A1: RenderInfo *r
341 // D0 WORD x, D1: WORD y, D2: WORD w, D3: WORD h
342 // D4: UBYTE mask, D7: RGBFTYPE format
343 gdebug("iInvertRect begin\n");
346 cmd_mask = (uint8_t)M68KR(M68K_REG_D4);
347 rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
349 rtg_invertrect((int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3), CMD_PITCH, RGBF_D7, cmd_mask);
350 gdebug("iInvertRect end\n");
353 case RTGCMD_BLITRECT: {
354 // A0: BoardInfo *b, A1: RenderInfo *r)
355 // D0: WORD x, D1: WORD y, D2: WORD dx, D3: WORD dy, D4: WORD w, D5: WORD h,
356 // D6: UBYTE mask, D7: RGBFTYPE format
357 gdebug("iBlitRect begin\n");
359 cmd_mask = (uint8_t)M68KR(M68K_REG_D6);
360 rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
362 if (cmd_mask == 0xFF) {
363 rtg_blitrect_solid(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), M68KR(M68K_REG_D4), M68KR(M68K_REG_D5), CMD_PITCH, RGBF_D7);
365 rtg_blitrect(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), M68KR(M68K_REG_D4), M68KR(M68K_REG_D5), CMD_PITCH, RGBF_D7, cmd_mask);
368 gdebug("iBlitRect end\n");
371 case RTGCMD_BLITRECT_NOMASK_COMPLETE: {
372 // A0: BoardInfo *b, A1: RenderInfo *rs, A2: RenderInfo *rt,
373 // D0: WORD x, D1: WORD y, D2: WORD dx, D3: WORD dy, D4: WORD w, D5: WORD h,
374 // D6: UBYTE minterm, D7: RGBFTYPE format
375 gdebug("iBlitRectNoMaskComplete begin\n");
377 uint8_t minterm = (uint8_t)M68KR(M68K_REG_D6);
378 struct P96RenderInfo *rt = (struct P96RenderInfo *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
380 uint32_t src_addr = be32toh(r->_p_Memory);
381 uint32_t dst_addr = be32toh(rt->_p_Memory);
383 rtg_blitrect_nomask_complete(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), M68KR(M68K_REG_D4), M68KR(M68K_REG_D5),
384 CMD_PITCH, be16toh(rt->BytesPerRow), src_addr, dst_addr, RGBF_D7, minterm);
386 gdebug("iBlitRectNoMaskComplete end\n");
389 case RTGCMD_BLITTEMPLATE: {
390 // A0: BoardInfo *b, A1: RenderInfo *r, A2: Template *t
391 // D0: WORD x, D1: WORD y, D2: WORD w, D3: WORD h
392 // D4: UBYTE mask, D7: RGBFTYPE format
393 if (!r || !M68KR(M68K_REG_A2))
395 gdebug("iBlitTemplate begin\n");
397 uint16_t t_pitch = 0, x_offset = 0;
398 uint32_t src_addr = M68KR(M68K_REG_A2);
399 uint32_t fgcol = 0, bgcol = 0;
400 uint8_t draw_mode = 0;
402 struct P96Template *t = (struct P96Template *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
404 t_pitch = be16toh(t->BytesPerRow);
405 fgcol = be32toh(t->FgPen);
406 bgcol = be32toh(t->BgPen);
407 x_offset = t->XOffset;
408 draw_mode = t->DrawMode;
409 src_addr = be32toh(t->_p_Memory);
411 t_pitch = be16toh(ps_read_16(src_addr + (uint32_t)&t->BytesPerRow));
412 fgcol = be32toh(ps_read_32(src_addr + (uint32_t)&t->FgPen));
413 bgcol = be32toh(ps_read_32(src_addr + (uint32_t)&t->BgPen));
414 x_offset = ps_read_8(src_addr + (uint32_t)&t->XOffset);
415 draw_mode = ps_read_8(src_addr + (uint32_t)&t->DrawMode);
416 src_addr = be32toh(ps_read_32(src_addr + (uint32_t)&t->_p_Memory));
419 cmd_mask = (uint8_t)M68KR(M68K_REG_D4);
420 rtg_address[1] = be32toh(r->_p_Memory);
421 rtg_address_adj[1] = rtg_address[1] - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
423 rtg_blittemplate(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), src_addr, fgcol, bgcol, CMD_PITCH, t_pitch, RGBF_D7, x_offset, cmd_mask, draw_mode);
424 gdebug("iBlitTemplate end\n");
427 case RTGCMD_BLITPATTERN: {
428 // A0: BoardInfo *b, A1: RenderInfo *r, A2: Pattern *p
429 // D0: WORD x, D1: WORD y, D2: WORD w, D3: WORD h
430 // D4: UBYTE mask, D7: RGBFTYPE format
431 if (!r || !M68KR(M68K_REG_A2))
433 gdebug("iBlitPattern begin\n");
435 uint16_t x_offset = 0, y_offset = 0;
436 uint32_t src_addr = M68KR(M68K_REG_A2);
437 uint32_t fgcol = 0, bgcol = 0;
438 uint8_t draw_mode = 0, loop_rows = 0;
440 struct P96Pattern *p = (struct P96Pattern *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
442 fgcol = be32toh(p->FgPen);
443 bgcol = be32toh(p->BgPen);
444 x_offset = be16toh(p->XOffset);
445 y_offset = be16toh(p->YOffset);
446 draw_mode = p->DrawMode;
447 loop_rows = 1 << p->Size;
448 src_addr = be32toh(p->_p_Memory);
450 fgcol = be32toh(ps_read_32(src_addr + (uint32_t)&p->FgPen));
451 bgcol = be32toh(ps_read_32(src_addr + (uint32_t)&p->BgPen));
452 x_offset = be16toh(ps_read_16(src_addr + (uint32_t)&p->XOffset));
453 y_offset = be16toh(ps_read_16(src_addr + (uint32_t)&p->YOffset));
454 draw_mode = ps_read_8(src_addr + (uint32_t)&p->DrawMode);
455 loop_rows = 1 << ps_read_8(src_addr + (uint32_t)&p->Size);
456 src_addr = be32toh(p->_p_Memory);
459 cmd_mask = (uint8_t)M68KR(M68K_REG_D4);
460 rtg_address[1] = be32toh(r->_p_Memory);
461 rtg_address_adj[1] = rtg_address[1] - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
463 rtg_blitpattern(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), src_addr, fgcol, bgcol, CMD_PITCH, RGBF_D7, x_offset, y_offset, cmd_mask, draw_mode, loop_rows);
464 gdebug("iBlitPattern end\n");
468 // A0: BoardInfo, A1: BitMap *bm, A2: RenderInfo *r,
469 // D0: SHORT x, D1: SHORT y, D2: SHORT dx, D3: SHORT dy, D4: SHORT w, D5: SHORT h,
470 // D6: UBYTE minterm, D7: UBYTE mask
471 r = (struct P96RenderInfo *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
472 struct BitMap *bm = (struct BitMap *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A1));
476 gdebug("iP2C begin\n");
479 printf ("Help! BitMap not in mapped memory.\n");
482 gdebug("Data is available in mapped memory.\n");
485 if (realtime_graphics_debug) {
486 printf("bm: %.8X r: %.8X\n", (uint32_t)bm, (uint32_t)r);
488 printf("bm pitch: %d\n", be16toh(bm->BytesPerRow));
490 printf("r pitch: %d\n", be16toh(r->BytesPerRow));
493 uint16_t bmp_pitch = be16toh(bm->BytesPerRow);
494 uint16_t line_pitch = be16toh(r->BytesPerRow);
495 rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
497 uint8_t minterm = (uint8_t)M68KR(M68K_REG_D6);
498 cmd_mask = (uint8_t)M68KR(M68K_REG_D7);
500 rtg_p2c_ex(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), M68KR(M68K_REG_D4), M68KR(M68K_REG_D5), minterm, bm, cmd_mask, line_pitch, bmp_pitch);
501 gdebug("iP2C end\n");
505 printf("[!!!IRTG] Unnkonw/unhandled iRTG command %d.\n", cmd);
510 static void handle_rtg_command(uint32_t cmd) {
511 //printf("Handling RTG command %d (%.8X)\n", cmd, cmd);
515 rtg_display_format = rtg_format;
516 rtg_display_width = rtg_x[0];
517 rtg_display_height = rtg_y[0];
519 //rtg_pitch = rtg_display_width << rtg_format;
520 framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << rtg_display_format) + (rtg_offset_y * rtg_pitch);
521 rtg_total_rows = rtg_y[1];
524 //rtg_pitch = rtg_display_width << rtg_format;
525 framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << rtg_display_format) + (rtg_offset_y * rtg_pitch);
526 rtg_total_rows = rtg_y[1];
528 if (realtime_graphics_debug) {
529 printf("Set RTG mode:\n");
530 printf("%dx%d pixels\n", rtg_display_width, rtg_display_height);
532 printf("Pixel format: %s\n", rtg_format_names[rtg_display_format]);
537 //printf("Command: SetPan.\n");
538 rtg_offset_x = rtg_x[1];
539 rtg_offset_y = rtg_y[1];
540 rtg_pitch = (rtg_x[0] << rtg_display_format);
541 framebuffer_addr = rtg_address[0] - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
542 framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << rtg_display_format) + (rtg_offset_y * rtg_pitch);
544 case RTGCMD_SETCLUT: {
545 //printf("Command: SetCLUT.\n");
546 //printf("Set palette entry %d to %d, %d, %d\n", rtg_u8[0], rtg_u8[1], rtg_u8[2], rtg_u8[3]);
547 //printf("Set palette entry %d to 32-bit palette color: %.8X\n", rtg_u8[0], rtg_rgb[0]);
548 rtg_set_clut_entry(rtg_u8[0], rtg_rgb[0]);
551 case RTGCMD_SETDISPLAY:
552 gdebug("SetDisplay\n");
553 if (realtime_graphics_debug) {
554 printf("RTG SetDisplay %s\n", (rtg_u8[1]) ? "enabled" : "disabled");
558 case RTGCMD_SETSWITCH:
559 gdebug("SetSwitch\n");
560 if (realtime_graphics_debug) {
561 printf("RTG SetSwitch %s\n", ((rtg_x[0]) & 0x01) ? "enabled" : "disabled");
562 printf("LAL: %.4X\n", rtg_x[0]);
564 display_enabled = ((rtg_x[0]) & 0x01);
565 if (display_enabled != rtg_on) {
566 rtg_on = display_enabled;
570 rtg_shutdown_display();
573 case RTGCMD_FILLRECT:
574 if (rtg_u8[0] == 0xFF || rtg_format != RTGFMT_8BIT) {
575 rtg_fillrect_solid(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_rgb[0], rtg_x[2], rtg_format);
576 gdebug("FillRect Solid\n");
579 rtg_fillrect(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_rgb[0], rtg_x[2], rtg_format, rtg_u8[0]);
580 gdebug("FillRect Masked\n");
583 case RTGCMD_INVERTRECT:
584 rtg_invertrect(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_format, rtg_u8[0]);
585 gdebug("InvertRect\n");
587 case RTGCMD_BLITRECT:
588 if (rtg_u8[0] == 0xFF || rtg_format != RTGFMT_8BIT) {
589 rtg_blitrect_solid(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[3], rtg_format);
590 gdebug("BlitRect Solid\n");
593 rtg_blitrect(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[3], rtg_format, rtg_u8[0]);
594 gdebug("BlitRect Masked\n");
597 case RTGCMD_BLITRECT_NOMASK_COMPLETE:
598 rtg_blitrect_nomask_complete(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[3], rtg_x[4], rtg_address[0], rtg_address[1], rtg_format, rtg_u8[0]);
599 gdebug("BlitRectNoMaskComplete\n");
601 case RTGCMD_BLITPATTERN:
602 rtg_blitpattern(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_address[0], rtg_rgb[0], rtg_rgb[1], rtg_x[3], rtg_format, rtg_x[2], rtg_y[2], rtg_u8[0], rtg_u8[1], rtg_u8[2]);
603 gdebug("BlitPattern\n");
605 case RTGCMD_BLITTEMPLATE:
606 rtg_blittemplate(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_address[0], rtg_rgb[0], rtg_rgb[1], rtg_x[3], rtg_x[4], rtg_format, rtg_x[2], rtg_u8[0], rtg_u8[1]);
607 gdebug("BlitTemplate\n");
609 case RTGCMD_DRAWLINE:
610 if (rtg_u8[0] == 0xFF && rtg_y[2] == 0xFFFF)
611 rtg_drawline_solid(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_rgb[0], rtg_x[3], rtg_format);
613 rtg_drawline(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[4], rtg_rgb[0], rtg_rgb[1], rtg_x[3], rtg_format, rtg_u8[0], rtg_u8[1]);
614 gdebug("DrawLine\n");
617 rtg_p2c(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_u8[1], rtg_u8[2], rtg_u8[0], (rtg_user[0] >> 0x8), rtg_x[4], (uint8_t *)&rtg_mem[rtg_address_adj[1]]);
618 gdebug("Planar2Chunky\n");
621 rtg_p2d(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_u8[1], rtg_u8[2], rtg_u8[0], (rtg_user[0] >> 0x8), rtg_x[4], (uint8_t *)&rtg_mem[rtg_address_adj[1]]);
622 gdebug("Planar2Direct\n");
624 case RTGCMD_SETSPRITE:
625 rtg_enable_mouse_cursor();
626 gdebug("SetSprite\n");
628 case RTGCMD_SETSPRITECOLOR:
629 rtg_set_cursor_clut_entry(rtg_u8[0], rtg_u8[1], rtg_u8[2], rtg_u8[3]);
630 gdebug("SetSpriteColor\n");
632 case RTGCMD_SETSPRITEPOS:
633 rtg_set_mouse_cursor_pos((int16_t)rtg_x[0], (int16_t)rtg_y[0]);
634 gdebug("SetSpritePos\n");
636 case RTGCMD_SETSPRITEIMAGE:
637 rtg_set_mouse_cursor_image(&rtg_mem[rtg_address_adj[1]], rtg_u8[0], rtg_u8[1]);
638 gdebug("SetSpriteImage\n");
641 printf ("[RTG] DebugMe!\n");
644 printf("[!!!RTG] Unknown/unhandled RTG command %d ($%.4X)\n", cmd, cmd);