git.sesse.net Git - pistorm/blob - platforms/amiga/rtg/rtg.c

   1 // SPDX-License-Identifier: MIT
   2
   3 #include <stdint.h>
   4 #include <endian.h>
   5 #include <stdio.h>
   6 #include <stdlib.h>
   7 #include <string.h>
   8 #include <time.h>
   9 #include "irtg_structs.h"
  10 #include "config_file/config_file.h"
  11 #include "gpio/ps_protocol.h"
  12 #include "rtg.h"
  13
  14 #include "m68k.h"
  15
  16 uint8_t rtg_u8[4];
  17 uint16_t rtg_x[8], rtg_y[8];
  18 uint16_t rtg_user[8];
  19 uint16_t rtg_format;
  20 uint32_t rtg_address[8];
  21 uint32_t rtg_address_adj[8];
  22 uint32_t rtg_rgb[8];
  23
  24 static uint8_t display_enabled = 0xFF;
  25
  26 uint16_t rtg_display_width, rtg_display_height;
  27 uint16_t rtg_display_format;
  28 uint16_t rtg_pitch, rtg_total_rows;
  29 uint16_t rtg_offset_x, rtg_offset_y;
  30
  31 uint8_t *rtg_mem; // FIXME
  32
  33 uint32_t framebuffer_addr = 0;
  34 uint32_t framebuffer_addr_adj = 0;
  35
  36 static void handle_rtg_command(uint32_t cmd);
  37 static void handle_irtg_command(uint32_t cmd);
  38
  39 uint8_t realtime_graphics_debug = 0;
  40 extern int cpu_emulation_running;
  41 extern struct emulator_config *cfg;
  42 extern uint8_t rtg_on;
  43
  44 //#define DEBUG_RTG
  45
  46 #ifdef DEBUG_RTG
  47 /*static const char *op_type_names[OP_TYPE_NUM] = {
  48     "BYTE",
  49     "WORD",
  50     "LONGWORD",
  51     "MEM",
  52 };*/
  53
  54 /*static const char *rtg_format_names[RTGFMT_NUM] = {
  55     "8BPP CLUT",
  56     "16BPP RGB (565)",
  57     "32BPP RGB (RGBA)",
  58     "15BPP RGB (555)",
  59 };*/
  60 #define DEBUG printf
  61 #else
  62 #define DEBUG(...)
  63 #endif
  64
  65 int init_rtg_data(struct emulator_config *cfg_) {
  66     rtg_mem = calloc(1, 40 * SIZE_MEGA);
  67     if (!rtg_mem) {
  68         printf("Failed to allocate RTG video memory.\n");
  69         return 0;
  70     }
  71
  72     m68k_add_ram_range(PIGFX_RTG_BASE + PIGFX_REG_SIZE, 32 * SIZE_MEGA - PIGFX_REG_SIZE, rtg_mem);
  73     add_mapping(cfg_, MAPTYPE_RAM_NOALLOC, PIGFX_RTG_BASE + PIGFX_REG_SIZE, 40 * SIZE_MEGA - PIGFX_REG_SIZE, -1, (char *)rtg_mem, "rtg_mem", 0);
  74     return 1;
  75 }
  76
  77 void shutdown_rtg() {
  78     printf("[RTG] Shutting down RTG.\n");
  79     if (rtg_on) {
  80         rtg_on = 0;
  81     }
  82     if (rtg_mem) {
  83
  84         free(rtg_mem);
  85         rtg_mem = NULL;
  86     }
  87 }
  88
  89 unsigned int rtg_get_fb() {
  90     return PIGFX_RTG_BASE + PIGFX_REG_SIZE + framebuffer_addr_adj;
  91 }
  92
  93 unsigned int rtg_read(uint32_t address, uint8_t mode) {
  94     //printf("%s read from RTG: %.8X\n", op_type_names[mode], address);
  95     if (address == RTG_COMMAND) {
  96         return 0xFFCF;
  97     }
  98     if (address >= PIGFX_REG_SIZE) {
  99         if (rtg_mem && (address - PIGFX_REG_SIZE) < PIGFX_UPPER) {
 100             switch (mode) {
 101                 case OP_TYPE_BYTE:
 102                     return (rtg_mem[address - PIGFX_REG_SIZE]);
 103                     break;
 104                 case OP_TYPE_WORD:
 105                     return be16toh(*(( uint16_t *) (&rtg_mem[address - PIGFX_REG_SIZE])));
 106                     break;
 107                 case OP_TYPE_LONGWORD:
 108                     return be32toh(*(( uint32_t *) (&rtg_mem[address - PIGFX_REG_SIZE])));
 109                     break;
 110                 default:
 111                     return 0;
 112             }
 113         }
 114     }
 115
 116     return 0;
 117 }
 118
 119 struct timespec diff(struct timespec start, struct timespec end)
 120 {
 121     struct timespec temp;
 122     if ((end.tv_nsec-start.tv_nsec)<0) {
 123         temp.tv_sec = end.tv_sec-start.tv_sec-1;
 124         temp.tv_nsec = 1000000000+end.tv_nsec-start.tv_nsec;
 125     } else {
 126         temp.tv_sec = end.tv_sec-start.tv_sec;
 127         temp.tv_nsec = end.tv_nsec-start.tv_nsec;
 128     }
 129     return temp;
 130 }
 131
 132 #define CHKREG(a, b) case a: b = value; break;
 133
 134 void rtg_write(uint32_t address, uint32_t value, uint8_t mode) {
 135     //printf("%s write to RTG: %.8X (%.8X)\n", op_type_names[mode], address, value);
 136     if (address >= PIGFX_REG_SIZE) {
 137         /*if ((address - PIGFX_REG_SIZE) < framebuffer_addr) {// || (address - PIGFX_REG_SIZE) > framebuffer_addr + ((rtg_display_width << rtg_display_format) * rtg_display_height)) {
 138             printf("Write to RTG memory outside frame buffer %.8X (%.8X).\n", (address - PIGFX_REG_SIZE), framebuffer_addr);
 139         }*/
 140         if (rtg_mem && (address - PIGFX_REG_SIZE) < PIGFX_UPPER) {
 141             switch (mode) {
 142                 case OP_TYPE_BYTE:
 143                     rtg_mem[address - PIGFX_REG_SIZE] = value;
 144                     break;
 145                 case OP_TYPE_WORD:
 146                     *(( uint16_t *) (&rtg_mem[address - PIGFX_REG_SIZE])) = htobe16(value);
 147                     break;
 148                 case OP_TYPE_LONGWORD:
 149                     *(( uint32_t *) (&rtg_mem[address - PIGFX_REG_SIZE])) = htobe32(value);
 150                     break;
 151                 default:
 152                     return;
 153             }
 154         }
 155     } else if (address == RTG_DEBUGME) {
 156         printf("RTG DEBUGME WRITE: %d.\n", value);
 157     } else {
 158         switch (mode) {
 159             case OP_TYPE_BYTE:
 160                 switch (address) {
 161                     CHKREG(RTG_U81, rtg_u8[0]);
 162                     CHKREG(RTG_U82, rtg_u8[1]);
 163                     CHKREG(RTG_U83, rtg_u8[2]);
 164                     CHKREG(RTG_U84, rtg_u8[3]);
 165                 }
 166                 break;
 167             case OP_TYPE_WORD:
 168                 switch (address) {
 169                     CHKREG(RTG_X1, rtg_x[0]);
 170                     CHKREG(RTG_X2, rtg_x[1]);
 171                     CHKREG(RTG_X3, rtg_x[2]);
 172                     CHKREG(RTG_X4, rtg_x[3]);
 173                     CHKREG(RTG_X5, rtg_x[4]);
 174                     CHKREG(RTG_Y1, rtg_y[0]);
 175                     CHKREG(RTG_Y2, rtg_y[1]);
 176                     CHKREG(RTG_Y3, rtg_y[2]);
 177                     CHKREG(RTG_Y4, rtg_y[3]);
 178                     CHKREG(RTG_Y5, rtg_y[4]);
 179                     CHKREG(RTG_U1, rtg_user[0]);
 180                     CHKREG(RTG_U2, rtg_user[1]);
 181                     CHKREG(RTG_FORMAT, rtg_format);
 182                     case RTG_COMMAND:
 183                         handle_rtg_command(value);
 184                         break;
 185                     case IRTG_COMMAND:
 186                         handle_irtg_command(value);
 187                         break;
 188                 }
 189                 break;
 190             case OP_TYPE_LONGWORD:
 191                 switch (address) {
 192                     case RTG_ADDR1:
 193                         rtg_address[0] = value;
 194                         rtg_address_adj[0] = value - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
 195                         break;
 196                     case RTG_ADDR2:
 197                         rtg_address[1] = value;
 198                         rtg_address_adj[1] = value - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
 199                         break;
 200                     CHKREG(RTG_ADDR3, rtg_address[2]);
 201                     CHKREG(RTG_ADDR4, rtg_address[3]);
 202                     CHKREG(RTG_RGB1, rtg_rgb[0]);
 203                     CHKREG(RTG_RGB2, rtg_rgb[1]);
 204                 }
 205                 break;
 206         }
 207     }
 208
 209     return;
 210 }
 211
 212 #define gdebug(a) if (realtime_graphics_debug) { printf(a); m68k_end_timeslice(); cpu_emulation_running = 0; }
 213 #define M68KR(a) m68k_get_reg(NULL, a)
 214 #define RGBF_D7 rgbf_to_rtg[M68KR(M68K_REG_D7)]
 215 #define CMD_PITCH be16toh(r->BytesPerRow)
 216
 217 static struct P96RenderInfo *r;
 218 static struct P96BoardInfo *b;
 219 static struct P96Line *ln;
 220 static uint8_t cmd_mask;
 221
 222 static void handle_irtg_command(uint32_t cmd) {
 223     b = (struct P96BoardInfo *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A0));
 224     r = (struct P96RenderInfo *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A1));
 225
 226     switch (cmd) {
 227         case RTGCMD_SETPAN: {
 228             // A0: struct BoardInfo *b, A1: UBYTE *addr, D0 UWORD width, D1: WORD x_offset, D2: WORD y_offset, D7: RGBFTYPE format
 229 #ifdef DEBUG_RTG
 230             if (realtime_graphics_debug) {
 231                 printf("iSetPanning begin\n");
 232                 printf("IRTGCmd SetPanning\n");
 233                 printf("IRTGCmd x: %d y: %d w: %d (%d)\n", M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D0) << RGBF_D7, M68KR(M68K_REG_D0));
 234                 printf("BoardInfo: %.8X Addr: %.8X\n", M68KR(M68K_REG_A0), M68KR(M68K_REG_A1));
 235                 printf("BoardInfo Xoffs: %d Yoffs: %d\n", be16toh(b->XOffset), be16toh(b->YOffset));
 236             }
 237 #endif
 238             if (!b) break;
 239
 240             b->XOffset = (int16_t)htobe16(M68KR(M68K_REG_D1));
 241             b->YOffset = (int16_t)htobe16(M68KR(M68K_REG_D2));
 242
 243             rtg_offset_x = M68KR(M68K_REG_D1);
 244             rtg_offset_y = M68KR(M68K_REG_D2);
 245             rtg_pitch = (M68KR(M68K_REG_D0) << RGBF_D7);
 246             framebuffer_addr = M68KR(M68K_REG_A1) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
 247             framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << RGBF_D7) + (rtg_offset_y * rtg_pitch);
 248
 249 #ifdef DEBUG_RTG
 250             if (realtime_graphics_debug) {
 251                 printf("RTG OffsetX/Y: %d/%d\n", rtg_offset_x, rtg_offset_y);
 252                 printf("RTG Pitch: %d\n", rtg_pitch);
 253                 printf("RTG FBAddr/Adj: %.8X (%.8X)/%.8X\n", framebuffer_addr, M68KR(M68K_REG_A1), framebuffer_addr_adj);
 254                 printf("iSetPanning End\n");
 255             }
 256 #endif
 257
 258             break;
 259         }
 260         case RTGCMD_DRAWLINE: {
 261             // A0: struct BoardInfo *b, A1: RenderInfo *r A2: struct Line *l, D0: UBYTE mask, D7: RGBFTYPE format
 262             gdebug("iDrawLine begin\n");
 263             ln = (struct P96Line *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
 264
 265             if (!ln || !r) break;
 266
 267             cmd_mask = (uint8_t)M68KR(M68K_REG_D0);
 268             rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
 269
 270             if (cmd_mask == 0xFF && be16toh(ln->LinePtrn) == 0xFFFF) {
 271                 rtg_drawline_solid(be16toh(ln->X), be16toh(ln->Y), be16toh(ln->dX), be16toh(ln->dY),
 272                                    be16toh(ln->Length), be32toh(ln->FgPen), CMD_PITCH, RGBF_D7);
 273             } else {
 274                 rtg_drawline(be16toh(ln->X), be16toh(ln->Y), be16toh(ln->dX), be16toh(ln->dY),
 275                              be16toh(ln->Length), be16toh(ln->LinePtrn), be16toh(ln->PatternShift),
 276                              be32toh(ln->FgPen), be32toh(ln->BgPen), CMD_PITCH,
 277                              RGBF_D7, cmd_mask, ln->DrawMode);
 278             }
 279             gdebug("iDrawLine end\n");
 280             break;
 281         }
 282         case RTGCMD_FILLRECT: {
 283             // A0: BoardInfo *b, A1: RenderInfo *r
 284             // D0 WORD x, D1: WORD y, D2: WORD w, D3: WORD h
 285             // D4: ULONG color, D5: UBYTE mask, D7: RGBFTYPE format
 286             gdebug("iFillRect begin\n");
 287 #ifdef DEBUG_RTG
 288             if (realtime_graphics_debug) {
 289                 DEBUG("X1/X2: %d/%d-> X2/Y2: %d/%d\n", (int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3));
 290                 DEBUG("R: %.8X B: %.8X\n", M68KR(M68K_REG_A0), M68KR(M68K_REG_A1));
 291             }
 292 #endif
 293
 294             if (!b || !r) break;
 295
 296             cmd_mask = (uint8_t)M68KR(M68K_REG_D5);
 297             rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
 298
 299             if (cmd_mask == 0xFF) {
 300                 rtg_fillrect_solid((int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3),
 301                                    M68KR(M68K_REG_D4), CMD_PITCH, RGBF_D7);
 302             } else {
 303                 rtg_fillrect((int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3),
 304                              M68KR(M68K_REG_D4), CMD_PITCH, RGBF_D7, cmd_mask);
 305             }
 306             gdebug("iFillRect end\n");
 307             break;
 308         }
 309         case RTGCMD_INVERTRECT: {
 310             // A0: BoardInfo *b, A1: RenderInfo *r
 311             // D0 WORD x, D1: WORD y, D2: WORD w, D3: WORD h
 312             // D4: UBYTE mask, D7: RGBFTYPE format
 313             gdebug("iInvertRect begin\n");
 314             if (!b || !r) break;
 315
 316             cmd_mask = (uint8_t)M68KR(M68K_REG_D4);
 317             rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
 318
 319             rtg_invertrect((int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3), CMD_PITCH, RGBF_D7, cmd_mask);
 320             gdebug("iInvertRect end\n");
 321             break;
 322         }
 323         case RTGCMD_BLITRECT: {
 324             // A0: BoardInfo *b, A1: RenderInfo *r)
 325             // D0: WORD x, D1: WORD y, D2: WORD dx, D3: WORD dy, D4: WORD w, D5: WORD h,
 326             // D6: UBYTE mask, D7: RGBFTYPE format
 327             gdebug("iBlitRect begin\n");
 328
 329             cmd_mask = (uint8_t)M68KR(M68K_REG_D6);
 330             rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
 331
 332             if (cmd_mask == 0xFF) {
 333                 rtg_blitrect_solid(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), M68KR(M68K_REG_D4), M68KR(M68K_REG_D5), CMD_PITCH, RGBF_D7);
 334             } else {
 335                 rtg_blitrect(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), M68KR(M68K_REG_D4), M68KR(M68K_REG_D5), CMD_PITCH, RGBF_D7, cmd_mask);
 336             }
 337
 338             gdebug("iBlitRect end\n");
 339             break;
 340         }
 341         case RTGCMD_BLITRECT_NOMASK_COMPLETE: {
 342             // A0: BoardInfo *b, A1: RenderInfo *rs, A2: RenderInfo *rt,
 343             // D0: WORD x, D1: WORD y, D2: WORD dx, D3: WORD dy, D4: WORD w, D5: WORD h,
 344             // D6: UBYTE minterm, D7: RGBFTYPE format
 345             gdebug("iBlitRectNoMaskComplete begin\n");
 346
 347             uint8_t minterm = (uint8_t)M68KR(M68K_REG_D6);
 348             struct P96RenderInfo *rt = (struct P96RenderInfo *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
 349
 350             uint32_t src_addr = be32toh(r->_p_Memory);
 351             uint32_t dst_addr = be32toh(rt->_p_Memory);
 352
 353             rtg_blitrect_nomask_complete(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), M68KR(M68K_REG_D4), M68KR(M68K_REG_D5),
 354                                          CMD_PITCH, be16toh(rt->BytesPerRow), src_addr, dst_addr, RGBF_D7, minterm);
 355
 356             gdebug("iBlitRectNoMaskComplete end\n");
 357             break;
 358         }
 359         case RTGCMD_BLITTEMPLATE: {
 360             // A0: BoardInfo *b, A1: RenderInfo *r, A2 Template *t
 361             // D0: WORD x, D1: WORD y, D2: WORD w, D3: WORD h
 362             // D4: UBYTE mask, D7: RGBFTYPE format
 363             if (!r)
 364                 break;
 365
 366             uint16_t t_pitch = 0, x_offset = 0;
 367             uint32_t src_addr = M68KR(M68K_REG_A2);
 368             uint32_t fgcol = 0, bgcol = 0;
 369             uint8_t draw_mode = 0;
 370
 371             struct P96Template *t = (struct P96Template *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
 372             if (t) {
 373                 t_pitch = be16toh(t->BytesPerRow);
 374                 fgcol = be32toh(t->FgPen);
 375                 bgcol = be32toh(t->BgPen);
 376                 x_offset = be16toh(t->XOffset);
 377                 draw_mode = t->DrawMode;
 378                 src_addr = be32toh(t->_p_Memory);
 379             } else {
 380                 t_pitch = be16toh(ps_read_16(src_addr + (uint32_t)&t->BytesPerRow));
 381                 fgcol = be32toh(ps_read_32(src_addr + (uint32_t)&t->FgPen));
 382                 bgcol = be32toh(ps_read_32(src_addr + (uint32_t)&t->BgPen));
 383                 x_offset = be16toh(ps_read_16(src_addr + (uint32_t)&t->XOffset));
 384                 draw_mode = ps_read_8(src_addr + (uint32_t)&t->DrawMode);
 385                 src_addr = be32toh(ps_read_32(src_addr + (uint32_t)&t->_p_Memory));
 386             }
 387
 388             cmd_mask = (uint8_t)M68KR(M68K_REG_D4);
 389             rtg_address[1] = be32toh(r->_p_Memory);
 390             rtg_address_adj[1] = rtg_address[1] - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
 391
 392             rtg_blittemplate(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), src_addr, fgcol, bgcol, CMD_PITCH, t_pitch, RGBF_D7, x_offset, cmd_mask, draw_mode);
 393             break;
 394         }
 395         default:
 396             printf("[!!!IRTG] Unnkonw/unhandled iRTG command %d.\n", cmd);
 397             break;
 398     }
 399 }
 400
 401 static void handle_rtg_command(uint32_t cmd) {
 402   //printf("Handling RTG command %d (%.8X)\n", cmd, cmd);
 403     switch (cmd) {
 404         case RTGCMD_SETGC:
 405             rtg_display_format = rtg_format;
 406             rtg_display_width = rtg_x[0];
 407             rtg_display_height = rtg_y[0];
 408             if (rtg_u8[0]) {
 409                 //rtg_pitch = rtg_display_width << rtg_format;
 410                 framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << rtg_display_format) + (rtg_offset_y * rtg_pitch);
 411                 rtg_total_rows = rtg_y[1];
 412             }
 413             else {
 414                 //rtg_pitch = rtg_display_width << rtg_format;
 415                 framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << rtg_display_format) + (rtg_offset_y * rtg_pitch);
 416                 rtg_total_rows = rtg_y[1];
 417             }
 418             //printf("Set RTG mode:\n");
 419             //printf("%dx%d pixels\n", rtg_display_width, rtg_display_height);
 420             //printf("Pixel format: %s\n", rtg_format_names[rtg_display_format]);
 421             break;
 422         case RTGCMD_SETPAN:
 423             //printf("Command: SetPan.\n");
 424             rtg_offset_x = rtg_x[1];
 425             rtg_offset_y = rtg_y[1];
 426             rtg_pitch = (rtg_x[0] << rtg_display_format);
 427             framebuffer_addr = rtg_address[0] - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
 428             framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << rtg_display_format) + (rtg_offset_y * rtg_pitch);
 429             break;
 430         case RTGCMD_SETCLUT: {
 431             //printf("Command: SetCLUT.\n");
 432             //printf("Set palette entry %d to %d, %d, %d\n", rtg_u8[0], rtg_u8[1], rtg_u8[2], rtg_u8[3]);
 433             //printf("Set palette entry %d to 32-bit palette color: %.8X\n", rtg_u8[0], rtg_rgb[0]);
 434             rtg_set_clut_entry(rtg_u8[0], rtg_rgb[0]);
 435             break;
 436         }
 437         case RTGCMD_SETDISPLAY:
 438             //printf("RTG SetDisplay %s\n", (rtg_u8[1]) ? "enabled" : "disabled");
 439             // I remeber wrongs.
 440             //printf("Command: SetDisplay.\n");
 441             break;
 442         case RTGCMD_ENABLE:
 443         case RTGCMD_SETSWITCH:
 444             //printf("RTG SetSwitch %s\n", ((rtg_x[0]) & 0x01) ? "enabled" : "disabled");
 445             //printf("LAL: %.4X\n", rtg_x[0]);
 446             if (display_enabled != ((rtg_x[0]) & 0x01)) {
 447                 display_enabled = ((rtg_x[0]) & 0x01);
 448                 if (display_enabled) {
 449                     rtg_init_display();
 450                 }
 451                 else
 452                     rtg_shutdown_display();
 453             }
 454             break;
 455         case RTGCMD_FILLRECT:
 456             if (rtg_u8[0] == 0xFF || rtg_format != RTGFMT_8BIT) {
 457                 rtg_fillrect_solid(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_rgb[0], rtg_x[2], rtg_format);
 458                 gdebug("FillRect Solid\n");
 459             }
 460             else {
 461                 rtg_fillrect(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_rgb[0], rtg_x[2], rtg_format, rtg_u8[0]);
 462                 gdebug("FillRect Masked\n");
 463             }
 464             break;
 465         case RTGCMD_INVERTRECT:
 466             rtg_invertrect(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_format, rtg_u8[0]);
 467             gdebug("InvertRect\n");
 468             break;
 469         case RTGCMD_BLITRECT:
 470             if (rtg_u8[0] == 0xFF || rtg_format != RTGFMT_8BIT) {
 471                 rtg_blitrect_solid(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[3], rtg_format);
 472                 gdebug("BlitRect Solid\n");
 473             }
 474             else {
 475                 rtg_blitrect(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[3], rtg_format, rtg_u8[0]);
 476                 gdebug("BlitRect Masked\n");
 477             }
 478             break;
 479         case RTGCMD_BLITRECT_NOMASK_COMPLETE:
 480             rtg_blitrect_nomask_complete(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[3], rtg_x[4], rtg_address[0], rtg_address[1], rtg_format, rtg_u8[0]);
 481             gdebug("BlitRectNoMaskComplete\n");
 482             break;
 483         case RTGCMD_BLITPATTERN:
 484             rtg_blitpattern(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_address[0], rtg_rgb[0], rtg_rgb[1], rtg_x[3], rtg_format, rtg_x[2], rtg_y[2], rtg_u8[0], rtg_u8[1], rtg_u8[2]);
 485             gdebug("BlitPattern\n");
 486             return;
 487         case RTGCMD_BLITTEMPLATE:
 488             rtg_blittemplate(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_address[0], rtg_rgb[0], rtg_rgb[1], rtg_x[3], rtg_x[4], rtg_format, rtg_x[2], rtg_u8[0], rtg_u8[1]);
 489             gdebug("BlitTemplate\n");
 490             break;
 491         case RTGCMD_DRAWLINE:
 492             if (rtg_u8[0] == 0xFF && rtg_y[2] == 0xFFFF)
 493                 rtg_drawline_solid(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_rgb[0], rtg_x[3], rtg_format);
 494             else
 495                 rtg_drawline(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[4], rtg_rgb[0], rtg_rgb[1], rtg_x[3], rtg_format, rtg_u8[0], rtg_u8[1]);
 496             gdebug("DrawLine\n");
 497             break;
 498         case RTGCMD_P2C:
 499             rtg_p2c(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_u8[1], rtg_u8[2], rtg_u8[0], (rtg_user[0] >> 0x8), rtg_x[4], (uint8_t *)&rtg_mem[rtg_address_adj[1]]);
 500             gdebug("Planar2Chunky\n");
 501             break;
 502         case RTGCMD_P2D:
 503             rtg_p2d(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_u8[1], rtg_u8[2], rtg_u8[0], (rtg_user[0] >> 0x8), rtg_x[4], (uint8_t *)&rtg_mem[rtg_address_adj[1]]);
 504             gdebug("Planar2Direct\n");
 505             break;
 506         case RTGCMD_SETSPRITE:
 507             rtg_enable_mouse_cursor();
 508             gdebug("SetSprite\n");
 509             break;
 510         case RTGCMD_SETSPRITECOLOR:
 511             rtg_set_cursor_clut_entry(rtg_u8[0], rtg_u8[1], rtg_u8[2], rtg_u8[3]);
 512             gdebug("SetSpriteColor\n");
 513             break;
 514         case RTGCMD_SETSPRITEPOS:
 515             rtg_set_mouse_cursor_pos((int16_t)rtg_x[0], (int16_t)rtg_y[0]);
 516             gdebug("SetSpritePos\n");
 517             break;
 518         case RTGCMD_SETSPRITEIMAGE:
 519             rtg_set_mouse_cursor_image(&rtg_mem[rtg_address_adj[1]], rtg_u8[0], rtg_u8[1]);
 520             gdebug("SetSpriteImage\n");
 521             break;
 522         case RTGCMD_DEBUGME:
 523             printf ("[RTG] DebugMe!\n");
 524             break;
 525         default:
 526             printf("[!!!RTG] Unknown/unhandled RTG command %d ($%.4X)\n", cmd, cmd);
 527             break;
 528     }
 529 }