1 // SPDX-License-Identifier: MIT
9 #include "config_file/config_file.h"
10 #include "gpio/ps_protocol.h"
11 #include "platforms/amiga/rtg/irtg_structs.h"
16 void rtg_p2c_ex(int16_t sx, int16_t sy, int16_t dx, int16_t dy, int16_t w, int16_t h, uint8_t minterm, struct BitMap *bm, uint8_t mask, uint16_t dst_pitch, uint16_t src_pitch);
19 uint16_t rtg_x[8], rtg_y[8];
22 uint32_t rtg_address[8];
23 uint32_t rtg_address_adj[8];
26 static uint8_t display_enabled = 0xFF;
28 uint16_t rtg_display_width, rtg_display_height;
29 uint16_t rtg_display_format;
30 uint16_t rtg_pitch, rtg_total_rows;
31 uint16_t rtg_offset_x, rtg_offset_y;
33 uint8_t *rtg_mem; // FIXME
35 uint32_t framebuffer_addr = 0;
36 uint32_t framebuffer_addr_adj = 0;
38 static void handle_rtg_command(uint32_t cmd);
39 static void handle_irtg_command(uint32_t cmd);
41 uint8_t realtime_graphics_debug = 0;
42 extern int cpu_emulation_running;
43 extern struct emulator_config *cfg;
44 extern uint8_t rtg_on, rtg_output_in_vblank;
49 /*static const char *op_type_names[OP_TYPE_NUM] = {
56 /*static const char *rtg_format_names[RTGFMT_NUM] = {
67 int init_rtg_data(struct emulator_config *cfg_) {
68 rtg_mem = calloc(1, 40 * SIZE_MEGA);
70 printf("Failed to allocate RTG video memory.\n");
74 m68k_add_ram_range(PIGFX_RTG_BASE + PIGFX_REG_SIZE, 32 * SIZE_MEGA - PIGFX_REG_SIZE, rtg_mem);
75 add_mapping(cfg_, MAPTYPE_RAM_NOALLOC, PIGFX_RTG_BASE + PIGFX_REG_SIZE, 40 * SIZE_MEGA - PIGFX_REG_SIZE, -1, (char *)rtg_mem, "rtg_mem", 0);
80 printf("[RTG] Shutting down RTG.\n");
91 unsigned int rtg_get_fb() {
92 return PIGFX_RTG_BASE + PIGFX_REG_SIZE + framebuffer_addr_adj;
95 unsigned int rtg_read(uint32_t address, uint8_t mode) {
96 //printf("%s read from RTG: %.8X\n", op_type_names[mode], address);
97 if (address >= PIGFX_REG_SIZE) {
98 if (rtg_mem && (address - PIGFX_REG_SIZE) < PIGFX_UPPER) {
101 return (rtg_mem[address - PIGFX_REG_SIZE]);
104 return be16toh(*(( uint16_t *) (&rtg_mem[address - PIGFX_REG_SIZE])));
106 case OP_TYPE_LONGWORD:
107 return be32toh(*(( uint32_t *) (&rtg_mem[address - PIGFX_REG_SIZE])));
120 return !rtg_on || rtg_output_in_vblank;
128 struct timespec diff(struct timespec start, struct timespec end)
130 struct timespec temp;
131 if ((end.tv_nsec-start.tv_nsec)<0) {
132 temp.tv_sec = end.tv_sec-start.tv_sec-1;
133 temp.tv_nsec = 1000000000+end.tv_nsec-start.tv_nsec;
135 temp.tv_sec = end.tv_sec-start.tv_sec;
136 temp.tv_nsec = end.tv_nsec-start.tv_nsec;
141 #define CHKREG(a, b) case a: b = value; break;
143 void rtg_write(uint32_t address, uint32_t value, uint8_t mode) {
144 //printf("%s write to RTG: %.8X (%.8X)\n", op_type_names[mode], address, value);
145 if (address >= PIGFX_REG_SIZE) {
146 /*if ((address - PIGFX_REG_SIZE) < framebuffer_addr) {// || (address - PIGFX_REG_SIZE) > framebuffer_addr + ((rtg_display_width << rtg_display_format) * rtg_display_height)) {
147 printf("Write to RTG memory outside frame buffer %.8X (%.8X).\n", (address - PIGFX_REG_SIZE), framebuffer_addr);
149 if (rtg_mem && (address - PIGFX_REG_SIZE) < PIGFX_UPPER) {
152 rtg_mem[address - PIGFX_REG_SIZE] = value;
155 *(( uint16_t *) (&rtg_mem[address - PIGFX_REG_SIZE])) = htobe16(value);
157 case OP_TYPE_LONGWORD:
158 *(( uint32_t *) (&rtg_mem[address - PIGFX_REG_SIZE])) = htobe32(value);
164 } else if (address == RTG_DEBUGME) {
165 printf("RTG DEBUGME WRITE: %d.\n", value);
170 CHKREG(RTG_U81, rtg_u8[0]);
171 CHKREG(RTG_U82, rtg_u8[1]);
172 CHKREG(RTG_U83, rtg_u8[2]);
173 CHKREG(RTG_U84, rtg_u8[3]);
178 CHKREG(RTG_X1, rtg_x[0]);
179 CHKREG(RTG_X2, rtg_x[1]);
180 CHKREG(RTG_X3, rtg_x[2]);
181 CHKREG(RTG_X4, rtg_x[3]);
182 CHKREG(RTG_X5, rtg_x[4]);
183 CHKREG(RTG_Y1, rtg_y[0]);
184 CHKREG(RTG_Y2, rtg_y[1]);
185 CHKREG(RTG_Y3, rtg_y[2]);
186 CHKREG(RTG_Y4, rtg_y[3]);
187 CHKREG(RTG_Y5, rtg_y[4]);
188 CHKREG(RTG_U1, rtg_user[0]);
189 CHKREG(RTG_U2, rtg_user[1]);
190 CHKREG(RTG_FORMAT, rtg_format);
192 handle_rtg_command(value);
195 handle_irtg_command(value);
199 case OP_TYPE_LONGWORD:
202 rtg_address[0] = value;
203 rtg_address_adj[0] = value - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
206 rtg_address[1] = value;
207 rtg_address_adj[1] = value - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
209 CHKREG(RTG_ADDR3, rtg_address[2]);
210 CHKREG(RTG_ADDR4, rtg_address[3]);
211 CHKREG(RTG_RGB1, rtg_rgb[0]);
212 CHKREG(RTG_RGB2, rtg_rgb[1]);
221 #define gdebug(a) if (realtime_graphics_debug) { printf(a); m68k_end_timeslice(); cpu_emulation_running = 0; }
222 #define M68KR(a) m68k_get_reg(NULL, a)
223 #define RGBF_D7 rgbf_to_rtg[M68KR(M68K_REG_D7)]
224 #define CMD_PITCH be16toh(r->BytesPerRow)
226 static struct P96RenderInfo *r;
227 static struct P96BoardInfo *b;
228 static struct P96Line *ln;
229 static uint8_t cmd_mask;
231 static void handle_irtg_command(uint32_t cmd) {
232 b = (struct P96BoardInfo *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A0));
233 r = (struct P96RenderInfo *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A1));
236 case RTGCMD_SETPAN: {
237 // A0: struct BoardInfo *b, A1: UBYTE *addr, D0 UWORD width, D1: WORD x_offset, D2: WORD y_offset, D7: RGBFTYPE format
239 if (realtime_graphics_debug) {
240 printf("iSetPanning begin\n");
241 printf("IRTGCmd SetPanning\n");
242 printf("IRTGCmd x: %d y: %d w: %d (%d)\n", M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D0) << RGBF_D7, M68KR(M68K_REG_D0));
243 printf("BoardInfo: %.8X Addr: %.8X\n", M68KR(M68K_REG_A0), M68KR(M68K_REG_A1));
244 printf("BoardInfo Xoffs: %d Yoffs: %d\n", be16toh(b->XOffset), be16toh(b->YOffset));
249 b->XOffset = (int16_t)htobe16(M68KR(M68K_REG_D1));
250 b->YOffset = (int16_t)htobe16(M68KR(M68K_REG_D2));
252 rtg_offset_x = M68KR(M68K_REG_D1);
253 rtg_offset_y = M68KR(M68K_REG_D2);
254 rtg_pitch = (M68KR(M68K_REG_D0) << RGBF_D7);
255 framebuffer_addr = M68KR(M68K_REG_A1) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
256 framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << RGBF_D7) + (rtg_offset_y * rtg_pitch);
259 if (realtime_graphics_debug) {
260 printf("RTG OffsetX/Y: %d/%d\n", rtg_offset_x, rtg_offset_y);
261 printf("RTG Pitch: %d\n", rtg_pitch);
262 printf("RTG FBAddr/Adj: %.8X (%.8X)/%.8X\n", framebuffer_addr, M68KR(M68K_REG_A1), framebuffer_addr_adj);
263 printf("iSetPanning End\n");
269 case RTGCMD_DRAWLINE: {
270 // A0: struct BoardInfo *b, A1: RenderInfo *r A2: struct Line *l, D0: UBYTE mask, D7: RGBFTYPE format
271 gdebug("iDrawLine begin\n");
272 ln = (struct P96Line *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
274 if (!ln || !r) break;
276 cmd_mask = (uint8_t)M68KR(M68K_REG_D0);
277 rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
279 if (cmd_mask == 0xFF && be16toh(ln->LinePtrn) == 0xFFFF) {
280 rtg_drawline_solid(be16toh(ln->X), be16toh(ln->Y), be16toh(ln->dX), be16toh(ln->dY),
281 be16toh(ln->Length), be32toh(ln->FgPen), CMD_PITCH, RGBF_D7);
283 rtg_drawline(be16toh(ln->X), be16toh(ln->Y), be16toh(ln->dX), be16toh(ln->dY),
284 be16toh(ln->Length), be16toh(ln->LinePtrn), be16toh(ln->PatternShift),
285 be32toh(ln->FgPen), be32toh(ln->BgPen), CMD_PITCH,
286 RGBF_D7, cmd_mask, ln->DrawMode);
288 gdebug("iDrawLine end\n");
291 case RTGCMD_FILLRECT: {
292 // A0: BoardInfo *b, A1: RenderInfo *r
293 // D0 WORD x, D1: WORD y, D2: WORD w, D3: WORD h
294 // D4: ULONG color, D5: UBYTE mask, D7: RGBFTYPE format
295 gdebug("iFillRect begin\n");
297 if (realtime_graphics_debug) {
298 DEBUG("X1/X2: %d/%d-> X2/Y2: %d/%d\n", (int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3));
299 DEBUG("R: %.8X B: %.8X\n", M68KR(M68K_REG_A0), M68KR(M68K_REG_A1));
305 cmd_mask = (uint8_t)M68KR(M68K_REG_D5);
306 rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
308 if (cmd_mask == 0xFF) {
309 rtg_fillrect_solid((int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3),
310 M68KR(M68K_REG_D4), CMD_PITCH, RGBF_D7);
312 rtg_fillrect((int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3),
313 M68KR(M68K_REG_D4), CMD_PITCH, RGBF_D7, cmd_mask);
315 gdebug("iFillRect end\n");
318 case RTGCMD_INVERTRECT: {
319 // A0: BoardInfo *b, A1: RenderInfo *r
320 // D0 WORD x, D1: WORD y, D2: WORD w, D3: WORD h
321 // D4: UBYTE mask, D7: RGBFTYPE format
322 gdebug("iInvertRect begin\n");
325 cmd_mask = (uint8_t)M68KR(M68K_REG_D4);
326 rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
328 rtg_invertrect((int16_t)M68KR(M68K_REG_D0), (int16_t)M68KR(M68K_REG_D1), (int16_t)M68KR(M68K_REG_D2), (int16_t)M68KR(M68K_REG_D3), CMD_PITCH, RGBF_D7, cmd_mask);
329 gdebug("iInvertRect end\n");
332 case RTGCMD_BLITRECT: {
333 // A0: BoardInfo *b, A1: RenderInfo *r)
334 // D0: WORD x, D1: WORD y, D2: WORD dx, D3: WORD dy, D4: WORD w, D5: WORD h,
335 // D6: UBYTE mask, D7: RGBFTYPE format
336 gdebug("iBlitRect begin\n");
338 cmd_mask = (uint8_t)M68KR(M68K_REG_D6);
339 rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
341 if (cmd_mask == 0xFF) {
342 rtg_blitrect_solid(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), M68KR(M68K_REG_D4), M68KR(M68K_REG_D5), CMD_PITCH, RGBF_D7);
344 rtg_blitrect(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), M68KR(M68K_REG_D4), M68KR(M68K_REG_D5), CMD_PITCH, RGBF_D7, cmd_mask);
347 gdebug("iBlitRect end\n");
350 case RTGCMD_BLITRECT_NOMASK_COMPLETE: {
351 // A0: BoardInfo *b, A1: RenderInfo *rs, A2: RenderInfo *rt,
352 // D0: WORD x, D1: WORD y, D2: WORD dx, D3: WORD dy, D4: WORD w, D5: WORD h,
353 // D6: UBYTE minterm, D7: RGBFTYPE format
354 gdebug("iBlitRectNoMaskComplete begin\n");
356 uint8_t minterm = (uint8_t)M68KR(M68K_REG_D6);
357 struct P96RenderInfo *rt = (struct P96RenderInfo *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
359 uint32_t src_addr = be32toh(r->_p_Memory);
360 uint32_t dst_addr = be32toh(rt->_p_Memory);
362 rtg_blitrect_nomask_complete(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), M68KR(M68K_REG_D4), M68KR(M68K_REG_D5),
363 CMD_PITCH, be16toh(rt->BytesPerRow), src_addr, dst_addr, RGBF_D7, minterm);
365 gdebug("iBlitRectNoMaskComplete end\n");
368 case RTGCMD_BLITTEMPLATE: {
369 // A0: BoardInfo *b, A1: RenderInfo *r, A2: Template *t
370 // D0: WORD x, D1: WORD y, D2: WORD w, D3: WORD h
371 // D4: UBYTE mask, D7: RGBFTYPE format
372 if (!r || !M68KR(M68K_REG_A2))
374 gdebug("iBlitTemplate begin\n");
376 uint16_t t_pitch = 0, x_offset = 0;
377 uint32_t src_addr = M68KR(M68K_REG_A2);
378 uint32_t fgcol = 0, bgcol = 0;
379 uint8_t draw_mode = 0;
381 struct P96Template *t = (struct P96Template *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
383 t_pitch = be16toh(t->BytesPerRow);
384 fgcol = be32toh(t->FgPen);
385 bgcol = be32toh(t->BgPen);
386 x_offset = t->XOffset;
387 draw_mode = t->DrawMode;
388 src_addr = be32toh(t->_p_Memory);
390 t_pitch = be16toh(ps_read_16(src_addr + (uint32_t)&t->BytesPerRow));
391 fgcol = be32toh(ps_read_32(src_addr + (uint32_t)&t->FgPen));
392 bgcol = be32toh(ps_read_32(src_addr + (uint32_t)&t->BgPen));
393 x_offset = ps_read_8(src_addr + (uint32_t)&t->XOffset);
394 draw_mode = ps_read_8(src_addr + (uint32_t)&t->DrawMode);
395 src_addr = be32toh(ps_read_32(src_addr + (uint32_t)&t->_p_Memory));
398 cmd_mask = (uint8_t)M68KR(M68K_REG_D4);
399 rtg_address[1] = be32toh(r->_p_Memory);
400 rtg_address_adj[1] = rtg_address[1] - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
402 rtg_blittemplate(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), src_addr, fgcol, bgcol, CMD_PITCH, t_pitch, RGBF_D7, x_offset, cmd_mask, draw_mode);
403 gdebug("iBlitTemplate end\n");
406 case RTGCMD_BLITPATTERN: {
407 // A0: BoardInfo *b, A1: RenderInfo *r, A2: Pattern *p
408 // D0: WORD x, D1: WORD y, D2: WORD w, D3: WORD h
409 // D4: UBYTE mask, D7: RGBFTYPE format
410 if (!r || !M68KR(M68K_REG_A2))
412 gdebug("iBlitPattern begin\n");
414 uint16_t x_offset = 0, y_offset = 0;
415 uint32_t src_addr = M68KR(M68K_REG_A2);
416 uint32_t fgcol = 0, bgcol = 0;
417 uint8_t draw_mode = 0, loop_rows = 0;
419 struct P96Pattern *p = (struct P96Pattern *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
421 fgcol = be32toh(p->FgPen);
422 bgcol = be32toh(p->BgPen);
423 x_offset = be16toh(p->XOffset);
424 y_offset = be16toh(p->YOffset);
425 draw_mode = p->DrawMode;
426 loop_rows = 1 << p->Size;
427 src_addr = be32toh(p->_p_Memory);
429 fgcol = be32toh(ps_read_32(src_addr + (uint32_t)&p->FgPen));
430 bgcol = be32toh(ps_read_32(src_addr + (uint32_t)&p->BgPen));
431 x_offset = be16toh(ps_read_16(src_addr + (uint32_t)&p->XOffset));
432 y_offset = be16toh(ps_read_16(src_addr + (uint32_t)&p->YOffset));
433 draw_mode = ps_read_8(src_addr + (uint32_t)&p->DrawMode);
434 loop_rows = 1 << ps_read_8(src_addr + (uint32_t)&p->Size);
435 src_addr = be32toh(p->_p_Memory);
438 cmd_mask = (uint8_t)M68KR(M68K_REG_D4);
439 rtg_address[1] = be32toh(r->_p_Memory);
440 rtg_address_adj[1] = rtg_address[1] - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
442 rtg_blitpattern(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), src_addr, fgcol, bgcol, CMD_PITCH, RGBF_D7, x_offset, y_offset, cmd_mask, draw_mode, loop_rows);
443 gdebug("iBlitPattern end\n");
447 // A0: BoardInfo, A1: BitMap *bm, A2: RenderInfo *r,
448 // D0: SHORT x, D1: SHORT y, D2: SHORT dx, D3: SHORT dy, D4: SHORT w, D5: SHORT h,
449 // D6: UBYTE minterm, D7: UBYTE mask
450 r = (struct P96RenderInfo *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A2));
451 struct BitMap *bm = (struct BitMap *)get_mapped_data_pointer_by_address(cfg, M68KR(M68K_REG_A1));
455 gdebug("iP2C begin\n");
458 printf ("Help! BitMap not in mapped memory.\n");
461 gdebug("Data is available in mapped memory.\n");
464 if (realtime_graphics_debug) {
465 printf("bm: %.8X r: %.8X\n", (uint32_t)bm, (uint32_t)r);
467 printf("bm pitch: %d\n", be16toh(bm->BytesPerRow));
469 printf("r pitch: %d\n", be16toh(r->BytesPerRow));
472 uint16_t bmp_pitch = be16toh(bm->BytesPerRow);
473 uint16_t line_pitch = be16toh(r->BytesPerRow);
474 rtg_address_adj[0] = be32toh(r->_p_Memory) - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
476 uint8_t minterm = (uint8_t)M68KR(M68K_REG_D6);
477 cmd_mask = (uint8_t)M68KR(M68K_REG_D7);
479 rtg_p2c_ex(M68KR(M68K_REG_D0), M68KR(M68K_REG_D1), M68KR(M68K_REG_D2), M68KR(M68K_REG_D3), M68KR(M68K_REG_D4), M68KR(M68K_REG_D5), minterm, bm, cmd_mask, line_pitch, bmp_pitch);
480 gdebug("iP2C end\n");
484 printf("[!!!IRTG] Unnkonw/unhandled iRTG command %d.\n", cmd);
489 static void handle_rtg_command(uint32_t cmd) {
490 //printf("Handling RTG command %d (%.8X)\n", cmd, cmd);
493 rtg_display_format = rtg_format;
494 rtg_display_width = rtg_x[0];
495 rtg_display_height = rtg_y[0];
497 //rtg_pitch = rtg_display_width << rtg_format;
498 framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << rtg_display_format) + (rtg_offset_y * rtg_pitch);
499 rtg_total_rows = rtg_y[1];
502 //rtg_pitch = rtg_display_width << rtg_format;
503 framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << rtg_display_format) + (rtg_offset_y * rtg_pitch);
504 rtg_total_rows = rtg_y[1];
506 //printf("Set RTG mode:\n");
507 //printf("%dx%d pixels\n", rtg_display_width, rtg_display_height);
508 //printf("Pixel format: %s\n", rtg_format_names[rtg_display_format]);
511 //printf("Command: SetPan.\n");
512 rtg_offset_x = rtg_x[1];
513 rtg_offset_y = rtg_y[1];
514 rtg_pitch = (rtg_x[0] << rtg_display_format);
515 framebuffer_addr = rtg_address[0] - (PIGFX_RTG_BASE + PIGFX_REG_SIZE);
516 framebuffer_addr_adj = framebuffer_addr + (rtg_offset_x << rtg_display_format) + (rtg_offset_y * rtg_pitch);
518 case RTGCMD_SETCLUT: {
519 //printf("Command: SetCLUT.\n");
520 //printf("Set palette entry %d to %d, %d, %d\n", rtg_u8[0], rtg_u8[1], rtg_u8[2], rtg_u8[3]);
521 //printf("Set palette entry %d to 32-bit palette color: %.8X\n", rtg_u8[0], rtg_rgb[0]);
522 rtg_set_clut_entry(rtg_u8[0], rtg_rgb[0]);
525 case RTGCMD_SETDISPLAY:
526 //printf("RTG SetDisplay %s\n", (rtg_u8[1]) ? "enabled" : "disabled");
528 //printf("Command: SetDisplay.\n");
531 case RTGCMD_SETSWITCH:
532 //printf("RTG SetSwitch %s\n", ((rtg_x[0]) & 0x01) ? "enabled" : "disabled");
533 //printf("LAL: %.4X\n", rtg_x[0]);
534 if (display_enabled != ((rtg_x[0]) & 0x01)) {
535 display_enabled = ((rtg_x[0]) & 0x01);
536 if (display_enabled) {
540 rtg_shutdown_display();
543 case RTGCMD_FILLRECT:
544 if (rtg_u8[0] == 0xFF || rtg_format != RTGFMT_8BIT) {
545 rtg_fillrect_solid(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_rgb[0], rtg_x[2], rtg_format);
546 gdebug("FillRect Solid\n");
549 rtg_fillrect(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_rgb[0], rtg_x[2], rtg_format, rtg_u8[0]);
550 gdebug("FillRect Masked\n");
553 case RTGCMD_INVERTRECT:
554 rtg_invertrect(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_format, rtg_u8[0]);
555 gdebug("InvertRect\n");
557 case RTGCMD_BLITRECT:
558 if (rtg_u8[0] == 0xFF || rtg_format != RTGFMT_8BIT) {
559 rtg_blitrect_solid(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[3], rtg_format);
560 gdebug("BlitRect Solid\n");
563 rtg_blitrect(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[3], rtg_format, rtg_u8[0]);
564 gdebug("BlitRect Masked\n");
567 case RTGCMD_BLITRECT_NOMASK_COMPLETE:
568 rtg_blitrect_nomask_complete(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[3], rtg_x[4], rtg_address[0], rtg_address[1], rtg_format, rtg_u8[0]);
569 gdebug("BlitRectNoMaskComplete\n");
571 case RTGCMD_BLITPATTERN:
572 rtg_blitpattern(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_address[0], rtg_rgb[0], rtg_rgb[1], rtg_x[3], rtg_format, rtg_x[2], rtg_y[2], rtg_u8[0], rtg_u8[1], rtg_u8[2]);
573 gdebug("BlitPattern\n");
575 case RTGCMD_BLITTEMPLATE:
576 rtg_blittemplate(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_address[0], rtg_rgb[0], rtg_rgb[1], rtg_x[3], rtg_x[4], rtg_format, rtg_x[2], rtg_u8[0], rtg_u8[1]);
577 gdebug("BlitTemplate\n");
579 case RTGCMD_DRAWLINE:
580 if (rtg_u8[0] == 0xFF && rtg_y[2] == 0xFFFF)
581 rtg_drawline_solid(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_rgb[0], rtg_x[3], rtg_format);
583 rtg_drawline(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[4], rtg_rgb[0], rtg_rgb[1], rtg_x[3], rtg_format, rtg_u8[0], rtg_u8[1]);
584 gdebug("DrawLine\n");
587 rtg_p2c(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_u8[1], rtg_u8[2], rtg_u8[0], (rtg_user[0] >> 0x8), rtg_x[4], (uint8_t *)&rtg_mem[rtg_address_adj[1]]);
588 gdebug("Planar2Chunky\n");
591 rtg_p2d(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_u8[1], rtg_u8[2], rtg_u8[0], (rtg_user[0] >> 0x8), rtg_x[4], (uint8_t *)&rtg_mem[rtg_address_adj[1]]);
592 gdebug("Planar2Direct\n");
594 case RTGCMD_SETSPRITE:
595 rtg_enable_mouse_cursor();
596 gdebug("SetSprite\n");
598 case RTGCMD_SETSPRITECOLOR:
599 rtg_set_cursor_clut_entry(rtg_u8[0], rtg_u8[1], rtg_u8[2], rtg_u8[3]);
600 gdebug("SetSpriteColor\n");
602 case RTGCMD_SETSPRITEPOS:
603 rtg_set_mouse_cursor_pos((int16_t)rtg_x[0], (int16_t)rtg_y[0]);
604 gdebug("SetSpritePos\n");
606 case RTGCMD_SETSPRITEIMAGE:
607 rtg_set_mouse_cursor_image(&rtg_mem[rtg_address_adj[1]], rtg_u8[0], rtg_u8[1]);
608 gdebug("SetSpriteImage\n");
611 printf ("[RTG] DebugMe!\n");
614 printf("[!!!RTG] Unknown/unhandled RTG command %d ($%.4X)\n", cmd, cmd);