7 #define PREFETCH "prefetch"
8 #define PREFETCHW "prefetchw"
9 #elif defined ( HAVE_MMX2 )
10 #define PREFETCH "prefetchnta"
11 #define PREFETCHW "prefetcht0"
21 #define MOVNTQ "movntq"
27 #define SFENCE "sfence"
30 void rgb24to32(uint8_t *src,uint8_t *dst,uint32_t src_size)
36 const uint64_t mask32 = 0x00FFFFFF00FFFFFFULL;
46 mm_end = (uint8_t*)((((unsigned long)end)/16)*16);
47 __asm __volatile("movq %0, %%mm7"::"m"(mask32):"memory");
60 "punpckldq %%mm1, %%mm0\n\t"
61 "punpckldq %%mm3, %%mm2\n\t"
62 "pand %%mm7, %%mm0\n\t"
63 "pand %%mm7, %%mm2\n\t"
64 MOVNTQ" %%mm0, %0\n\t"
73 __asm __volatile(SFENCE:::"memory");
75 __asm __volatile(EMMS:::"memory");
86 /* TODO: MMX optimization */
87 void rgb32to24(uint8_t *src,uint8_t *dst,uint32_t src_size)
102 /* Original by Strepto/Astral
103 ported to gcc & bugfixed : A'rpi */
104 void rgb15to16(uint8_t *src,uint8_t *dst,uint32_t src_size)
107 static uint64_t mask_b = 0x001F001F001F001FLL; // 00000000 00011111 xxB
108 static uint64_t mask_rg = 0x7FE07FE07FE07FE0LL; // 01111111 11100000 RGx
109 register char* s=src+src_size;
110 register char* d=dst+src_size;
111 register int offs=-src_size;
112 movq_m2r (mask_b, mm4);
113 movq_m2r (mask_rg, mm5);
115 movq_m2r (*(s+offs), mm0);
118 movq_m2r (*(s+8+offs), mm2);
131 movq_r2m (mm0,*(d+offs));
134 movq_r2m (mm2,*(d+8+offs));
140 uint16_t *s1=( uint16_t * )src;
141 uint16_t *d1=( uint16_t * )dst;
142 uint16_t *e=((uint8_t *)s1)+src_size;
144 register int x=*( s1++ );
147 0111 1111 1110 0000=0x7FE0
148 00000000000001 1111=0x001F */
149 *( d1++ )=( x&0x001F )|( ( x&0x7FE0 )<<1 );